Multi-supply Voltage Designs Research Articles

A fast and low-power level shifter for multi-supply voltage designs

A fast and low-power level shifter for multi-supply voltage designs

Design of Low Power Level Shifter Circuit with Sleep Transistor Using MultiSupply Voltage Scheme

New low-power Level Shifter (LS) circuit is designed by using sleep transistor with Multi Threshold CMOS (MTCMOS) technique for robust logic voltage shifting from sub-threshold to above- threshold domain. MultiSupply Voltage Design (MSVD) technique is mainly used for energy and speed in modern system-on-chip. In MSVD, level shifters are required to allow different voltage supply to shift from the lower power supply voltage to the higher power supply voltage. This new low-power level shifter circuit is also used for fast response and low leakage power consumption. This low leakage power consumption can be achieved through insertion of sleep transistor and proper transistors sizing. The proposed design efficiently converts 100 mv input signal into 1 v output signal and achieves the power of 2.56 nW by using 90 nm technology.

A 65-nm 25.1-ns 30.7-fJ Robust Subthreshold Level Shifter With Wide Conversion Range

Level shifters (LS) are crucial interface circuits for multisupply voltage designs, and it is challenging to achieve both robust and efficient level conversion from subthreshold to aforementioned threshold. In this brief, we propose two circuit techniques for a novel subthreshold LS with wide conversion range. First, we introduce a novel LS circuit with NMOS-diode-based current limiter for current contention reduction to achieve robust and efficient level conversion. Second, we explore the inverse narrow width effect to increase the drivability of the pull-down devices for delay reduction. When implemented in a commercial 65-nm MTCMOS process, the proposed LS achieves robust conversion from deep subthreshold (sub-100 mV) to nominal supply voltage (1.2 V). For the target conversion from 0.3 to 1.2 V, the proposed LS shows on average 25.1-ns propagation delay, 30.7-fJ energy efficiency, and 2.5-nW leakage power across 25 test chips.

Fast and Wide Range Voltage Conversion in Multisupply Voltage Designs

Multisupply voltage design technique is widely used in modern system-on-chips to tradeoff energy and speed. Level shifters (LSs) allow different voltage domains to be interfaced. In this brief, a new LS is presented for fast and wide range voltage conversion. Because of a novel architecture combined with the use of multithreshold CMOS technique, the proposed circuit guarantees robust voltage shifting from the deep subthreshold to the above-threshold domain while exhibiting fast response and low energy consumption. When implemented in a 90-nm technology node, considering process-voltage-temperature variations, the proposed design reliably converts 100-mV input signals into 1 V output signals. Post-layout simulation results demonstrate that the new LS shows a propagation delay of 16.6 ns, a static power dissipation of 8.7 nW and a total energy per transition of only 77 fJ for a 0.2 V 1-MHz input pulse.

Low-Power Level Shifter for Multi-Supply Voltage Designs

In this brief, a new low-power level shifter (LS) is presented for robust logic voltage shifting from near/sub-threshold to above-threshold domain. The new circuit combines the multi-threshold CMOS technique along with novel topological modifications to guarantee a wide voltage conversion range with limited static power and total energy consumption. When implemented in a 90-nm technology process, the proposed design reliably converts 180-mV input signals into 1-V output signals, while maintaining operational frequencies above 1-MHz, also taking into account process-voltage-temperature variations.Post-layout simulation results demonstrate that the new LS reaches a propagation delay less than 22 ns, a static power dissipation of only 6.4 nW, and a total energy per transition of only 74 fJ for a 0.2-V 1-MHz input pulse.