Multiprocessor Environment Research Articles

Optimizing multiprocessor performance in real-time systems using an innovative genetic algorithm approach

Due to its enormous influence on system functionality, researchers are presently looking into the issue of task scheduling on multiprocessors. Establishing the most advantageous schedules is often regarded as a difficult-to-compute issue. Genetic Algorithm is a recent tool employed by researchers to optimize scheduling tasks and boost performance, although this field of research is yet mostly unexplored. In this article, a novel approach for generating task schedules for real-time systems utilizing a Genetic Algorithm is proposed. The approach seeks to design task schedules for multiprocessor systems with optimal or suboptimal lengths, with the ultimate goal of achieving high performance. This research project focuses on non-preemptive independent tasks in a multiprocessor environment. All processors are assumed to be identical. We conducted a thorough analysis of the proposed approach and pitted it against three frequently utilized scheduling methodologies: the “Evolutionary Fuzzy Based Scheduling Algorithm”, the “Least Laxity First Algorithm”, and the “Earliest Deadline First Algorithm”. The Proposed Algorithm demonstrated superior efficiency and reliability compared to Earliest Deadline First, Least Laxity First, and Evolutionary Fuzzy-based Scheduling Algorithm. It consistently achieved zero missed deadlines and the lowest average response and turnaround times across all scenarios, maintaining optimal performance even under high load conditions.

A High Performance Parallel Approach to Delay Sum Beamformer in a Homogeneous Multicore Environment

A Cache-Aware Beamformer (CABF) algorithm for the DAS beamformer in a homogeneous multicore processor environment is presented. The context of the proposed algorithm is established by discussing the case for a refined multicore implementation of the beamformer algorithm for a sonar application. The algorithm is designed, implemented, and compared to a regular pthread multicore implementation and a standard OpenMP-based implementation, using arithmetic intensity as the metric. FMA implementations of the algorithms are carried out, and the CABF algorithm is shown to achieve a better arithmetic intensity. A 6000-element array is designed with a simultaneous forming of 200 beams to test the efficacy of cabf in a multicore platform. The results show a 73 % increase in GFLOPS for FMA operations. The performance of the beamformer algorithm for different data sizes is studied, and on average, a 36 % improvement in computational performance is achieved compared to the OpenMP-based implementation.

Developing a Platform Using Petri Nets and GPenSIM for Simulation of Multiprocessor Scheduling Algorithms

Efficient multiprocessor scheduling is pivotal in optimizing the performance of parallel computing systems. This paper leverages the power of Petri nets and the tool GPenSIM to model and simulate a variety of multiprocessor scheduling algorithms (the basic algorithms such as first come first serve, shortest job first, and round robin, and more sophisticated schedulers like multi-level feedback queue and Linux’s completely fair scheduler). This paper presents the evaluation of three crucial performance metrics in multiprocessor scheduling (such as turnaround time, response time, and throughput) under various scheduling algorithms. However, the primary focus of the paper is to develop a robust simulation platform consisting of Petri Modules to facilitate the dynamic representation of concurrent processes, enabling us to explore the real-time interactions and dependencies in a multiprocessor environment; more advanced and newer schedulers can be tested with the simulation platform presented in this paper.

GPU parallel processing to enable extensive criticality analysis in state estimation

SummaryPower system monitoring relies on the reliability of state estimation (SE) results. SE plays a dominant role in data debugging if sufficient data is available. Criticality analysis (CA) integrates SE as a module in which measurements—taken one‐by‐one or in groups (tuples) of minimal cardinality—are designated crucial. The combinatorial nature of extensive CA (not restricted to identifying low‐cardinality critical tuples) characterizes its computational complexity and imposes challenging limits to go beyond. In simple terms, these limits are established by the number of measurements to be combined, the cardinality of tuples, and the computing time required to check the criticality condition. This paper proposes an innovative computational solution to expand CA limits found to date in the literature. A framework with multi‐threads designed cleverly on a graphics processing unit (GPU) parallel processing environment is built. The conceived architecture favors evaluating massive measurement combinations of diverse cardinality in extensive CA. Numerical results reveal significant speed‐ups with the proposed approach, contrasting with those reported in research efforts published so far.

Scratchpad Memory Management Random Sampling Algorithm for Multi-core Processor

Traditional compiler-based SPM management often fails to accurately predict the memory access characteristics of system scheduling and task switching in a Multi-core Processor environment, thus affecting the effect of SPM management. The use of runtime dynamic detection can make up for this flaw and provide an accurate and efficient dynamic management method. This research focuses on the analysis of the similarities and differences between SPM management in Multi-core Processor environment and single-task environment, and builds a real-time operating system (RTOS) supporting multi-task scheduling according to experimental requirements, which is necessary for the random sampling of SPM allocation algorithm and improvements to meet the needs of adaptive SPM allocation for program runtime in a Multi-core Processor environment. The performance of the random sampling algorithm in Multi-core Processor environment is analyzed which proves the effectiveness of the allocation algorithm for Multi-core Processor environment.

MRI Brain Tumor Classification Using Computational Intelligence Technique

We proposed a method for detecting and classifying tumors using parallel processing, soft computing, and machine learning techniques. Due to the augmented size and capacity of medical images, the medical imaging field must need an automatic diagnosis process for tumor classification for improved treatment. Initially, we pre-process Magnetic Resonance Imaging (MRI) brain tumor images using non-local adaptive means filter and contrast enhancement in the proposed system. We use a Fuzzy Clustering Means (FCM) algorithm to segment the tumors from the preprocessed MRI brain images. The significant features are obtained from the segmented tumor images by using Discrete Wavelet Transform (DWT), Principal Components Analysis (PCA), and the gray level co-occurrence matrix (GLCM). Machine learning classifiers are peerless techniques for classifying tumors. The classification of tumor grade is done through the Multiclass Support vector machine (MCSVM) classifier. The entire proposed work is implemented on the NVIDIA GeForce GTX parallel processing environment. The innovative final result of our approach was assessed by the Kaggle dataset with the performance metrics and achieved 98.056 % Sensitivity, 100 % Specificity, and 98.139 % Accuracy in 0.3337 computational times

Three Processor Allocation Approaches towards EDF Scheduling for Performance Asymmetric Multiprocessors

With the rapid development of high-performance computing and parallel computing technology, by virtue of its cost-effectiveness, strong scalability, and easy programming, the multiprocessor system has gradually become the mainstream computing platform. Meanwhile, a growing number of researchers pay attention to the performance of multiprocessor systems, especially the task scheduling problem, which has an important impact on the system performance. Most of the current research works on task scheduling algorithms are based on the homogeneous computing environment. On the contrary, research works focusing on more complex performance asymmetric multiprocessor environments still remain rare. In this paper, we compare the effects of three earliest deadline first algorithms under different processor allocation strategies on performance asymmetric multiprocessors. We propose an efficient schedulability analysis for an allocation strategy that assigns high-priority tasks to the slowest idle processor. Experimental results show that the strategy of allocating processors with optimum speeds for high-priority tasks can schedule more task sets than the other two allocation strategies. The strategy that prioritizes the slowest processors for high-priority tasks has the smallest number of task migrations, and the strategy has the highest effective processor utilization.

Stacked multi‐layer security for Hadoop distributed file system using HSCT steganography

SummaryBig data needs to have scalable storage platforms as well as parallel processing environments. Hadoop is preferable because it is an open‐source software which works in a distributed, parallel processing environment and no need of any special hardware. In recent developments of Hadoop, security was introduced as optional. A symmetric block cipher advanced encryption standard (AES) is used for encryption. A 128 MB block of data needs 8 million encryptions. A better way of hiding the data from unauthorized access is preferable. Steganography, a more contemporary security technology than cryptography, is the art and science of hiding subconscious information in hidden item while exposing opponents their existence. The cover is an image, and the secret information may be a photo, music, video, or text. A double layer hexcode substituted–color space transformed (HSCT) steganography with 3 band splitting of data ensures confidentiality of the data and one time pad key generated with client's ID provides authentication also. Considering the volume of data, steganography concept is much faster than AES or any other cipher. Hiding the data inside the random images will indulge in fast reconstruction of data when needed for processing using either MapReduce or tools like spark.

An efficient ACO-based algorithm for task scheduling in heterogeneous multiprocessing environments

An efficient ACO-based algorithm for task scheduling in heterogeneous multiprocessing environments

ChromNetMotif: a Python tool to extract chromatin-sate marked motifs in a chromatin interaction network.

Analysis of network motifs is crucial to studying the robustness, stability, and functions of complex networks. Genome organization can be viewed as a biological network that consists of interactions between different chromatin regions. These interacting regions are also marked by epigenetic or chromatin states which can contribute to the overall organization of the chromatin and proper genome function. Therefore, it is crucial to integrate the chromatin states of the nodes when performing motif analysis in chromatin interaction networks. Even though there has been increasing production of chromatin interaction and genome-wide epigenetic modification data, there is a lack of publicly available tools to extract chromatin state-marked motifs from genome organization data. We develop a Python tool, ChromNetMotif, offering an easy-to-use command line interface to extract chromatin-state-marked motifs from a chromatin interaction network. The tool can extract occurrences, frequencies, and statistical enrichment of the chromatin state-marked motifs. Visualization files are also generated which allow the user to interpret the motifs easily. ChromNetMotif also allows the user to leverage the features of a multicore processor environment to reduce computation time for larger networks. The output files generated can be used to perform further downstream analysis. ChromNetMotif aims to serve as an important tool to comprehend the interplay between epigenetics and genome organization. ChromNetMotif is available at https://github.com/lncRNAAddict/ChromNetworkMotif.

CoreNap: Energy Efficient Core Allocation for Latency-Critical Workloads

In data-center servers, the dynamic core allocation for Latency-Critical (LC) applications can play a crucial role in improving energy efficiency under Service Level Objective (SLO) constraints, allowing cores to enter idle states (i.e., C-states) that consume less power by turning off a part of hardware components of a processor. However, prior studies focus on the core allocation for application threads while not considering cores involved in network packet processing, even though packet processing affects not only response latency but also energy consumption considerably. In this paper, we first investigate the impacts of the explicit core allocation for network packet processing on the tail response latency and energy consumption while running LC applications. We observe that co-adjusting the number of cores for network packet processing along with the number of cores for LC application threads can improve energy efficiency substantially, compared with adjusting the number of cores only for application threads, as prior studies do. In addition, we propose a dynamic core allocation, called <monospace xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CoreNap</monospace> , which allocates/de-allocates cores for both LC application threads and packet processing. <monospace xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CoreNap</monospace> measures the CPU-utilization by application threads and packet processing individually, and predicts response latency and power consumption when the combination of core allocation is enforced via a lightweight prediction model. Based on the prediction, <monospace xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CoreNap</monospace> chooses/enforces the energy-efficient combination of core allocation. Our experimental results show that <monospace xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CoreNap</monospace> reduces energy consumption by up to 18.6% compared with state-of-the-art study that adjusts cores only for LC application in parallel packet processing environments.

Energy-Efficient Scheduling Based on Task Migration Policy Using DPM for燞omogeneous MPSoCs

Increasing the life span and efficiency of Multiprocessor System on Chip (MPSoC) by reducing power and energy utilization has become a critical chip design challenge for multiprocessor systems. With the advancement of technology, the performance management of central processing unit (CPU) is changing. Power densities and thermal effects are quickly increasing in multi-core embedded technologies due to shrinking of chip size. When energy consumption reaches a threshold that creates a delay in complementary metal oxide semiconductor (CMOS) circuits and reduces the speed by 10%–15% because excessive on-chip temperature shortens the chip’s life cycle. In this paper, we address the scheduling & energy utilization problem by introducing and evaluating an optimal energy-aware earliest deadline first scheduling (EA-EDF) based technique for multiprocessor environments with task migration that enhances the performance and efficiency in multiprocessor system-on-chip while lowering energy and power consumption. The selection of core and migration of tasks prevents the system from reaching its maximum energy utilization while effectively using the dynamic power management (DPM) policy. Increase in the execution of tasks the temperature and utilization factor on-chip increases that dissipate more power. The proposed approach migrates such tasks to the core that produces less heat and consumes less power by distributing the load on other cores to lower the temperature and optimizes the duration of idle and sleep times across multiple CPUs. The performance of the EA-EDF algorithm was evaluated by an extensive set of experiments, where excellent results were reported when compared to other current techniques, the efficacy of the proposed methodology reduces the power and energy consumption by 4.3%–4.7% on a utilization of 6%, 36% & 46% at 520 & 624 MHz operating frequency when particularly in comparison to other energy-aware methods for MPSoCs. Tasks are running and accurately scheduled to make an energy-efficient processor by controlling and managing the thermal effects on-chip and optimizing the energy consumption of MPSoCs.

HLA-based time management and synchronization framework for lean manufacturing tools evaluation

Discrete event simulation (DES) is a method for digitally replicating the behavior and performance of real-world processes, systems, and facilities. DES is widely applied in manufacturing, logistics, healthcare, and military domains. In some cases, DES method is insufficient. On one hand, the simulation must be disassembled into subsystems and then distributed on a multiprocessing environment to enhance the simulation performance. On the other hand, to expand current functionality and prevent future application development, a set of interacting simulations is required. In this project, the IEEE high-level architecture (HLA) standard mechanisms are adopted to solve the interoperability problems between heterogeneous components. Time synchronization between federates is essential to have all DESs running in parallel. In this paper, we present a distributed simulation framework designed to assist decision-makers in making the best decisions and prioritizing the adoption of Lean tools and techniques.

Precise path computation based on functional block-based disaggregation for future heterogeneous access-metro networks

Emerging 5G/6G mobile services are intended to cover a broad range of use cases, including applications requiring high bandwidth, low latency, and/or high reliability. To meet these diverse requirements, various optical network technologies and architectures, including optical node structures, transmission technologies, and virtualization technologies, have been extensively investigated. These novel technologies will be integrated to form a platform of future optical access-metro networks that support various mobile services. Such an optical access-metro platform will comprise heterogeneous node structures based on various optical functional blocks (e.g., wavelength selective switches, optical splitters, or arrayed waveguide gratings). To realize a versatile optical access-metro platform, a network resource management system that can universally handle heterogeneous node structures is indispensable. This study investigates the applicability of a functional block-based disaggregation (FBD) approach to such a resource-management system. Here, the previously proposed FBD model is extended to incorporate latency aware path computation. The results demonstrated that the FBD model could be successfully used with heterogeneous network structures, including both passive and switchable optical nodes. The precise path computation capability of the model was also demonstrated, and the scalability of the computation time was quantitatively evaluated in a parallel processing environment. Precise path computation can effectively consider both intra- and inter-node fiber connection lengths, which are useful for handling latency requirements based on an accurate representation of the propagation delay.

Time‐constrained and reliability aware energy minimization scheduling algorithm for heterogeneous multiprocessor environments

SummaryHeterogeneous multiprocessor systems are now widely used in industry by providing high performance and high concurrency. However, with the increasing number of computational nodes, it leads to a dramatic increase in energy consumption of heterogeneous multiprocessor systems. Most of the current research has been conducted to reduce the energy consumption by reducing the processor frequency and extending the task execution time, but these measures often lead to a significant decrease in system reliability. This article addresses the problem of energy‐aware task scheduling in the case of distributed computing systems with deadline and reliability constraints. First, a time and reliability allocation model is built to assign the deadline and reliability constraints to each task, which ensures fairness among tasks. Then, a three‐stage scheduling algorithm is proposed to minimize the system energy consumption. The static energy consumption is minimized by shutting down the inefficient processors. The dynamic energy consumption of the system is reduced by distributing tasks as evenly as possible on each processor through a task redistribution strategy. Finally, experimental results on real scientific workflows and randomly generated graphs show that the proposed algorithm outperforms other algorithms in terms of energy reduction.

Robust massive parallel information processing environments in biology and medicine: case study

The current frontiers in the description and simulation of advanced physical and biological phenomena observed within all scientific disciplines are pointing toward the importance of the development of robust mathematical descriptions that are error resilient. Complexity research is lacking deeper knowledge of the design methodology of processes that are capable to recreate the robustness, which is going to be studied on massive-parallel computations (MPCs) implemented by cellular automata (CA). A simple, two-state cellular automaton having an extremely simple updating rule, which was created by John H. Conway called the ’Game of Life’ (GoL) is applied to simulate and logic gate using emergents. This is followed by simulations of a robust, generalized GoL, which works with nine states instead of two, that is called R-GoL (open-source). extra states enable higher intercellular communication. The logic gate is simulated by the GoL. It is destroyed by injection of random faulty evaluations with even the smallest probability. The simulations of the R-GoL are initiated with random values. several types of emergent structures, which are robust to injection of random errors, are observed for different setups of the R-GoL rule. The GoL is not robust. The R-GoL is capable to create and maintain oscillating, emergent structures that are robust under constant injection of random, faulty evaluations with up to 1% of errors. The R-GoL express long-range synchronization, which is together with robustness facilitated by designed intercellular communication.

Vector Operations for Accelerating Expensive Bayesian Computations – A Tutorial Guide

Many applications in Bayesian statistics are extremely computationally intensive. However, they are often inherently parallel, making them prime targets for modern massively parallel processors. Multi-core and distributed computing is widely applied in the Bayesian community, however, very little attention has been given to fine-grain parallelisation using single instruction multiple data (SIMD) operations that are available on most modern CPUs. In this work, we practically demonstrate, using standard programming libraries, the utility of the SIMD approach for several topical Bayesian applications. Using the C programming language, we show that SIMD can improve the single-core floating point arithmetic performance by up to a factor of 6× compared scalar C code and more than 25× compared with optimised R code. Such improvements are multiplicative to any gains achieved through multi-core processing. We illustrate the potential of SIMD for accelerating Bayesian computations and provide the reader with techniques for exploiting modern massively parallel processing environments.

Stride: A flexible software platform for high-performance ultrasound computed tomography

Background and objective: Advanced ultrasound computed tomography techniques like full-waveform inversion are mathematically complex and orders of magnitude more computationally expensive than conventional ultrasound imaging methods. This computational and algorithmic complexity, and a lack of open-source libraries in this field, represent a barrier preventing the generalised adoption of these techniques, slowing the pace of research, and hindering reproducibility. Consequently, we have developed Stride, an open-source Python library for the solution of large-scale ultrasound tomography problems.Methods: On one hand, Stride provides high-level interfaces and tools for expressing the types of optimisation problems encountered in medical ultrasound tomography. On the other, these high-level abstractions seamlessly integrate with high-performance wave-equation solvers and with scalable parallelisation routines. The wave-equation solvers are generated automatically using Devito, a domain-specific language, and the parallelisation routines are provided through the custom actor-based library Mosaic.Results: We demonstrate the modelling accuracy achieved by our wave-equation solvers through a comparison (1) with analytical solutions for a homogeneous medium, and (2) with state-of-the-art modelling software applied to a high-contrast, complex skull section. Additionally, we show through a series of examples how Stride can handle realistic numerical and experimental tomographic problems, in 2D and 3D, and how it can scale robustly from a local multi-processing environment to a multi-node high-performance cluster.Conclusions: Stride enables researchers to rapidly and intuitively develop new imaging algorithms and to explore novel physics without sacrificing performance and scalability. This will lead to faster scientific progress in this field and will significantly ease clinical translation.

Parallel Processes Planning using Computer Supporting System

Planning the structure of operation taking into account the dynamical contemporary market is one of the most serious challenges for industry in the XXI century. It is particularly complex and complicated especially for the multi-process scheduling that is characteristic for modern large industrial plants. The method allowing solving the mentioned problem should be based on the analysis of constraints as any manageable system is limited in achieving its goals by a number of constraints. The most important of these is resource availability. Taking into account the critical resources chain it is possible to create complex schedules in multi-process environments. In the paper is presented analysis of results, obtained for such conditions, using original application adding the process of scheduling.

Performance Optimization of Sorting Algorithm using Processor Affinity in Java

Background: The processor affinity library in Java can switch ON all the processing cores available in a multi-processing environment. Using this feature will enable concurrent programmers to fully utilize the benefits of processing power available in multi-core processors. Therefore, this study aims to use processor affinity to develop four different frameworks that could optimize the efficiency of quick sorting algorithms on multi-core platforms. Methods: Benchmarking is the method used to carry out all the experiments and test the developed algorithm's efficiencies using all four frameworks. An Octa-core machine with eight (8) processing cores was used to develop and run the algorithms to measure their running times and compare their performances. JDK 12.0 is the version of Java used for development. An array data structure containing One Million Elements (1,000,000) was used as the preferred data structure. Results: The results obtained show that processor affinity can improve the performance of quick sorting algorithms by ensuring no processing core is idled during the computation of results. The results also show that processor affinity and Work-Stealing-Action perform similar functions by ensuring that available cores in a machine are fully utilized to handle tasks and improve performance. It was further found that the algorithm developed using the Executor Services framework outperformed all the three other frameworks implemented using Naïve, Fork-Join, and Sequential implementations. Conclusion: It was concluded that processor affinity improves the performances of all the four different implementations of quick sorts. It was also concluded that in the fork-join framework, Work-Stealing-Action performed by the worker-threads has an effect similar to that of affinity by ensuring that all the processing cores are fully utilized to improve performance. Further investigations can be carried out using machines with more processing cores in their CPU using a different data structure such as a Link List Array of the same or different data size to see whether the same or different conclusions can be drawn.