Multilevel Voltage Source Research Articles

Smart Control Solution for Single-Stage Solar PV Systems

Solar photovoltaic (PV) systems unpredictable characteristics and tight grid-codes demand power electronic-based energy conversion devices. Hence, as the power levels generated by the solar PV systems rise, multi-level voltage source converters (VSC) and their control mechanisms become more necessary for effective energy conversion. Continuous control set model predictive control (CCS-MPC) is a class of predictive control approach that has emerged recently for the applications of power converters and energy conversion systems. In this paper, an artificial neural network (ANN) based controller for single-stage grid-connected PV is implemented. The CCS-MPC is used as an expert / a teacher to generate the data required for off-line training of the neural network controller. After the off-line training, the trained ANN can fully control the inverter’s output voltage and track the maximum power point (MPP) without the need for MPC during testing. The proposed control technique is assessed under various operating conditions. Based on the results obtained, it is observed that the proposed techniques offer improved objective tracking and comparative dynamic response with respect to the classical approaches.

Design and validation of a multilevel voltage source inverter based on modular H-bridge cells

Generation, power conversion and subsequent integration of renewable energy generation systems, such as solar photovoltaic or wind, require an efficient power conversion system that can provide sufficient quality energy according to technical standards (e.g. IEEE 519–2022). In this context, this paper focuses on the analysis, design and experimental validation of a multilevel voltage source inverter (VSI) scheme based on H-bridge cells with a modular and scalable structure for its application in power electronic converter circuits. The designed and assembled experimental setup is a versatile platform for testing experimentally varied control strategies and power converter configurations, such as the number of levels (3, 5, 7 levels) and phases (single-phase or three-phase). Therefore, the hardware design process proposed for the H-bridge cell and the measurement and conditioning circuits for voltage and current signals necessary for implementing the control algorithms are explained in detail. Moreover, a quantitative analysis of the operation of the design was carried out from measurements made with the experimental platform to verify its correct operation. Among the analysed parameters, the generated harmonics level stands out, quantified by calculating the total harmonic distortion and the mean square error between the reference signals and the measured values.

Comparative analysis of multilevel voltage source inverters used to supply a five-phase Permanent Magnet Synchronous Motor

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A Fusion Topology of Higher Efficiency and Lower Capacity Hybrid Parallel Multi-Converters for Power Quality Compensation

In high-power applications, different multilevel voltage source converter (VSC) topologies are usually applied. The hybrid parallel multiconverters, which is a combination of multiactive and hybrid VSCs connecting in parallel, can be a promising solution in a high-power grid. In this article, the fusion VSC topology concept is proposed in which fusion VSC takes the advantages of both active (inductive coupling) VSC and hybrid (capacitive coupling) VSC. It corresponds to overcoming the insufficient-capacity problems when active VSCs are employed alone and vice versa. This article proposes fusion active power filter topology by combing active and hybrid power VSC through their equivalent model for power quality compensation. With the proposed VSC's equivalent model, it can reduce the converter rating by 17%–80% compared with the conventional approaches. Additionally, the corresponding control algorithm is proposed for the FAPF for power quality compensation. Finally, the simulation and real-time digital simulator hardware-in-the-loop experimental results of the proposed FAPF topology are given to demonstrate the validity and effectiveness for reducing its capacity and power loss compared with the conventional multi-VSC in power quality compensation.

Selective Harmonic Elimination of a Multilevel Voltage Source Inverter Using Whale Optimization Algorithm

In this paper, the whale optimization algorithm is proposed for harmonics elimination in a cascaded multilevel inverter. In selective harmonic elimination pulse width modulation, the selected low-order harmonics are eliminated by solving nonlinear equations, while the fundamental of output waveform is adjusted to a desired value. In this paper, whale optimization algorithm is applied to a 7-level cascaded H-bridge inverter to solve the equations. Also, it was validated by experimental results, since this algorithm has an ability to search in entire solution space, the probability of catching a global best solution is very high. This method has higher accuracy and probability of convergence than the genetic algorithm. The optimization and comparison of whale optimization algorithm and genetic algorithm have been done in MATLAB software. A 1 kW prototype of this converter is built and the results are presented. The effectiveness and the theoretical analysis of this method are verified through both simulation and experimental results

A Systematic Study on the Harmonic Overlap Effects for DC/AC Converters under Low Switching Frequency Modulation

In most high power industrial applications, the low switching frequency modulations (LSFM) are usually implemented to reduce power loss and heat dissipation pressure. However, there are some unexpected influences caused by the low order harmonic sinusoidal pulse width modulation (SPWM), such as the imbalanced submodule power in cascaded half-bridge inverter (CHB) and limited output power capability in H-bridge neutral-point-clamped (HNPC) converter. This paper starts by generalizing the basic characteristic of two-level SPWM, then deeply investigates the influences of low-frequency modulation on the operation of the circuits. They are classified into three mechanisms and generally named as harmonic overlap effect (HOE). The corresponding solutions to copy with the mechanisms are proposed and verified in some topologies through high-power simulations in simulations. In addition, a comprehensive summary of the influences and solutions of these effects on typical high power converters is drawn. The design rules of the modulation schemes for multilevel voltage source converters (VSCs) at low switching frequency are also proposed.

WITHDRAWN: Design and analysis of ML-VSC based SMES with improved power quality features

Now a days there is high demand of power. In the process of supplying the required amount of power, the power system become complex and transient stability has become a major challenging. In order to progress transient stability there are various measures identical as discrete control of excitation systems, ML-VSC (Multi Level Voltage Source Converter) based SMES (Super Conducting Magnetic Energy Storage System) etc., in that ML-VSC based Super Conducting Magnetic Energy Storage System has acknowledged much responsiveness in the power system application. As the inertia is little, if some distraction at load side will disturb frequency of a system and it will create electromechanical oscillations. The SMES controller which is using as a fast acting storage system, it be capable of supervise the electromechanical oscillations immediately and helps in plummeting the frequency deviancies underneath the limits. This paper is apprehensive by way of the control of ML-VSC based SMES for effective assistance of active and reactive power of a power system. Super Conducting Magnetic Energy Storage System is a device comprises of a superconducting coil, wherein ac power is converted into dc by ac-dc power conversion system and it will be stored in superconducting coil as magnetic energy, it can be charged and discharged very rapidly during the ac-dc conversion because of its high storage efficiency and fast response. Here, the ML (Multilevel inverter) provides more than two voltage levels due to this the harmonic contents are reduced and desired output voltage waveform can be obtained. The time domain parameters of the SMES are controlled by PID controller with the help of PID controller technique.

Combined use of the nearest vector selecting technique and low-frequency quarter-wave symmetric space vector PWM in control of three-phase multilevel voltage source inverter

The paper offers the problem’s solution of the three-phase multilevel voltage source inverter (MLVSI) control with low dynamic losses in power semiconductor switches. The proposed technique is based on a single approach that operates with values of the integer and fractional parts of the relative values of the reference delta voltages, and it allows combining the use of the space-vector control, choosing the nearest vector (SVC), with the low-frequency space-vector pulse-width modulation with the quarter-wave symmetry of the output voltages (QWS-SVPWM). Depending on the impedance kind of a generalized load, the integrated voltage harmonics factor (weighted THD) of the appropriate order is being minimized by applying one of the two mentioned modulation methods (SVC or QWS-SVPWM) for a current range of voltage amplitude modulation index. Like its components, the combined algorithm is suitable for MLVSI of any circuit configuration and any number of equal output voltage levels.

Space‐vector current control of cascaded half‐bridge three‐phase three‐wire voltage source inverter

Current controllers for voltage source inverters give better control of current waveform and also provide compensation for load transients and non-linearities. Despite the increasing employment of multilevel inverters in high-power medium voltage applications and its superior performance compared to two-level inverters, the extension of hysteresis current controllers to multilevel voltage source inverters is much less established. In this study, a current error space vector-based hysteresis controller is implemented on a three-phase cascaded half-bridge voltage source inverter. The vector-based method measures the current error in a space vector form and keeps the error within the assigned tolerance region. It has been observed from the simulation tests and experimental verifications that the implemented current regulator maintains the load current as close as possible to the set reference current with a significantly minimised error. Another attractive feature in the implemented closed-loop current controller is that the number of voltage levels is maintained as the output of the inverter with a fast dynamic response.

A study on performances of carrier-based pulse-width modulation techniques for three-phase three-level t-type neutral-point-clamped inverter under switch-open-circuit fault on two neutral-point-connected legs

Multilevel voltage source inverters (VSIs) have been used for several decades thanks to their advantages compared with traditional two level VSI. Among various types of multilevel configuration, the T-type neutral-point-clamped VSI (3L TNPC VSI or 333-type VSI) has gained the attention in recent years. Due to the unique structure, the 333-type VSI has critical issues in reliability in operation such as switch-open-circuit (SOC) and switch-short-circuit (SSC), which lead to several unrequired issues, for instance, reduction of system performance, distorted and unbalanced output voltages and currents, or triggering the protection circuits. In some applications, the amplitude reduction and harmonics distortion of output voltages in SOC faults are not acceptable. Therefore, it is necessary to develop a pulse-width modulation (PWM) algorithm for 333-type VSI working under SOC fault which guarantees the desired output fundamental component voltage. The simultaneous SOC fault on two neutral-point-connected legs in the 333-type VSI may cause a large reduction in the output voltage. Under this circumstance, the 333-type VSI becomes an asymmetrical one called 322-type VSI. Certain studies regarding to the operation of 333-type VSI under SOC faults have been carried out. However, these studies require more semiconductor devices in order to create a redundant switching circuit. This leads to higher system cost with reduced inverter effieciency due to the additional loss. In this study, two carrier-based pulse-width modulation (CBPWM) techniques, i.e. 322-sinusoidal PWM (322-SPWM) and 322-medium offset CBPWM (322-MOCBPWM) are proposed for 322-type VSI. The proposed techniques are firstly simulated in MATLAB/Simulink and then implemented on a hardware setup. Performances of the proposed techniques are evaluated in terms of total harmonic distortion (THD) and weighted-THD (WTHD) of output voltages. Simulation results show that considering the worst output voltage under SOC fault, vBC, the proposed 322-SPWM technique could improve the THD by 40% and the WTHD by 94% compared with the uncompensated case with m=0.8. The corresponding results of 322-MOCBPWM technique are 42% and 96%, respectively. Characteristics of THD and WTHD values are also presented for demonstration the effectiveness of the proposed algorithm.

Model-Free Predictive Current Control for Multilevel Voltage Source Inverters

This article proposes a generalization of the model-free predictive current controller (MFPCC) for multilevel voltage source inverters (VSIs). MFPCC is an alternative to mitigate the parameter sensitivity faced by model-based PCC (MPCC), but it requires a constant update of the stored current variations (CVs) associated with each VSI state to provide a prediction, which results in a satisfactory closed-loop response. When a multilevel VSI is considered the number of states increases, which results in a decrease of the CV update rate, since only one state can be updated at each sample. To solve this issue, the extended adjacent state scheme is used to reduce the possible number of solution candidates and then a controlled CV is used to compensate the updated CV. Simulation and experimental results obtained with a sampling rate of 5 kHz show that the proposed MFPCC exhibits performance similar to the one of MPCC for nominal parameters. However, a better current response is obtained in the case of the load parameter mismatch, especially at steady state.

The Alternate Arm Converter “Extended-Overlap” Mode: AC Faults

This article presents ac fault ride-through strategies for the “extended-overlap” operating mode of the alternate arm converter (AAC), which is a type of modular multilevel voltage source converter that has been proposed for HVdc transmission applications. The AAC offers several benefits over the half-bridge modular multilevel converter, such as requiring fewer submodules with a smaller capacitance and providing dc fault ride-through capability. Novel symmetrical and asymmetrical ac fault ride-through strategies are described and these strategies are experimentally validated by using a small scale prototype.

A Reduced Switch Five-Level VSI for High-Performance Vector Controlled PMSM Drive

This work presents the strategy for vector control of permanent magnet synchronous motor (PMSM) drive fed with a three-phase multi-level voltage source inverter for high performance. In the present work, the traditional 2-level inverter is replaced with a novel reduced switch 5-level inverter, and comparative analysis is done. The implementation of the five-level inverter improves the torque, stator current, and mechanical dynamics of the drive. Here PWM technique is employed to generate the gate pulses for switching devices in a planned sequence to obtain five-level output voltage. The 12 operating modes are defined for reduced switch 5-level inverter that produces voltages as 0, ±2Vdc/3, ±Vdc, ±4Vdc/3 with reduced total harmonics distortion (THD). The close-loop vector control of PMSM with developed five-level inverter is implemented to improve the performance of drive in terms of rise time, settling time, stator current harmonics. The overall system is developed in MATLAB/Simulink and investigations are done in different input command and loading conditions. An extensive simulation study and analysis of results reveal the potential of the present work. This work mainly focuses on the reduction of motor electromagnetic torque pulsations along with improved speed response.

Enhancement of cascaded multi-level VSC STATCOM performance using ANN in the presence of faults

A system can be disturbed in terms of stability when connected to a number of loads at the distribution ends or when subjected to faults. To reverse such systems to a stable state, FACTS devices such as static synchronous compensator (STATCOM) are used. In this paper, a cascaded multi-level voltage source converter (VSC) STATCOM was designed and implemented with a novel space vector pulse width modulation (SVPWM) scheme. Artificial neural network (ANN) controller was used instead of instead of Proportional-Integral (PI) controller in the proposed scheme to improve the response time (RT) and performance of STATCOM in terms of power factor (PF) and voltage amplitude during periods of voltage sag. During the implementation, two fault sources (single-line-to-ground (SLG) and line-to- line (LL) faults) were used to create voltage sag. STATCOM was subjected to performance evaluation in the presence of these disturbances via MATLAB simulation in IEEE 3-bus system. The outcome of the simulation studies showed the ANN controller to perform better than PI as it was able to rapidly recover voltage value (<1 cycle) with unity PF.

Performance comparison of series and parallel damped LCL filters using 5-level voltage source converter

The high harmonic content produced by conventional converters has resulted in the increased system size and cost, due to the need for large-sized low-order harmonic passive filters and cooling system requirement. Given that, multilevel inverters and special modulation techniques were developed to suppress or eliminate the low-frequency harmonics and the left behind high-order ones are eliminated using a high-frequency small-sized filter. Hence, this paper designs and compares the total harmonic distortion (THD) and efficiency values of three set of filters, namely LCL filter, LCL with series and parallel resistance on a novel five-level multilevel voltage source inverter topology. The novelty lies with the proposed inverter, which, apart from using a single direct current source, it can extend it elimination capability beyond the normal five level using the concept of multiple switching per step and an optimised selective harmonic elimination pulse width modulation. The converter can eliminate eleven lower-order odd nontriplen harmonics, hence making the 37th harmonic at 1.85 kHz to be the first dominant harmonic. At 2-kW loading, two of the filters have THD below 5%, therefore satisfying the IEEE 519 standard. The parallel resistance damped filter (LCL-P-R) has less THD value but poor efficiency due to the resistance introduced into the circuit. The study was carried out using PSIM and MATLAB software.

A Three-Phase Hybrid Cascaded Multilevel Inverter with Multicarrier PWM technique

Multilevel voltage source inverter has drawn tremendous importance in the area of high power applications. This paper presents a three-phase modified hybrid cascaded multilevel inverter incorporating a standard three-leg inverter with H-bridge cells in series with each leg. The switching scheme with the multicarrier level shifted sinusoidal PWM is implemented to produce the five-level voltage at the output. Simulations have been performed using MATLAB to study voltage levels, modulation scheme, and THD. Finally, the possibilities of future works are addressed.

Comparative Study on Performance Improvement of SPWM/THIPWM based DCMLI Grid Connected DFIG

Multi-level voltage source converter is integrated in various fields in renewable energy power generation technologies such as wind and solar sources for applications that need higher voltage and higher power. In wind power generation market, doubly fed induction generator (DFIG) based on wind power generation is now the leading technology as they are economically feasible, they do offer a variable speed and efficient substitute to the fossil fuel. This paper proposes a DFIG based on a back to back diode clamped multilevel converter systems (DCMLI) fired comparatively by sinusoidal pulse width modulation (SPWM) and third harmonic injection pulse width modulation (THIPWM) techniques. By using these technologies, the DFIG performance is compared for different wind speeds under normal operation condition. The proposed approach shows that the DCMLI systems generate a near sinusoidal voltage with lower values in total harmonic distortion (THD) thus, upgrading the power quality that is produced by DFIG. Lastly, the variation of frequency of induced rotor voltage and the active power flow due to the wind speed changes when the rotor speed changes from super synchronous to sub synchronous speeds is investigated.

Performance Comparison of Five-Phase Three-Level NPC to Five-Phase Two-Level VSI

A multiphase multilevel voltage source inverter (VSI) offers excellent advantages over the traditional three-phase counterparts. Low-order harmonic components with reduced switching losses, lower common-mode voltage (CMV), and the optimum use of dc-link voltage constitute the critical performance indicators for high-efficiency VSI evaluation. Various approaches for carrier-based pulsewidth modulation (CPWM) generation are available in the literature along with space vector pulsewidth modulation (SVPWM) techniques. Comparative analysis shows that the majority of SVPWM strategies have enormous potential than CPWM to achieve the aforementioned performance indices. The main objective of this article is to provide a common platform for the selection of available five-phase VSIs for various industrial applications. For this, a comparative study is carried out to examine in various aspects like CMV, voltage and current total harmonic distortion (THD), switching, conduction losses, and efficiency under the steady-state and dynamic loading conditions over a wide range of the modulation index. It is observed that the five-phase three-level neutral-point-clamped (NPC) VSI has better performance than the five-phase two-level VSI. Experimental results are provided to verify the performance indices of both topologies at steady-state and dynamic conditions.

Selective harmonic elimination (SHE) based 3-phase multilevel voltage source inverter (VSI) for standalone applications

The breakthroughs in power electronics semiconductor technology have led to the raised in popularity of Multi-level Voltage Source Inverters, which is the reason industries and researchers are relentlessly working towards extending it to both medium and high-power applications. Consequently, this paper presents a modified Selective Harmonic Elimination Pulse Width Modulation (SHE-PWM) controlled three-phase 5-level Multi-level Inverter (MLI) topology. The work is an extension of a single-phase topology proposed by the authors. The uniqueness of the proposed topology is that it comprises of six Cascaded H-bridge modules (two modules per phase) that are powered through a single direct current (DC) source, hence eliminating the need for multiple DC sources. In addition, conventional 5-level MLI has two switching angles (n = 2), which restricts its harmonic elimination capability to one (n = 1) lower order harmonics. This study removes that restriction by utilising the concept of multiple switching per step, resulting in the superimposing of 12 notches (n = 12) on the output voltage at the 3/9 distribution ratio. With the fundamental switching SHE-PWM, twelve non-linear, transcendental equations are generated, and they are optimally solved using the Hybrid Coded Genetic Algorithm to eliminate 11 (n − 1) lower-order harmonics. The low-switching frequency results in less electromagnetic interference as well as reduced switching loss, which improves the overall inverter efficiency. The topology has less output Total Harmonics Distortion, fewer components, and lower weight and cost than conventional topologies. The circuit was designed and validated through simulations performed in PSIM software.

Review of Multilevel Voltage Source Inverter Topologies and Analysis of Harmonics Distortions in FC-MLI

We review the most common topology of multi-level inverters. As is known, the conventional inverters are utilized to create an alternating current (AC) source from a direct current (DC) source. The two-level inverter provides various output voltages [(Vdc/2) and (−Vdc/2)] of the load. It is a successive method, but it makes the harmonic distortion of the output side, Electromagnetic interference (EMI), and high dv/dt. We solve this problem by constructing the sinusoidal voltage waveform. This is achieved by a “multilevel inverter” (MLI). The multilevel inverter creates the output voltage with multiple DC voltages as inputs. Many voltage levels are combined to produce a smoother waveform. During the last decade, the multilevel inverter has become very popular in medium and high-power applications with some advantages, such as the reduced power dissipation of switching elements, low harmonics, and low EMIs. We introduce the information about several multilevel inverters such as the diode-clamped multilevel inverter (DC-MLI), cascaded H-bridge multilevel inverter (CHB-MLI), and flying-capacitor multilevel inverter (FC-MLI) with Power systems CAD (PSCAD) simulation. It is shown that THD is 28.88% in three level FC-MLI while THD is 18.56% in five level topology. Therefore, we can decrease the total harmonic distortion adopting the higher-level topology.