Multilevel Topology Research Articles

SINGLE-DC-SOURCE QUASI-Z-SOURCE CASCADED MULTILEVEL INVERTER WITH ACTIVE POWER SHARING

This paper proposes a novel cascaded multilevel topology, named Single-dc-Source quasi-Z Source Cascade Multilevel Inverter. This inverter has the ability to provide independent regulation of the dc bus voltage of each H-bridge, ensuring real power balancing and true symmetric to the multilevel waveforms. In addition, the Single-dc-Source quasi-Z Source Cascade Multilevel Inverter allows operating with a single low power PV array. This paper provides a detailed analysis of operation with a design methodology for the hardware, as well as modeling and controller design. Simulation results are provided to verify the proposed system operation and control strategy.

Asymmetric 49-Levels Cascaded MPUC Multilevel Inverter Fed by a Single DC Source

This work studies a multilevel inverter topology composed of two MPUC7s cascaded connected fed by only one dc power source by using a high-frequency link (HFL). This topology can provide up to 49 voltage levels by using four asymmetrical dc links, 12 power switches, and an HFL system. The dc link with higher voltage is fed by a dc source. The other dc links, with lower voltage, are supplied from the main one via high-frequency transformer with unidirectional power flow that processes up to 33% of the load power. A nearest-level control, analysis of power distribution among each dc link, and the HFL system design are presented in detail. Besides, comparisons with other multilevel topologies using HFL are carried out. Experimental results are presented to validate the theoretical studies.

On the design of mechanical heterogeneous specimens using multilevel topology optimization

Sheet metal forming processes are of upmost importance in many industrial applications. Their virtualization has been addressed by numerical simulation software. However, realistic results can only be obtained when an accurate reproduction of the material behavior is achieved. This is where material characterization and model calibration procedures play a key role. The conventional procedure is time-consuming and expensive and needs to be overcome. To improve the efficiency of this process, heterogeneous mechanical tests have been proposed. Due to their rich mechanical fields and the emergence of full-field measurement techniques, a high diversity of valuable information about the material behavior can be extracted with a single test. A systematic design approach has not been found yet since the majority of the newly proposed mechanical tests have been developed based on the empirical knowledge or trial and error. However, this work aims at filling this gap by proposing a new methodology to design optimal mechanical tests. A bi-level design optimization problem is established to find out the optimal geometry for the specimen that presents the highest heterogeneity of stress states. The specimen design process gathers the design by topology optimization and the compliant mechanisms’ theory, which are responsible for the highly heterogeneous displacement fields. The test setup is also optimized, considering the use of universal testing machines. Several numerical designs are analyzed based on their ability to induce several stress states and their feasibility. The most suitable test configuration is chosen and analyzed with Digital Image Correlation (DIC) using synthetic images. An evaluation of the test in an elastoplasticity framework is also performed. The effectiveness of the methodology in designing tests with valuable information for the material characterization process is validated.

Performance Evaluation and Techno-Economic Analysis of Modular Multilevel STATCOM with Hybrid Storage for Renewable Power Dominated Grids

The increase in renewable power injection into the existing ac network has affected voltage and frequency stability. This creates the need for both active and reactive power support systems at the Common Coupling Point (CCP) of a renewable power generating station. Considering the aforesaid requirements, a distinct configuration using a Modular Multilevel Converter (MMC) with Hybrid Storage System (HSS) has been recommended in this paper. These kinds of systems are termed as “Statcom Embedded with Storage System”(SESS). The SESS helps to pump invariable power into the grid by absorbing fluctuating components of active power generated by the renewable power generating plant. Apart from this, provides ancillary services at CCP like, voltage regulation and compensation for negative sequence currents, and ride through capability during the faults in the ac system are to be provided by SESS. The required control methods to operate the proposed configuration for the aforesaid necessities are discussed in this manuscript. The economic advantage of the proposed configuration in comparison to other multilevel topologies has been identified using a techno-economic study and it is presented. The competency of the recommended configuration for SESS application along with its control is verified through PSCAD/EMTDC simulation and the results show its efficacy.

Novel discontinuous PWM for dc-link voltage balancing of multilevel quasi-nested topologies

ABSTRACT The use of multilevel power converters for its application in high demanding industrial processes and grid connected renewable energy conversion systems has nowadays become the most suitable solution. The main advantages of these converter configurations are: reduction in the blocking voltage stress, lower harmonic ratings, smaller filters for output and input stages. The proposed quasi-nested topology merges the advantages of the classical multilevel topologies, such as the NPC and ANPC configurations, addressing less active switching devices, lower blocking voltage stress. A novel discontinuous modulation technique, with controlled discontinuous gain, is implemented in order to deal with the dc-link voltage unbalance. Simulation and experimental validation results in a scaled-down power 1,5 kW three-phase converter prototype under different operational conditions using different modulation index are presented. The proposed four-level converter topology allows generating an additional output voltage level with the same semiconductor count as conventional three-level inverters such as NPC and ANPC with superior waveform quality, with a THDv reduction of 34.54% in comparison to the clamped inverters. Experimental tests carried out in a 1.5 kW setup verify the feasibility of the proposed topology and the developed discontinuous modulation scheme, to achieve dc-link voltage compensation.

PV Integrated Multifunctional Off-Board EV Charger With Improved Grid Power Quality

This article presents an adaptive notch filter (ANF) based efficient control algorithm for multifunctional grid connected solar photovoltaic (PV) powered electric vehicle (EV) charger to power the EV batteries and simultaneously improve the grid power quality. Furthermore, a multilevel topology is adopted for the grid-facing converter to improve output voltage quality. The ANF accurately estimates the fundamental EV current and grid voltage for generating pure sinusoidal reference current and synchronizing voltage template, respectively. The ANF-based voltage template estimator precisely estimates in-phase and in-quadrature synchronizing voltage templates compared to a phase-locked loop and second-order generalized integrator during nonideal grid voltage conditions. The charger is designed to operate in grid connected operation (GCO) and standalone operation (SO) to optimize the PV generation. In GCO, the charger provides grid current harmonic compensation and reactive power support to the grid. Furthermore, it offers backup power to the residential load during an emergency. The charger control algorithm also includes a grid synchronization technique based on phase error minimization to achieve a smooth and seamless transition from SO to GCO and vice versa. The effectiveness of the proposed control algorithm is validated in a 12.6-kVA <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> -board EV charger laboratory prototype. The obtained results verify the charger performance complies with IEEE 1547 standard.

DC-Link Neutral Point Control for 3L-NPC Converters Utilizing Selective Harmonic Elimination–PWM

Selective harmonic elimination–pulsewidth modulation (SHE–PWM) is a modulation technique widely used to improve the efficiency and harmonic content in medium-voltage high-power converters. Among these converters, the three-level neutral-point-clamped (3L-NPC) converter is one of the most utilized topologies. However, the 3L-NPC converter requires a proper balancing of dc-link capacitor voltages. This article presents a control technique, based on pulse shifting method, to regulate the neutral point voltage when SHE-PWM is utilized. The proposed technique performs well with any power factor and it can also be directly applied to T-type converters and easily extrapolated to other multilevel topologies. The proposed method is experimentally validated in a scaled-down power converter and a full-scale medium-voltage 3L-NPC converter.

Circulating Current Suppression in DAB Assisted Low-Voltage Variable Frequency MMC

Modularity, scalability, and efficiency of modular multilevel converters (MMCs) have shown clear advantages among the multilevel topologies, being ideal for medium and high voltage applications. However, they require several control loops in order to achieve multivariable control, where the main challenge is the voltage balancing of the submodules capacitors, usually requiring large capacitances. To extend the MMC application to the low-voltage range, the arm link enhanced MMC solves this issues by adding dual active bridges (DABs) between the upper and lower submodules (SMs) in order to transfer the power ripple between each other. This allows the use of small capacitances in the SMs and greatly reduces the control and measurement complexity, while maintaining a low voltage ripple in an extended output frequency range. In this scenario, this work studies how the circulating current suppression control (CCSC) affects the DABs power transfer, as well as the overall effects in the converter and its performance. Considering the variable frequency operation of the converter, the effects at low and high frequencies are analyzed, as well as the consequences in the DABs high-frequency transformers. The main objective is to determine whether it is convenient or not to enable the circulating current suppression depending on the operation conditions of the converter.

A New Modeling and Control Scheme for Cascaded Split-Source Converter Cells

Cascaded split-source inverter (CSSI) is a new single-stage modular multilevel topology. Each cell of this converter converts dc to ac power in the buck or boost operation mode without any additional power switch. This article develops a design method based on a detailed model for CSSI. This model shows that energy storage elements experience double-fundamental frequency ripples besides high-frequency ones. It accurately calculates voltage gains and capacitor voltage and inductor current ripples. On the other hand, common carrier-based multilevel modulations have been modified in terms of both reference and carrier signals to control the inverter under symmetric and asymmetric conditions. With proposed simple modulations, the cell inductor is charged with the constant duty cycle. Also, the reverse recovery of diodes occurs in the minimum level of input current once per switching cycle and output power is distributed equally between cells. These characteristics reduce power losses, the input inductance of each cell, and the complexity of the system model. By phase-shifted pulsewidth modulation (PWM), the output voltage harmonics of three-cell CSSI are centralized around multiples of the triple switching frequency. In this method, high-frequency ripples on the network impedance are one-third of those in level-shifted PWM. Also, CSSI has been compared with cascaded multilevel inverters with voltage boosting ability and other SSI-based multilevel topologies. Validity of operation principles, mathematical relations, and modulation schemes are verified through simulation and experimental results.

A Five-Level Nested Diode-Clamped Converter for Medium-Voltage Applications

This article presents a new three-phase five-level converter topology with a single dc source. The proposed topology combines the features of the conventional flying capacitor multicell and diode-clamped multilevel topologies. An important advantage of the proposed topology is the reduced volt-ampere, and hence, the volume, of the flying capacitors in its structure while keeping the same voltage blocking capability for semiconductor switches. The appropriate modulation strategy along with the flying capacitor voltage balancing technique is presented. To show the advantages of the proposed converter, different performance criteria such as switch count and rating, volt-ampere of flying capacitors, component cost, losses, and switching frequency are compared with some existing five-level topologies with a single dc source and the same voltage rating of switches. The results indicate that the proposed structure is superior to other five-level converters from different standpoints of the performance criteria. Simulation results are shown to verify the converter operation and its performance. The validity of the theoretical analysis is verified by experimentation on a scaled-down prototype system.

Implementation and Analysis of Grey Wolf Optimization Technique for PV Fed Switched Coupled Inductor Quasi Z-Source Cascaded Multilevel Inverter

A new type of photovoltaic (PV) fed cascaded multilevel topology is proposed in this work. The proposed topology is an integration of Switched Coupled Inductor (SCL) quasi Z-Source network (qZS) to Cascaded Multilevel Inverter (CMI). In order to extract maximum power with high tracking efficiency under various conditions from the PV system, Grey Wolf Optimization (GWO) algorithm is implemented in the proposed topology. The main aspect of GWO is to control the duty cycle through iterations for better performance. The GWO has the potential to achieve global peak under any climatic conditions. The iterations are done in three steps mainly hunting, encircling for prey and, attacking prey. To prove the effectiveness of GWO, its performance is compared with traditional Perturb &amp; Observe (P &amp; O) MPPT technique. The proposed technique is implemented, tested for various Partial Shading Conditions (PSC) using MATLAB/ Simulink results are verified with experimental set up of 1 kW by utilizing My-RIO embedded FPGA processor board.

Voltage Analysis of Multilevel Diode Clamped Inverter with SVPWM Technique

The quantity of direct current voltage steps that are needed by the inverter connect is characterized based on the quantity of levels in an inverter bridge to accomplish a specific electric potential at its output. The best technique for settling the voltages applied to the gadgets is by clipping therefore utilizing dc voltage sources or huge capacitors, which momentarily act as voltage sources. Multilevel topology dependent on specific guideline, the input voltages applied to the devices can be controlled and restricted. A benefit of multilevel inverters contrasted that the yield voltage spectra are altogether better performed. Henceforth, the yield potentials can be sifted with more modest responsive segments, and furthermore, the exchanging frequencies of the gadgets can be diminished. Two advantages with the capacity to manage higher voltage levels present on multilevel inverters is a vital job in the field of high quality produced wave form applications. In this paper, the three levels Diode-clamped inverter incorporates displaying, recreation, plan execution, and examination. Space Vector Balance will be utilized, to dispose of the basic mode electric potentials by exchanging between the various states.

Boosting Nine-Level Operation of Seven-Level Hybrid-Clamped (7L-HC) Converter

Seven-level hybrid clamped topology, which is a multilevel topology proposed in recent years, is a promising solution for motor drive systems due to its capability to operate in a wide frequency range. This letter enhances its favorable features by enabling the boosting nine-level operation, i.e., producing nine output voltage levels; wherein the peak phase voltage can be four-third of the dc voltage. This operation method does not require modifications to the topology or change in the voltage stress on capacitors and power switches. Instead, only minor modifications to the modulation are applied. This leads to the increase of the ac voltage range without any cost on hardware. This method shows great potential in speed expansion of the motor drive system. Experimental results validate the feasibility and performance of this method. This letter is accompanied by a video file demonstrating the speed expansion performance of the proposed method.

Model-Based Predictive Control with Graph Theory Approach Applied to Multilevel Back-to-Back Cascaded H-Bridge Converters

The multilevel back-to-back cascaded H-bridge converter (CHB-B2B) presents a significantly reduced components per level in comparison to other classical back-to-back multilevel topologies. However, this advantage cannot be fulfilled because of the several internal short circuits presented in the CHB-B2B when a conventional PWM modulation is applied. To solve this issue, a powerful math tool known as graph theory emerges as a solution for defining the converter switching matrix to be used with an appropriate control strategy, such as the model-based predictive control (MPC). Therefore, this research paper proposes a MPC with the graph theory approach applied to CHB-B2B which capable of not only eliminating the short circuit stages, but also exploring all the switching states remaining without losing the converter controllability and power quality. To demonstrate the proposed strategy applicability, the MPC with graph theory approach is tested in four different types of SST configurations, input-parallel output-parallel (IPOP), input-parallel output series (IPOS), input-series output-parallel (ISOP), and input-series output series (ISOS), attending distribution grids with different voltage and power levels. Real-time experimental results obtained in a hardware-in-the-loop (HIL) platform demonstrate the proposed strategy’s effectiveness, such as DC-link voltages regulation, multilevel voltage synthesis, and currents with reduced harmonic content.

A Generalized Real-Time Computation Method With Dual-Sampling Mode to Eliminate the Computation Delay in Digitally Controlled Inverters

Digital control has been widely adopted in grid-connected inverters, thanks to easy implementation of complicated control algorithms. However, the digital control delay deteriorates the performance of the inverter and tends to cause system instability. In this article, the generating mechanism of the digital control delay, including computation delay and pulsewidth modulation delay, is analyzed. Then, a generalized real-time computation method with a dual-sampling mode is derived to directly eliminate the computation delay, based on two- and multilevel phase-legs. On this basis, the operation principle of the method for three- and single-phase inverters with two- and multilevel topologies is elaborated. Finally, the experimental and simulation results from three- and single-phase <i>LCL</i>-type grid-connected inverters are provided to verify the effectiveness of the proposed method.

DTC Control of Induction Motor Drive Using Multilevel Inverter

Multilevel inverter (MLI) is commonly utilized in direct torque control (DTC) for medium and high-power applications. The additional voltage vectors generated by MLI can be manipulated to achieve the optimal selection for the inverter switching states in the DTC control systems. A Novel multilevel inverter structure is proposed for Direct Torque Control (DTC) Control of induction motor drive. It is shown that the multilevel topology presents enough degrees of freedom to control both electromagnetic torque and stator flux with very low ripple and high speed dynamic response on other side. Simulation results, obtained with five-level inverter and seven-level inverter, are presented and compared. This analysis shows that feeding electrical drive with multilevel inverters can greatly improve the drive performance.

Grid integration of three phase solar powered fault‐tolerant cascaded H‐bridge inverter

AbstractGrid integration of solar photovoltaic (PV) systems is becoming popular recently due to the merits of stable support to conventional grid, limiting global warming and reduced emissions. However, maintaining capacitor voltage balancing, unity power factor, sinusoidal grid current, and harmonic profile improvement are challenging tasks owing to change in irradiation conditions. Multilevel inverters (MLI) in grid‐connected systems will enhance the system's power quality in terms of voltage and current total harmonic distortion (THD). One of the most promising multilevel topologies for renewable energy applications is the cascaded H‐bridge (CHB) inverter. Since CHB inverters include many components, they have a higher risk of failure, lowering system reliability. Due to the change in irradiation condition, the voltage across the corresponding DC link capacitor may vary. Therefore, the DC‐link capacitor balancing is mandatory and done by an individual control scheme. This paper presents a highly reliable, robust, and modular solar PV‐fed fault‐tolerant CHB inverter with an individual voltage/current control strategy for grid integration. Higher reliability and modularity, power factor correction, and harmonic profile improvement are the main objectives of the proposed system. The proposed system has been simulated in MATLAB/Simulink and validated with experimental results on the developed prototype for different irradiation conditions.

Novel Optimal Design of Arm Inductor for Modular Multilevel Converter Fed High Power Medium Voltage Drive

— The modular multilevel converter (MMC) is considered to be emerging multilevel topology for medium to high power applications due to its modularity and highly reliable structure. However, large submodule (SM) capacitor voltage ripple and higher circulating current during variable frequency operation is the major drawback of the MMC. In the literature, higher-order harmonic elimination technique is presented to reduce SM capacitor voltage ripple and circulating current. In this article, effect of lower-order harmonics on circulating current is investigated. The effect of second-order fundamental frequency current harmonic I2f on arm inductor is analyzed. Based on detailed analysis, an optimal design method for selection of arm inductor is proposed. Proposed optimal design is capable of reducing the circulating current under variable frequency range as well as SM capacitor voltage ripple remains under specified limit during entire variable frequency operation. A detailed MATLAB model of MMC fed high power medium voltage drive is developed. Experimental setup is also developed to check the effectiveness of proposed optimal design method. Reduction in circulating current and control of SM capacitor voltage ripple is observed for entire range of frequency.

Z-source reversing voltage multilevel inverter for photovoltaic applications with inherent voltage balancing

Photovoltaic (PV) inverters have been widely used in solar energy to change the direct current (DC) voltage of PV panels to the grid alternating current (AC) voltage. They are comprised of DC-DC section for maximum power point tracking (MPPT) and DC-AC part to provide required output AC voltage. This paper provides a unique configuration that integrates both sections in one part. A Z-source multilevel inverter is proposed based on Z-source networks and reversing voltage (RV) multilevel inverter. The Z-source network can be used to increase the level of the input voltages and MPPT as well. In addition, the prop used topology uses multilevel topology to accommodate more DC inputs and benefit from features of multilevel level inverters in AC output. Moreover, using Z-source network can minimize equated monthly installment (EMI) due to the lower stress on the semiconductor switches. Finally, a seven level topology is designed and simulated to show the performance of proposed topology.

A Simple Virtual-Vector-Based PWM Formulation for Multilevel Three-Phase Neutral-Point-Clamped DC–AC Converters including the Overmodulation Region

Neutral-point-clamped (NPC) power conversion topologies are among the most popular multilevel topologies in current industrial products and in industrial and academic research. The proper operation of multilevel three-phase NPC DC–AC converters requires the use of specific pulse-width modulation (PWM) strategies that maintain the DC-link capacitor voltage balance and concurrently optimize various performance factors such as efficiency and harmonic distortion. Although several such PWM strategies have been proposed in the literature, their formulation is often complex and/or covers only particular cases and operating conditions. This manuscript presents a simple formulation of the original virtual-vector-based PWM, which enables capacitor voltage balance in every switching cycle. The formulation is presented, for the general case, in terms of basic phase voltage modulating signals, with no reference to space vectors, involving any number of levels and for any operating conditions, including the overmodulation region. The equivalence of the presented formulation to the original PWM strategy is demonstrated through simulation under different scenarios and operating conditions. Thus, this manuscript offers in a one-stop source a simple, effective, and comprehensive PWM formulation to operate multilevel three-phase NPC DC–AC converters with any number of levels in any operating condition.