Multilevel PWM Strategy Research Articles

The dual three-phase open-end stator windings permanent magnet synchronous machine fed by four voltage source inverters

In this paper, the mathematical model in Park reference frame of the dual open-end stator winding salient-pole permanent magnet synchronous machine is described. The proposed machine is supplied by its four voltage source inverters based on PWM technique. Then, the feeding of this machine by four two-level cascaded inverters is presented. A multilevel PWM strategy is carried out to control the cascaded inverters. The simulation analyses using the THD voltage, THD stator current and the torque undulation are presented and show the benefits for the proposed machine.

The dual three-phase open-end stator windings permanent magnet synchronous machine fed by four voltage source inverters

In this paper, the mathematical model in Park reference frame of the dual open-end stator winding salient-pole permanent magnet synchronous machine is described. The proposed machine is supplied by its four voltage source inverters based on PWM technique. Then, the feeding of this machine by four two-level cascaded inverters is presented. A multilevel PWM strategy is carried out to control the cascaded inverters. The simulation analyses using the THD voltage, THD stator current and the torque undulation are presented and show the benefits for the proposed machine.

A multilevel PWM strategy suitable for high‐voltage motor direct drive systems with consideration of the adverse effect of dead time

AbstractRecently, high‐voltage motor direct drive systems have been put to practical use, and various multilevel PWM strategies have also been proposed. This paper describes a multilevel PWM strategy [our group calls it the Carrier Phase Selection Method (CPS)] that has the lowest line voltage harmonic distortion in order to prevent the degradation of high‐voltage motor winding insulations. This method takes the adverse effect of dead time into consideration, and it controls the shift direction of a carrier phase. Therefore, a favorable output waveform without instantaneous voltage surges is achieved even if the line voltage level changes. Moreover, the switching transitions across all switching devices are well‐balanced, so the utilization of inverter unit cells is equalized. This is an important factor when designing the entire system. Based on simulation and experimental results, it is shown that this CPS method is particularly effective in high‐voltage motor direct drive systems. © 2008 Wiley Periodicals, Inc. Electr Eng Jpn, 165(2): 77–88, 2008; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/eej.20474

A Multilevel PWM Strategy suitable for High-Voltage Motor Direct Drive Systems in Consideration of the Adverse Effect of a Deadtime

A Multilevel PWM Strategy suitable for High-Voltage Motor Direct Drive Systems in Consideration of the Adverse Effect of a Deadtime

Analysis of common mode voltage-"neutral shift" in medium voltage PWM adjustable speed drive (MV-ASD) systems

In this paper, an analysis of common mode voltage or "neutral lift" in the new emerging voltage source inverter type medium voltage adjustable speed drive (MV-ASD) systems is presented. Both cascaded multilevel (CML) inverter and 3-level NPC inverter topologies are analyzed. An equivalent circuit model to determine the common mode voltage stress is presented. Analysis and simulation results are discussed and worst case common mode voltage excursion is computed for an example 800 hp, 4160 V MV-ASD. It is shown that certain system components are excessively stressed and in the MV-ASD system these data are particularly useful in specifying system components and for proper design of the system. Possible effects of common mode voltage and its dv/dt on medium voltage motor bearings are discussed. A new multilevel PWM strategy is introduced which results in zero common-mode voltage. Simulation results are shown to illustrate the effectiveness of these schemes. Finally, experimental results from a 800 hp, 4160 V, MV-ASD system are presented.

Multilevel PWM methods at low modulation indices

When utilized at low amplitude modulation indices, existing multilevel carrier-based PWM strategies have no special provisions for this operating region, and several levels of the inverter go unused. This paper proposes some novel multilevel PWM strategies to take advantage of the multiple levels in both a diode-clamped inverter and a cascaded H-bridges inverter by utilizing all of the levels in the inverter even at low modulation indices. Simulation results show what effects the different strategies have on the active device utilization. A prototype 6-level diode-clamped inverter and an 11-level cascaded H-bridges inverter have been built and controlled with the novel PWM strategies proposed in this paper.