This paper explores the issue of balancing the intermediate inductor currents of a multilevel current source inverter (CSI). The paper begins by identifying that single-phase multicell CSIs and flying capacitor voltage source inverters (FCVSIs) form a topological dual pair. This allows the established understanding of the natural balance process of the FCVSI intermediate capacitor voltages to suggest that the intermediate inductor currents of the CSI should also settle to their target balance values when phase-shifted carrier (PSC) pulse width modulation (PWM) is used. This concept is confirmed by full switched simulations. Next, an analytic model is developed to explore the dynamic response and robustness of the balancing process, using a double Fourier series representation of the converter switching signals to linearise a nonlinear transient circuit model. The model is verified against simulations, and predicts that the resistance of the intermediate inductors can perturb the steady state balancing point. The model further predicts that the resistance of the inductance must be small compared to the load resistance to minimize this effect. Results obtained on a five-level experimental CSI precisely match the theoretical model and hence support these conclusions.