Cascaded Multilevel Inverter Research Articles

Design Analysis and Development of Inverter Topologies for Industries

This paper presents the most common inverter topologies and its design, analysis and development schemes. The main objective is to design and compare the three topologies of multilevel inverter for industries. These three topologies are mostly effectively and efficiently for quality improvement of the output voltage waveform of inverter. Photovoltaic (PV) and wind power generation (WPG) i.e. the renewable energy systems are playing a vital role in energy production. But, solar photovoltaic power (PV) has the prospective to develop one of the foremost suppliers to the future electricity supply. Therefore, Low voltage solar PV systems need a high voltage expansion converter for units of grid connection with multilevel inverter. The multilevel inverter topologies are being used in applications of medium and high power such as an active power filter, FACTS devices and a machine current due to their various merits in terms of power supplies low power dissipation, low harmonic distortion in voltage output waveform. Therefore, the simulation of multilevel inverter topologies is done and finalized that cascade multilevel inverter topology is more suitable as compared to other two by using MATLAB/SIMULINK.

Extended Phase Opposition Disposition Pulse Width Modulation Technique for Cascaded 27 Level Inverter

The Extended Phase Opposition Disposition PWM (EPODPWM) technique has been applied in the two-level inverters successfully, but it is impossible to apply directly the EPODPWM technique to multilevel inverters. This paper proposes two kinds of EPODPWM techniques suitable for a cascaded multilevel inverter, analyzes the control strategy with the EPODPWM and obtains the design of its parameters. The simulation results show the proposed EPODPWM methods can get high magnitudes of the output fundamental frequency component, low total harmonic distortion and simpler digital implementation.

A Novel Concept for Three-Phase Cascaded Multilevel Inverter Topologies

One of the key challenges in multilevel inverters (MLIs) design is to reduce the number of components used in the implementation while maximising the number of output voltage levels. This paper proposes a new concept that facilitates a device count reduction technique of existing cascaded MLIs. Moreover, the proposed concept can be utilised to extend existing single phase cascaded MLI topologies to three-phase structure without tripling the number of semiconductor components and input dc-supplies as per the current practice. The new generalized concept involves two stages; namely, cascaded stage and phase generator stage. The phase generator stage is a combination of a conventional three-phase two level inverter and three bi-directional switches while the cascaded stage can employ any existing cascaded topology. A laboratory prototype model is built and extensive experimental analyses are conducted to validate the feasibility of the proposed cascaded MLI concept.

THD Minimization Based Asymmetrical Cascade Multilevel Inverter with Different Modulation Techniques

THD Minimization Based Asymmetrical Cascade Multilevel Inverter with Different Modulation Techniques

Application of ABC algorithm for selective harmonic elimination switching pattern of cascade multilevel inverter with unequal DC sources

Application of ABC algorithm for selective harmonic elimination switching pattern of cascade multilevel inverter with unequal DC sources

Design of New Cascaded Multilevel Inverter with Symmetrical DC-voltage Source

Design of New Cascaded Multilevel Inverter with Symmetrical DC-voltage Source

Возможности применения мощных симметричных многоуровневых каскадных инверторов в электроприводе вентиляторами главного проветривания

Возможности применения мощных симметричных многоуровневых каскадных инверторов в электроприводе вентиляторами главного проветривания

ROAC: Recursive optimization of Ant colony assisted perturb and observe for a photo voltaic resonant boost converter

This paper introduces a new Hybrid MPPT algorithm by combining new Ant Colony Optimization (ACO) and Perturb & Observe (P&O) method. The maximum power from a solar panel is extracted from all conditions like solar irradiance variation, temperature variation and partial shading conditions. Ant Colony Optimization (ACO) method tracks maximum power from panel under all variations and Perturb & Observe algorithm used in final stage to achieve faster MPP tracking. This proposed algorithm is implemented both in Simulink and hardware. A 5kWp grid connected solar photovoltaic power plant is designed and implemented for the 15 stage 31 level Cascaded Multilevel Inverter (CMLI) with the Selective harmonic elimination algorithm. From the analysis of results, it is found that the proposed hybrid MPPT provides higher MPP tracking performance in any weather conditions compared with other MPPT algorithms

Harmonic Minimization in a Modified Cascaded Multilevel Inverter for Islanded Microgrid using two Switching Techniques

Harmonic Minimization in a Modified Cascaded Multilevel Inverter for Islanded Microgrid using two Switching Techniques

New Cascaded Multilevel Inverter by Using Capacitor Based Basic Units with the Capability of Charge Balance Control Method

In this paper, two new cascaded multilevel inverters based on new capacitor basic unit are proposed. In the proposed topologies, the same numbers of dc voltage source and capacitor are used that lead to decrease the number of required insulated dc voltage sources. In order to generate all positive and negative voltage levels (even and odd) at the output three different algorithms to determine the magnitude of voltage sources are proposed. Minimum number of used power electronic devices and lower amount of blocked voltage that is made by power switches are two main advantages of the proposed topologies. These features lead to decrease the installation space and total cost of the inverter. These are obtained by comparing the proposed topologies with several capacitor based cascaded multilevel inverters. In addition, in order to balance the used capacitors’ voltage, a new charge balance control method is proposed. Finally, the correct performance of the proposed cascaded inverter is reconfirmed through experimental and simulation results on a five-level proposed inverter in EMTDC/PSCAD software program.

A comparative Analysis of Symmetrical and Asymmetrical Cascaded Multilevel Inverter Having Reduced Number of Switches and DC Sources

<p>As multilevel inverters are gaining increasing importance .New topologies are being proposed in order to achieve large number of levels in output voltage. A simplified MLI topology has been presented with both symmetrical and asymmetrical configurations. This paper represents a comprehensive analysis of above mentioned topology with FFT analysis,switching and conduction losses of the inverter.Hence efficiency at different carrier frequencies has been calculated successfully.Results are verified with simulation studies.Multilevel inverters are currently considered as a better industrial solution for high dynamic performance and power-quality demanding applications, covering a wide power range.</p>

Power Quality Improvement in a Cascaded Multilevel Inverter Interfaced Grid Connected System Using a Modified Inductive–Capacitive–Inductive Filter with Reduced Power Loss and Improved Harmonic Attenuation

Recently, multilevel inverters are more researched due to the advantages they offer over conventional voltage source inverters in grid connected applications. Passive filters are connected at the output of these inverters to produce sinusoidal waveforms with reduced harmonics and to satisfy grid interconnection standard requirements. This work proposes a new passive filter topology for a pulse width modulated five-level cascaded inverter interfaced grid connected system. The proposed passive filter inserts an additional resistance-capacitance branch in parallel to the filter capacitor of the traditional inductive–capacitive–inductive filter in addition to a resistance in series with it to reduce damping power loss. It can attenuate the switching frequency harmonic current components much better than the traditional filter while maintaining the same overall inductance, reduced capacitance and resistance values. The basic parameter design procedure and an approach to discover the parameters of the proposed filter is introduced. Further, a novel methodology using Particle Swarm Optimization (PSO) is recommended to guarantee minimum damping loss while ensuring reduced peak during resonance. In addition, PSO algorithm is newly employed in this work to maximize harmonic attenuation in and around the switching frequency on the premise of allowable values of filter inductance and capacitance. A comparative discussion considering traditional passive filters and the proposed filter is presented and evaluated through experiments conducted on a 110 V, 1 kW five-level grid connected inverter. The modulation algorithm for the multilevel inverter is implemented using a SPARTAN 6-XC6SLX25 Field Programmable Gate Array (FPGA) processor. The analysis shows that the proposed filter not only provides decreased damping power loss but also is capable of providing considerable harmonic ripple reduction in the high frequency band, improved output waveforms and lesser Total Harmonic Distortion (THD) with improved power quality for the multilevel inverter based grid connected system.

Energy Balance Control of a Cascaded Multilevel Inverter for Standalone Solar Photovoltaic Applications

This paper presents a clock phase-shifting (CPS) energy balance control (EBC) method for cascaded half-bridge multilevel inverters in standalone solar photovoltaic (PV) systems. It is based on the conservation of energy in each cascaded unit. By shifting the phase of the clock pulse of each cascaded unit, a staircase-like output voltage is obtained. The CPS EBC not only regulates the staircase-like output voltage of the cascaded multilevel inverters accurately under static conditions, but also suppresses the fluctuations of DC sources and improves its dynamic responses to load steps. Thus, the problems existing in solar PV systems using the cascaded multilevel inverters are avoided. Results obtained from simulations and experiments are presented to verify the feasibility and advantages of the proposed control method.

Neoteric Hybrid Multilevel Cascade Inverter Based on Low Switch Numbers Along with Low Voltage Stress: Design, Analysis, Verification

Abstract: With the purpose of rein in the high voltage of flexible power systems, renovation and amendment of multi-level structures aimed at acquisition of high quality voltage is certainly required. In this regard, robust topology must be occupied that encompass the maximum output voltage levels along with minimum of switch number, of course, with taking into account of Peak Inverse Voltage (PIV). In this paper, a neoteric high-performance multilevel cascaded inverter is suggested up to the problem of repetitive output levels to be unraveled and also number of output voltage levels to be maximized. It has been constructed by series-connected multilevel inverters blocks and three-level inverter. The simulation results along with experimental results extracted by manufactured prototype have transparently approved high efficiency of proposed inverter as well as its feasibility. Apart from above, new mathematical approach has been presented to calculate and define the DC voltage sources magnitudes in asymmetric converter.

Cascaded Multilevel Inverters Using Proposed Series Sub-multilevel Basic Blocks with Reduced Switching Devices

In this paper, a novel configuration of the cascaded multilevel inverters using series connection of new sub-multilevel basic blocks is presented. The basic structure of the proposed sub-multilevel inverter is made of three isolated batteries and eight unidirectional power switches. Hereby, by changing the polarity of one of such batteries and two power switches, two different modules of sub-multilevel inverters can be extracted that each of them is able to be incorporated into two different cascaded structures as the series basic blocks. Contemporary, to determine the suitable magnitudes of the integrated batteries, two different algorithms for each topology along with their relevant mathematical analysis have been also given. In this study, a complete comparison between the proposed topologies and several recently presented structures has been conducted. The compiled comparisons can prove the fact that both the proposed cascaded inverters are capable of generating a higher number of output voltage levels with less number of switching counts. Other advantages of these structures are reduction of voltage sources numbers, DC sources variety, value of total blocking voltage, and also conducting losses. In order to demonstrate the correct operation of the proposed structures and presented algorithms, some experimental results will be also shown.

Control Strategy for a Modified Cascade Multilevel Inverter With Dual DC Source for Enhanced Drivetrain Operation

This paper presents a new control strategy for a modified cascade multilevel inverter used in drivetrain operations. The proposed inverter is a three-phase bridge with its dc link fed by a dc source (battery), and each phase series-connected to an H-bridge fed with a floating dc source (ultracapacitor). To exploit the potentials of the inverter for enhanced drivetrain performance, a sophisticated yet efficient modulation method is proposed to optimize energy transfer between the dc sources and with the load (induction motor) during typical operations, and to minimize switching losses and harmonics distortion. Detailed analysis of the proposed control method is presented, which is supported by experimental verifications.

An Induction‐Motor Control Method for Minimization of Capacitor‐Voltage Fluctuations in a Modular Multilevel DSCC Inverter: Its Applications to a Quadratic‐Torque Load

SummaryThis paper aims at minimizing capacitor‐voltage fluctuations inherent in a modular multilevel cascade inverter based on double‐star chopper cell (DSCC) or a modular multilevel DSCC inverter. The inverter can drive an induction motor loaded with a quadratic‐torque load. Both theoretical analysis and numerical calculation reveal that the voltage fluctuations can be minimized when the ratio of a magnetizing‐current component with respect to a torque‐current component in the motor current is set to unity, regardless of the motor mechanical speed. A three‐phase DSCC inverter is designed and constructed to drive a 380‐V, 15‐kW, 50‐Hz, four‐pole, induction motor loaded with a quadratic torque that is proportional to a square of the motor mechanical speed. Experimental results confirm the validity of the theoretical and numerical calculations.

A New Structure of Quasi Z-Source-Based Cascaded Multilevel Inverter

In this paper, a new topology for cascaded multilevel inverters based on quasi Z-source converter is proposed. In the proposed topology, the magnitude of output voltage is not limited to dc voltage source, while the magnitude of output voltage of conventional cascaded multilevel inverters is limited to dc voltage source. In the proposed topology, the magnitude of output voltage can be increased by controlling the duty cycle of shoot-through (ST) state, transformer turn ratio, and the number of switched inductors in the Z-source network. As a result, there is no need for extra dc–dc converter. In the proposed topology, the total harmonic distortion (THD) is decreased in comparison with the conventional Z-source inverters. The proposed topology directly delivers power from a power source to load. In addition, in the proposed basic unit, higher voltage gain is achieved in higher modulation index which is an advantage for the proposed base unit. The performance of the proposed topology is verified by the experimental results of five-level single-phase inverter.

Analysis of the single-phase photovoltaic grid-connected cascaded H-bridge multilevel inverters

Analysis of the single-phase photovoltaic grid-connected cascaded H-bridge multilevel inverters

On Optimization of Manufacturing of Transistors in Hybrid Cascaded Multilevel Inverter to Increase Their Density

On Optimization of Manufacturing of Transistors in Hybrid Cascaded Multilevel Inverter to Increase Their Density