Multifunctional Electronic Devices Research Articles

Luminescent CdSe Superstructures: A Nanocluster Superlattice and a Nanoporous Crystal.

Superstructures, combining nanoscopic constituents into micrometer-size assemblies, have a great potential for utilization of the size-dependent quantum-confinement properties in multifunctional electronic and optoelectronic devices. Two diverse superstructures of nanoscopic CdSe were prepared using solvothermal conversion of the same cadmium selenophenolate precursor (Me4N)2[Cd(SePh)4]: the first is a superlattice of monodisperse [Cd54Se32(SePh)48(dmf)4]4- nanoclusters; the second is a unique porous CdSe crystal. Nanoclusters were crystallized as cubic crystals (≤0.5 mm in size) after solvothermal treatment at 200 °C in DMF. UV-vis absorption and PLE spectra of the reported nanoclusters are consistent with previously established trends for the known families of tetrahedral CdSe frameworks. In contrast to these, results of PL spectra are rather unexpected, as distinct room temperature emission is observed both in solution and in the solid state. The porous CdSe crystals were isolated as red hexagonal prisms (≤70 μm in size) via solvothermal treatment under similar conditions but with the addition of an alkylammonium salt. The presence of a three-dimensional CdSe network having a coherent crystalline structure inside hexagonal prisms was concluded based on powder X-ray diffraction, selected area electron diffraction and electron microscopy imaging. Self-assembly via oriented attachment of crystalline nanoparticles is discussed as the most probable mechanism of formation.

Optimal sensor deployment to increase the security of the maximal breach path in border surveillance

Wireless Sensor Networks (WSN) are based on the collaborative effort of a large number of sensors which are low-cost, low-power, multi-functional small electronic devices. They provide a distributed sensing and monitoring environment for the area of interest and hence are used for applications such as environmental monitoring, border surveillance, and target tracking. In this work we study optimal deployment of WSNs for border surveillance using a static Stackelberg game frame and propose a bilevel optimization model for the optimal deployment of a heterogenous WSN so that the security of the area under consideration is increased as much as possible. There are two players in this game: defender and intruder. The defender is the leader and tries to determine the best sensor locations so as to maximize the security measured in terms of coverage intensity at discretized points in the area. The well-informed intruder assuming the role of the follower is capable of destroying some of the sensors so as to identify the maximal breach path, which represents the safest path from his perspective and thus increases the chance of being undetected by the sensors. This new approach results in a mixed-integer linear bilevel programming formulation that is difficult to solve exactly. Therefore, we propose three Tabu search heuristics and realize computational experiments on a large set of test instances in order to assess their performances.

Wafer scale integration of reduced graphene oxide by novel laser processing at room temperature in air

Physical properties of reduced graphene oxide (rGO) strongly depend on the ratio of sp2 to sp3 hybridized carbon atoms, the presence of different functional groups, and the characteristics of the substrates. This research for the very first time illustrates successful wafer scale integration of 2D rGO with Cu/TiN/Si, employing pulsed laser deposition followed by laser annealing of carbon-doped copper layers using nanosecond excimer lasers. The XRD, SEM, and Raman spectroscopy measurements indicate the presence of large area rGO onto Si having Raman active vibrational modes: D, G, and 2D. A high resolution SEM depicts the morphology and formation of rGO from zone-refined carbon formed after nanosecond laser annealing. Temperature-dependent resistance data of rGO thin films follow the Efros-Shklovskii variable range hopping (VRH) model in the low-temperature region and Arrhenius conduction in the high-temperature regime. The photoluminescence spectra also reveal a less intense and broader blue fluorescence spectra, indicating the presence of miniature sized sp2 domains in the near vicinity of π* electronic states which favor the VRH transport phenomena. This wafer scale integration of rGO with Si employing a laser annealing technique will be useful for multifunctional integrated electronic devices and will open a new frontier for further extensive research in these functionalized 2D materials.

Kevlar‐Based Supercapacitor Fibers with Conformal Pseudocapacitive Metal Oxide and Metal Formed by ALD

Kevlar, poly(p‐phenylene terephthalamide) (PPTA), yarns are modified for use as flexible supercapacitor electrodes by coating them with a nanometer‐scale film of conductive platinum metal and pseudocapacitive V2O5 using atomic layer deposition (ALD). The PPTA yarns are incorporated into a solid‐state supercapacitor through the use of a polyvinyl alcohol/lithium chloride gel electrolyte. Pseudocapacitive V2O5 films 11 nm thick provide up to a 5× increase in areal capacitance (18.4 mF cm−2) over the Pt‐only‐coated PPTA. Thicker films of V2O5 and wrapping the electrodes together into a single yarn result in decreased areal capacitance due to charge‐transfer limitations. The work describes how ALD metal and metal oxide can be combined to add double layer and pseudocapacitive charge storage to mechanically robust PPTA creating unique multifunctional electronic fabric device systems.

Proton conducting sodium-alginate-gated oxide thin-film transistors with varying device structure

The solution-processed sodium-alginate (SA) films, with nanoporous/nanochannel microstructure, possess a total absorbed water number of 10420 ± 395 molecules per square nanometer, which gives rise to a high proton conductivity of 4.0 × 10−4 S cm−1. When SA films used as gate dielectric in the thin film transistors, electric-double-layer (EDL) would be formed whether at the dielectric/channel or at dielectric/gate electrode interface, leading to a huge specific capacitance and low operating voltage for the TFTs. More importantly, due to the three-dimensional proton conducting characteristic, one can design the TFT device structure expediently from conventional vertical gate coupling to laterally coplanar gate coupling structure. The TFTs with ease-design device layout have potential applications in multifunctional electronic devices.

Gate-tunable rectification inversion and photovoltaic detection in graphene/WSe2 heterostructures

We studied electrical transport properties including gate-tunable rectification inversion and polarity inversion, in atomically thin graphene/WSe2 heterojunctions. Such engrossing characteristics are attributed to the gate tunable mismatch of Fermi levels of graphene and WSe2. Also, such atomically thin heterostructure shows excellent performances on photodetection. The responsivity of 66.2 mA W−1 (without bias voltage) and 350 A W−1 (with 1 V bias voltage) can be reached. What is more, the devices show great external quantum efficiency of 800%, high detectivity of 1013 cm Hz1/2/W, and fast response time of 30 μs. Our study reveals that vertical stacking of 2D materials has great potential for multifunctional electronic and optoelectronic device applications in the future.

Interface modulated currents in periodically proton exchanged Mg doped lithium niobate

Conductivity in Mg doped lithium niobate (Mg:LN) plays a key role in the reduction of photorefraction and is therefore widely exploited in optical devices. However, charge transport through Mg:LN and across interfaces such as electrodes also yields potential electronic applications in devices with switchable conductivity states. Furthermore, the introduction of proton exchanged (PE) phases in Mg:LN enhances ionic conductivity, thus providing tailorability of conduction mechanisms and functionality dependent on sample composition. To facilitate the construction and design of such multifunctional electronic devices based on periodically PE Mg:LN or similar ferroelectric semiconductors, fundamental understanding of charge transport in these materials, as well as the impact of internal and external interfaces, is essential. In order to gain insight into polarization and interface dependent conductivity due to band bending, UV illumination, and chemical reactivity, wedge shaped samples consisting of polar oriented Mg:LN and PE phases were investigated using conductive atomic force microscopy. In Mg:LN, three conductivity states (on/off/transient) were observed under UV illumination, controllable by the polarity of the sample and the externally applied electric field. Measurements of currents originating from electrochemical reactions at the metal electrode–PE phase interfaces demonstrate a memresistive and rectifying capability of the PE phase. Furthermore, internal interfaces such as domain walls and Mg:LN–PE phase boundaries were found to play a major role in the accumulation of charge carriers due to polarization gradients, which can lead to increased currents. The insight gained from these findings yield the potential for multifunctional applications such as switchable UV sensitive micro- and nanoelectronic devices and bistable memristors.

Monolithically Integrated Metal/Semiconductor Tunnel Junction Nanowire Light-Emitting Diodes.

We have demonstrated for the first time an n(++)-GaN/Al/p(++)-GaN backward diode, wherein an epitaxial Al layer serves as the tunnel junction. The resulting p-contact free InGaN/GaN nanowire light-emitting diodes (LEDs) exhibited a low turn-on voltage (∼2.9 V), reduced resistance, and enhanced power, compared to nanowire LEDs without the use of Al tunnel junction or with the incorporation of an n(++)-GaN/p(++)-GaN tunnel junction. This unique Al tunnel junction overcomes some of the critical issues related to conventional GaN-based tunnel junction designs, including stress relaxation, wide depletion region, and light absorption, and holds tremendous promise for realizing low-resistivity, high-brightness III-nitride nanowire LEDs in the visible and deep ultraviolet spectral range. Moreover, the demonstration of monolithic integration of metal and semiconductor nanowire heterojunctions provides a seamless platform for realizing a broad range of multifunctional nanoscale electronic and photonic devices.

Flexible and multifunctional electronics fabricated by a solvent-free and user-friendly method

Pencil-drawn flexible and multifunctional electronic devices have been proven to show potential for various applications including mass and flow sensors, human-motion detection and wearable thermal therapy.

Impact of Top Die Thickness on Cu Pillar Fatigue in Exposed Die 3D Packages

Customer demand for more powerful, faster, and multifunctional electronic devices in lighter and smaller form factors is forcing the electronics industry to expand the edges of the packaging envelope. 3D packaging is a result of such initiatives. Logic and memory dice (or logic and logic dice) are stacked on top of one another and connected through vertical Through Silicon Vias (TSVs). 3D integration has several well documented benefits such as lower power consumption, higher bandwidth, and low latency, to name a few. An added benefit of such a packaging scheme is that it reduces overall package dimensions compared to Multi-Chip Modules (MCMs). However, since the dies are stacked, total package height generally increases. One of the methods to minimize this effect is to use exposed die package construction. In this paper, exposed die 3D packages are examined and challenges associated with stacking thin dies with exposed molding are discussed. Exposed die package construction is of high importance to customers in mobile markets where power requirements and heat generation are low, but package thickness is of utmost importance. Data has been generated using a 20nm CPI (Chip Package Interaction) die which is packaged in a 3D format to study the impact of die stacking along with the presence of TSVs on Ultra Low-k (ULK) dielectrics. ULKs are commonly used in the Back End of Line (BEoL) during Si device wafer fabrication. Via middle TSV integration scheme is used to integrate TSVs in the CPI chip and a face-to-back (F2B) approach is used to assemble the top die on the CPI chiplet. The top die is mechanical in nature with Cu micro pillars and a few metal layers to form daisy chain structures when joined to the backside of TSV die. The CPI wafers are bumped on the frontside using Cu pillars and the wafers are then thinned to ~50um. The TSVs are carefully exposed from the wafer backside and wettable landing pads are patterned on the backside of the thinned wafer so as to align with the Cu micro pillars on the front side of top die. Two different thicknesses of top dies are used to study the impact of top die thickness on overall package warpage and Si-to-substrate interconnect reliability. Assembly is performed by first bonding the front side of TSV CPI chip to a substrate, and then by bonding the front of the top dies to the back of the bottom (TSV) die. The 3D packages were subjected to a variety of package level stresses and the reliability results will be presented. The effect of top die thickness is analyzed using two die thicknesses. As the packages are stressed, it is evident that packages with thinner top die show higher package level warpage and greater Cu pillar fatigue. Various mold compounds are used to improve the package warpage and data will be presented.

Bonding Technologies for 3D integration

Tougher requirements related to the request for smaller, lighter and multi-functional electronic devices impose increased demands on IC packaging. Ever more complex circuitry, fine pitch and micro bump designs and die stacking are examples of how the industry meets these demands. Finding a suitable process technology for 3D packaging can be a challenge. This paper provides information about various connection methods predominantly used in today's 3D packaging. In comprehensive trials, various dies characterized by high bump count (up to 143,000), fine pitch (down to 25 μm) and small bump diameter (down to 13 μm) were placed on a substrate using a semi-automated flip chip bonder. This whitepaper describes test procedures for different 3D integration technologies and presents utilized process parameters and results.

Power system reliability evaluation considering cyber-malfunctions in substations

Protection system failures have been recognized as major causes of expanded outages and thereby affect bulk power system reliability. With the rapid progress of smart grid technologies, legacy protection systems with hardwired architecture are being gradually replaced by computer and communication networks consisting of multi-functional and smart Intelligent Electronic Devices (IEDs). In this paper, a systematic methodology for considering the effect of cyber-malfunctions in substations on power system reliability is proposed by extending the concepts we previously presented. The Roy Billinton Test System (RBTS) is extended to include substation protection systems with modern architecture, which is an important step as a test system like this is currently unavailable. The proposed approach is then demonstrated on this test system. The quantitative relationship between switching time and system-wide energy unavailability is studied. The results of our study clearly indicate the impact of protection system failures on system-wide reliability indices and signify the importance of accelerating line switching process. Furthermore, the overall methodology used in this paper provides a tractable and scalable option for the reliability evaluation of large cyber-physical power systems.

Room-temperature ferroelectricity of SrTiO3 films modulated by cation concentration

The room-temperature ferroelectricity of SrTiO3 is promising for oxide electronic devices controlled by multiple fields. An effective way to control the ferroelectricity is highly demanded. Here, we show that the off-centered antisite-like defects in SrTiO3 films epitaxially grown on Si (001) play the determinative role in the emergence of room-temperature ferroelectricity. The density of these defects changes with the film cation concentration sensitively, resulting in a varied coercive field of the ferroelectric behavior. Consequently, the room-temperature ferroelectricity of SrTiO3 films can be effectively modulated by tuning the temperature of metal sources during the molecular beam epitaxy growth. Such an easy and reliable modulation of the ferroelectricity enables the flexible engineering of multifunctional oxide electronic devices.

Solution-Processed Light-Emitting Dielectric Films and Their Applications in Multifunctional Devices

Ionic materials are used as gate dielectric layers for field-effect transistors (FETs) to reduce working voltage. In this paper, we exhibit a newly synthesized ionic iridium complex with interesting multifunction of both insulativity and light emission.1 Based on this material, a multifunctional device which behaves as a normal transistor at low gate voltage and a controllable light emitting device when the voltage is higher has been successfully fabricated. The device achieves area emission and the brightness can be tuned by three electrodes (gate, source and drain electrodes). Other ionic iridium complexes are also investigated. Results demonstrate that when mixed with some polymer, such as polymethyl methacrylate (PMMA), these complexes can form high performance light-emitting dielectric films as well. Through analysis of energy levels, the working mechanism of the device is proposed. Our study verifies that ionic light-emitting complexes have potential to be used in low-voltage multifunctional electronic devices. This work was financially supported by the National Natural Science Foundation of China (No. 61177023, 51173096, and 61474069). Reference: 1 J. Li, G. Dong*, L. Duan, D. Ma, T. Hu, Y. Zhang, L. Wang and Y. Qiu, RSC Adv. 2014, 4, 51294. Figure 1

Reconfigurable anisotropy and functional transformations withVO2-based metamaterial electric circuits

We demonstrate an innovative multifunctional artificial material that combines exotic metamaterial properties and the environmentally responsive nature of phase change media. The tunable metamaterial is designed with the aid of two interwoven coordinate-transformation equations and implemented with a network of thin film resistors and vanadium dioxide ($VO_{2}$). The strong temperature dependence of $VO_{2}$ electrical conductivity results in a relevant modification of the resistor network behavior, and we provide experimental evidence for a reconfigurable metamaterial electric circuit (MMEC) that not only mimics a continuous medium but is also capable of responding to thermal stimulation through dynamic variation of its spatial anisotropy. Upon external temperature change the overall effective functionality of the material switches between a "truncated-cloak" and "concentrator" for electric currents. Possible applications may include adaptive matching resistor networks, multifunctional electronic devices, and equivalent artificial materials in the magnetic domain. Additionally, the proposed technology could also be relevant for thermal management of integrated circuits

Screen-printed Cu circuit for low-Cost fabrication and its electrochemical migration characteristics.

Circuit pitch has decreased due to the demand for high-performance and multi-functional electronic devices. This trend has increased the risk of short-circuit failures by electrochemical migration (ECM), which is the transportation of ions between the cathode and anode under electrical potential. While direct printing has emerged as a promising technology in terms of manufacturing cost and environmental issues, there are few studies about ECM in directly printed copper (Cu) nanopaste. We prepared screen-printed comb-type Cu patterns on a Si wafer with various sintering temperatures (200, 250, 300, 350 degrees C). ECM characteristics of the printed Cu were determined by water drop testing under various electrical potentials (3, 6, 9 V). The microstructures and the roughness profiles of the pattern surfaces were identified with field emission scanning electron microscopy (FE-SEM) and a three-dimensional surface profiler, respectively. While the electrical potential increased from 3 V to 9 V, the time to failure (ECM time) required for dendrites to grow from the cathode to the adjacent anode decreased by 63.0%. On the other hand, the ECM time increased by 205.1% when the sintering temperature increased from 200 degrees C to 350 degrees C. FE-SEM micrographs and energy-dispersive X-ray spectroscopy analysis of dendrites showed a mixture of trunk and lace types, which were mainly composed of Cu.

Co nanoparticles induced resistive switching and magnetism for the electrochemically deposited polypyrrole composite films.

The resistive switching behavior of Co-nanoparticle-dispersed polypyrrole (PPy) composite films is studied. A novel design method for resistive random access memory (ReRAM) is proposed. The conducting polymer films with metal nanocrystal (NC)-dispersed carbon chains induce the spontaneous oxidization of the conducting polymer at the surface. The resistive switching behavior is achieved by an electric field controlling the oxygen ion mobility between the metal electrode and the conducting polymer film to realize the mutual transition between intrinsic conduction (low resistive state) and oxidized layer conduction (high resistive state). Furthermore, the formation process of intrinsic conductive paths can be effectively controlled in the conducting polymer ReRAM using metal NCs in films because the inner metal NCs induce electric field lines converging around them and the intensity of the electric field at the tip of NCs can greatly exceed that of the other region. Metal NCs can also bring new characteristics for ReRAM, such as magnetism by dispersing magnetic metal NCs in polymer, to obtain multifunctional electronic devices or meet some special purpose in future applications. Our works will enrich the application fields of the electromagnetic PPy composite films and present a novel material for ReRAM devices.

Electron transport in asymmetric biphenyl molecular junctions: effects of conformation and molecule-electrode distance

On the basis of ab-initio calculations, we predict the effect of conformation and molecule-electrode distance on transport properties of asymmetric molecular junctions for different electrode materials M (M = Au, Ag, Cu, and Pt). The asymmetry in these junctions is created by connecting one end of the biphenyl molecule to conjugated double thiol (model A) and single thiol (model B) groups, while the other end to Cu atom. A variety of phenomena viz. rectification, negative differential resistance (NDR), switching has been observed that can be controlled by tailoring the interface state properties through molecular conformation and molecule-electrode distance for various M. These properties are further analyzed by calculating transmission spectra, molecular orbitals, and orbital energy. It is found that Cu electrode shows significantly enhanced rectifying performance with change in torsion angles, as well as with increase in molecule-electrode distances than Au and Ag electrodes. Moreover, Pt electrode manifests distinctive multifunctional behavior combining switch, diode, and NDR. Thus, the Pt electrode is suggested to be a good potential candidate for a novel multifunctional electronic device. Our findings are compared with available experimental and theoretical results.

Advanced TSV Filling Technology for 3-Dimensional Electronic Packaging

The development of 3D integration is necessarily required for high speed, high density, small size, and multi-functional electronic devices. Through silicon via (TSV) technology has been rapidly developed to fulfill the demand of the next generation of multifunctional electronic systems as one of the most alternative applications for 3D packaging. In this study, low cost and high speed molten solder-filling of TSV and bonding process by using micro bump was investigated. Micro bumps were formed with two step, Cu pillar bump and Sn-Ag cap bump by using electroplating. The size of micro-bumps was 10 and 20um and the precise content of the bump was developed with good planarity by adding reflow process. Additionally, the SiC nanoparticle composite solder was fabricated for low CTE filling material. From the results, it is possible that the CTE of composite solder added 1.0wt% SiC nanoparticles had decreased until 15.0ppm/°C. Comparing CTE of pure Sn, which was about 24.0ppm/°C, it was very low CTE and lower then CTE of Cu (16.5ppm/°C). Even if the electrical resistance of nanopowder composite solder is increased, the increasing rate is very slow until 1.0 wt%. However, the resistance changing rate is rapidly increased over the 1.0wt%. From the result, it is expected that nanopowder composite solder can contribute high reliability of molten solder filling TSV.

The impacts of technological change upon narrative

With the onset of the digital age, narrative is morphing; so too, are literacy practices. Texts can be written, read and published on a variety of multi-functional electronic devices. They can also be connected to a vast network of related texts via information and communication technologies. These developments are changing the content, representation and publication of narrative, as well as the experiences associated with reading and writing in both electronic and print media. Ultimately, narrative is becoming more machine-oriented, with readers increasingly operating texts in ways that allow them to navigate fictional spaces, while co-constructing meaning with authors.