Multi-chip-module Laminate Research Articles

Novel polymer–ceramic nanocomposite based on high dielectric constant epoxy formula for embedded capacitor application

AbstractEmbedded capacitor technology can increase silicon packing efficiency, improve electrical performance, and reduce assembly cost compared with traditional discrete capacitor technology. Developing a suitable material that satisfies electrical, reliability, and processing requirements is one of the major challenges of incorporating capacitors into a printed wiring board (PWB). Polymer–ceramic composites have been of great interest as embedded capacitor material because they combine the processability of polymers with the high dielectric constant of ceramics. A novel nanostructure polymer–ceramic composite with a very high dielectric constant (εr ∼110, a new record for the highest reported εr value of a nanocomposite) was developed in this work. A high dielectric constant is obtained by increasing the dielectric constant of the epoxy matrix (εr >6) and using the combination of lead magnesium niobate–lead titanate (PMN–PT)/BaTiO3 as the ceramic filler. This nanocomposite has a low curing temperature (<200°C); thus, it is multichip‐module laminate (MCM‐L) process‐compatible. An embedded capacitor prototype with a capacitance density of 50 nF/cm2 was manufactured using this nanocomposite and spin‐coating technology. The effect of the composite microstructure on the effective dielectric constant was studied. This novel nanocomposite can be used for integral capacitors in PWBs. © 2002 Wiley Periodicals, Inc. J Appl Polym Sci 83: 1084–1090, 2002

A 12-channel multimode fiber-optic 1.0625-Gb/s fiber channel receiver based on COTS devices and MCM-L/COB/BGA packaging

We describe a high-performance, 12-channel multimode fiber-optic receiver array using a combined multichip module laminate (MCM-L), chip-on-board (COB), and ball grid array (BGA) packaging technology. The array operates at a minimum speed of 1.0625 Gb/s per channel with good channel-to-channel uniformity. Each channel has sensitivity better than /spl sim/18 dSm and dynamic range better than 12 dB. Other important characteristics are good uniformity in rise time, fall time, and peak-to-peak output voltage amplitude across all the channels. The results demonstrate this OE receiver array packaging approach is applicable for a wide variety of platforms that have very stringent requirements in high packaging density, high performance, and low cost.

Low-cost large area processing using small area substrates-a novel multitiled palletization concept for MCM-D thin film process

Multichip module-deposited (MCM-D) has been the solution for integrated high density packaging due to its superior line resolution and higher inputs/outputs (I/O) density compared to MCM-C and multichip module-laminate (MCM-L) technologies. However the consumer demand for high performance products at reduced costs is ever increasing, and this trend is expected to continue in the 21st Century. In order to find a low-cost solution for future MCM-D packaging, a novel palletization process which incorporates several tiles (alumina or silicon) on a large carrier glass (pallet) has been established in this study. The multitiling format provides simultaneous processing of several small tiles onto a re-usable CTE matched carrier glass. The tiles are attached to the glass with a low modulus adhesive that can be released at an elevated temperature (/spl sim/450/spl deg/C). The objective of this study is to develop a multitiling process for a 300 mm/spl times/300 mm area that is scalable up to 600 mm/spl times/600 mm format. There are several challenges in realization of the large area palletization approach, such as formulation and qualification of a high temperature reworkable adhesive and minimization of out-of-plane warpage of the tiled assembly. Finite element models for warpage and its validation by shadow moire measurement, formulation of a compliant adhesive for thermal stability up to 400/spl deg/C are reported in previous publications. This paper deals with (1) the validation of the palletization concept on a 300 mm x 300 mm glass with weight restriction below 3 lbs and thickness limitation to <6.25 mm, and (2) qualification of the formulated adhesive through a correlative study on high temperature detachability of the attached tiles, chemical compatibility of the adhesive with acids, bases, and less polar solvents, and interfacial shear strength at the lass/adhesive/tile joints. MCM-D thin film process on the tiled substrates is to be conducted by the member companies of the MCM-D Consortium.

Fabrication of a Fully Integrated Passive Module for Filter Application Using MCM-D Compatible Processes

Integral passive is an emerging technology which is currently perceived as a possible alternative to the discrete passive technology in fulfilling the next generation packaging needs. Although discrete surface mount passive components (resistors, capacitors, and inductors) have been well characterized, the development of integral passive components suitable for co-integration on the board level is relatively recent. Since in some applications the number of passive components can exceed the number and the area of IC chips on a circuit board or in a package, such integration of passive components would be necessary to substantially eliminate part count and reduce device area. To address these issues, integration technology for passive elements in the same manner as for transistors is necessary. In addition, the fabrication sequence of all integral passive components should be mutually compatible for co-integration on the same substrate. In this paper, materials and fabrication issues for passive elements such as resistors (R), capacitors (C), and inductors (L) and the feasibility of integration of these fabricated passive components on glass substrates have been addressed. An active filter circuit has been selected for a case study for R, L, and C co-integration. This passive module contains eleven resistors, four capacitors, and four inductors, and is fabricated using MCM-D (multichip module-deposited) compatible processes. A variety of materials appropriate for fabrication of integral passives in a mutually compatible fashion were investigated, including chromium and nickel-chromium resistors, composites of high dielectric constant materials in epoxies for capacitor dielectrics, and composites of magnetic ferrite particles in polyimides for inductor core and shielding. The fabricated devices showed good agreement between the design values and the corresponding measured values. It is anticipated that some of these materials and fabrication processes can be implemented for the MCM-L (multichip module-laminate) compatible packaging. © 2000 Kluwer Academic Publishers

A low temperature processable ternary gallium alloy for via filling application in microelectronic packaging

A low temperature processable ternary gallium alloy is formulated using an appropriate mixture of liquid gallium metal with nickel and copper powders. The processability of this alloy for room temperature via filling application is demonstrated using a stencil print process. A test vehicle is fabricated using a 0.2 mm thick and 300 mm×300 mm stainless steel (SS) panel with laser-drilled vias. Parylene N is deposited on the SS panel and around the inside via walls in order to electrically isolate via filling material from the body of the SS substrate and also making the SS surface non-conductive. Filled vias were examined for electrical isolation from neighboring vias and for electrical continuity in the thickness direction. Results show that the ternary gallium alloy is a good via filling material and can be applied to vias as small as 0.25 mm. It is believed that this novel alloy can also be used for thin film process on related MCM-L (multichip module-laminate) substrates.