Multithreaded Programs Research Articles

A Process Algebra-Based Detection Model for Multithreaded Programs in Communication System

Concurrent behaviors of multithreaded programs cannot be described effectively by automata-based models. Thus, concurrent program intrusion attempts cannot be detected. To address this problem, we proposed the process algebra-based detection model for multithreaded programs (PADMP). We generate process expressions by static binary code analysis. We then add concurrency operators to process expressions and propose a model construction algorithm based on process algebra. We also present a definition of process equivalence and behavior detection rules. Experiments demonstrate that the proposed method can accurately detect errors in multithreaded programs and has linear space?time complexity. The proposed method provides effective support for concurrent behavior modeling and detection.

Teaching Parallel Programming for Time-Efficient Computer Applications

Academic research and engineering challenge both require high performance computing (HPC), which can be achieved through parallel programming. The existing curricula of most universities do not properly address the major transition from single-core to multicore systems and sequential to parallel programming. They focus on applying application program interface (API) libraries and open multiprocessing (OpenMP), message passing interface (MPI), and compute unified device architecture (CUDA)/GPU techniques. This approach misses the goal of developing students’ long-term ability to solve real-life problems by ‘thinking in parallel’. In this article, a novel approach is proposed to teach parallel computing that will prepare computer application developers for present and future computation challenges. Using multicore/manycore architecture and popular challenging problems from areas like computer science, proposed approach teaches how to analyze and develop efficient solutions for the problems. As preliminary work, some multithreaded parallel programs are introduced to computer science and engineering students. Based on the feedbacks from information technology (IT) professionals and Student Outcomes Assessment Reports, proposed approach has potential to provide adequate knowledge so that students can fulfill the growing industry demands for HPC. Based on the Steady State Heat Equation experiment, CUDA/GPU parallel programming may achieve up to 241x speed up factor while simulating heat transfer on a 5000x5000 thin surface.

Magiclock: Scalable Detection of Potential Deadlocks in Large-Scale Multithreaded Programs

We present Magiclock, a novel potential deadlock detection technique by analyzing execution traces (containing no deadlock occurrence) of large-scale multithreaded programs. Magiclock iteratively eliminates removable lock dependencies before potential deadlock localization. It divides lock dependencies into thread specific partitions, consolidates equivalent lock dependencies, and searches over the set of lock dependency chains without the need to examine any duplicated permutations of the same lock dependency chains. We validate Magiclock through a suite of real-world, large-scale multithreaded programs. The experimental results show that Magiclock is significantly more scalable and efficient than existing dynamic detectors in analyzing and detecting potential deadlocks in execution traces of large-scale multithreaded programs.

Energy-efficient work-stealing language runtimes

Work stealing is a promising approach to constructing multithreaded program runtimes of parallel programming languages. This paper presents HERMES, an energy-efficient work-stealing language runtime. The key insight is that threads in a work-stealing environment -- thieves and victims - have varying impacts on the overall program running time, and a coordination of their execution "tempo" can lead to energy efficiency with minimal performance loss. The centerpiece of HERMES is two complementary algorithms to coordinate thread tempo: the workpath-sensitive algorithm determines tempo for each thread based on thief-victim relationships on the execution path, whereas the workload-sensitive algorithm selects appropriate tempo based on the size of work-stealing deques. We construct HERMES on top of Intel Cilk Plus's runtime, and implement tempo adjustment through standard Dynamic Voltage and Frequency Scaling (DVFS). Benchmarks running on HERMES demonstrate an average of 11-12% energy savings with an average of 3-4% performance loss through meter-based measurements over commercial CPUs.

Energy-efficient work-stealing language runtimes

Work stealing is a promising approach to constructing multithreaded program runtimes of parallel programming languages. This paper presents HERMES, an energy-efficient work-stealing language runtime. The key insight is that threads in a work-stealing environment -- thieves and victims - have varying impacts on the overall program running time, and a coordination of their execution "tempo" can lead to energy efficiency with minimal performance loss. The centerpiece of HERMES is two complementary algorithms to coordinate thread tempo: the workpath-sensitive algorithm determines tempo for each thread based on thief-victim relationships on the execution path, whereas the workload-sensitive algorithm selects appropriate tempo based on the size of work-stealing deques. We construct HERMES on top of Intel Cilk Plus's runtime, and implement tempo adjustment through standard Dynamic Voltage and Frequency Scaling (DVFS). Benchmarks running on HERMES demonstrate an average of 11-12% energy savings with an average of 3-4% performance loss through meter-based measurements over commercial CPUs.

Effective verification of confidentiality for multi-threaded programs

This paper studies how confidentiality properties of multi-threaded programs can be verified efficiently by a combination of newly developed and existing model checking algorithms. In particular, we study the verification of scheduler-specific observational determinism (SSOD), a property that chara cterizes secure information flow for multi-threaded programs under a given scheduler. Scheduler-specificness allows us to reason about refinement attacks, an important and tricky class of attacks that are notorious in practice. SSOD imposes two conditions: (SSOD-1) all individual public variables have to evolve deterministically, expressed by requiring stuttering equivalence between the traces of each individual public variable, and (SSOD-2) the relative order of updates of public variables is coincidental, i.e., there always exists a matching trace. We verify the first condition by reducing it to the question whether all traces of each public variable are stuttering equivalent. To verify the second condition, we show how the condition can be translated, via a series of steps, into a standard strong bisimulation problem. Our verification techniques can be easily adapted to verify other formalizations of similar information flow properties. We also exploit counter example generation techniques to synthesize attacks for insecure programs that fail either SSOD-1 or SSOD-2, i.e., showing how confidentiality of programs can be broken.

Special issue on soft computing techniques in cluster and grid computing systems

The resolution of complex problems requires the use of advanced approximate algorithms and huge computational resources to find accurate solutions in reasonable time. Computing clusters, as well as GPGPUs, grids, and cloud computing infrastructures arise as appropriate innovative computing platforms to implement and execute such algorithms and find accurate solutions to complex problems arising in many application areas. This special issue contains extended versions of the best papers presented in HPCLATAM-2012 and SCCG-2012 conferences, as well as other novel contributions. In total, 27 papers were submitted to the special issue, from which only 10 were finally accepted for publication. These are outstanding contributions proposing novel designs of highly efficient parallel algorithms to solve complex problems, or dealing with salient problems in the fields of grid and cloud computing. In the first paper of this compilation, “Approximating Static List Schedules in Dynamic Multithreaded Applications”, Camargo et al. propose in their contribution the use of list algorithms to optimally schedule algorithms in a multi-thread environment. The difficulty of the approach deals with the fact that a dynamic environment is considered, and no assumptions are assumed to be known about the programs. A novel algorithm is presented to build a directed cyclic graph representing a multithread program from a data flow description, in form of a directed acyclic graph. Several

Efficient deterministic multithreading without global barriers

Multithreaded programs execute nondeterministically on conventional architectures and operating systems. This complicates many tasks, including debugging and testing. Deterministic multithreading (DMT) makes the output of a multithreaded program depend on its inputs only, which can totally solve the above problem. However, current DMT implementations suffer from a common inefficiency: they use frequent global barriers to enforce a deterministic ordering on memory accesses. In this paper, we eliminate that inefficiency using an execution model we call deterministic lazy release consistency (DLRC). Our execution model uses the Kendo algorithm to enforce a deterministic ordering on synchronization, and it uses a deterministic version of the lazy release consistency memory model to propagate memory updates across threads. Our approach guarantees that programs execute deterministically even when they contain data races. We implemented a DMT system based on these ideas (RFDet) and evaluated it using 16 parallel applications. Our implementation targets C/C++ programs that use POSIX threads. Results show that RFDet gains nearly 2x speedup compared with DThreads-a start-of-the-art DMT system.

A tool to analyze the performance of multithreaded programs on NUMA architectures

Almost all of today's microprocessors contain memory controllers and directly attach to memory. Modern multiprocessor systems support non-uniform memory access (NUMA): it is faster for a microprocessor to access memory that is directly attached than it is to access memory attached to another processor. Without careful distribution of computation and data, a multithreaded program running on such a system may have high average memory access latency. To use multiprocessor systems efficiently, programmers need performance tools to guide the design of NUMA-aware codes. To address this need, we enhanced the HPCToolkit performance tools to support measurement and analysis of performance problems on multiprocessor systems with multiple NUMA domains. With these extensions, HPCToolkit helps pinpoint, quantify, and analyze NUMA bottlenecks in executions of multithreaded programs. It computes derived metrics to assess the severity of bottlenecks, analyzes memory accesses, and provides a wealth of information to guide NUMA optimization, including information about how to distribute data to reduce access latency and minimize contention. This paper describes the design and implementation of our extensions to HPCToolkit. We demonstrate their utility by describing case studies in which we use these capabilities to diagnose NUMA bottlenecks in four multithreaded applications.

Lock contention aware thread migrations

On a cache-coherent multicore multiprocessor system, the performance of a multithreaded application with high lock contention is very sensitive to the distribution of application threads across multiple processors. This is because the distribution of threads impacts the frequency of lock transfers between processors, which in turn impacts the frequency of last-level cache (LLC) misses that lie on the critical path of execution. Inappropriate distribution of threads across processors increases LLC misses in the critical path and significantly degrades performance of multithreaded programs. To alleviate the above problem, this paper overviews a thread migration technique, which migrates threads of a multithreaded program across multicore processors so that threads seeking locks are more likely to find the locks on the same processor.

The Use of Aspects to Simplify Concurrent Programming

Developers who create multi-threaded programs must pay attention to ensuring safe implementations that avoid problems and prevent introduction of a system in an inconsistent state. To achieve this objective programming languages offer more and more support for the programmer by syntactic structures and standard libraries. Despite these enhancements, multi-threaded programming is still generally considered to be difficult. The aim of our study was the analysis of existing aspect oriented solutions, which were designed to simplify concurrent programming, propose improvements to these solutions and examine influence of concurrent aspects on complexity of programs. Improved solutions were compared with existing by listing differing characteristics. Then we compared classical concurrent applications with their aspect oriented equivalents using metrics. Values of 2 metrics (from 7 considered) decreased after using aspect oriented solutions. Values of 2 other metrics decreased or remained at the same level. The rest behaved unstably depending on the problem. No metric reported increase of complexity in more than one aspect oriented version of program from set. Our results indicate that the use of aspects does not increase the complexity of a program and in some cases application of aspects can reduce it.

Simulation of a flowing snow avalanche using molecular dynamics

This paper presents an approach for the modeling and simulation of a flowing snow avalanche, which is formed of dry and liquefied snow that slides down a slope, using molecular dynamics and the discrete element method. A particle system is utilized as a base method for the simulation and marching cubes with real-time shaders are employed for rendering. A uniform grid-based neighbor search algorithm is used for collision detection for interparticle and particle-terrain interactions. A mass-spring model of the collision resolution is employed to mimic the compressibility of the snow and particle attraction forces are put into use between the particles and terrain surface. In order to achieve greater performance, general purpose GPU language and multithreaded programming are utilized for collision detection and resolution. The results are displayed with different combinations of rendering methods for the realistic representation of the flowing avalanche.

State-Partition-Based Control of Discrete Event Systems for Enforcement of Regular Language Specifications

We consider the solution of supervisory control problems for discrete event systems modeled by automata or bounded Petri nets where the specification is expressed as a regular sublanguage of the system language and where the supervisor is restricted to be state-partition-based with respect to original system state space, i.e., the state space of the automaton or the set of reachable markings of the Petri net. State-partition-based supervisors are completely characterized by a partition of the original system state space into legal and illegal states: transitions between legal states are always enabled while transitions from legal to illegal states are always disabled. We present a general algorithm that calculates all state-partition-based supervisors that result in safe and non-blocking controlled languages. The algorithm uses a vertex-cover-type algorithm on the representation of the supremal controllable sublanguage in order to obtain the desired partitions. This work is motivated by the application of discrete event control techniques to the avoidance of classes of concurrency bugs in multithreaded programs. State-partition-based supervisors are especially advantageous in that application as they allow more concurrency at run-time. More generally, this class of supervisors is required when the representation of the supervisor must be based on the system's original state space; this occurs for memoryless supervisors in automaton-based control or in supervision based on place invariants in Petri-net-based control, for instance.

Proposal of a Supporting Method for Debugging to Reproduce Java Multi-threaded Programs by Petri-net

It is difficult to implement the multi-threaded programs. The reason is that the behavior of each thread is non-deterministic. Also it is difficult to reproduce the situation in which an incident occurs. This paper proposes a supporting method for debugging to reproduce Java multi-threaded programs by visualizing the behavior of the programs with Petri-net. Moreover, we have confirmed the effectiveness of our method by implementing a tool.

Integration of Drive-by-Wire with Navigation Control for a Driverless Electric Race Car

This article presents the design and implementation of a drive-by-wire system and a navigation control system for an autonomous Formula SAE race car. The result is the development of a platform for research into autonomous driving which can be easily replicated. Drive-by-wire actuators for acceleration, braking and steering of the vehicle are discussed, as well as the embedded low-level control system. The high-level navigation system features sensor fusion of a 6-dof IMU with a standard GPS and the integration of an automotive LIDAR. Operation of the vehicle is via a multi-threaded program with asynchronous IO and is based upon recording and driving waypoints. In addition to independent safety interlocks, active safety systems are an integral part to both the drive-by-wire and navigation systems.

Object Tracking with a Multiagent Robot System and a Stereo Vision Camera

When working with a robot in terms of object manipulation the essential information is relative position between robot's tool center point (TCP) and the object of interest. This paper proposes a method of frame relative displacement and describes a working multiagent robot application that can be used for tracking, tooling or handling operations with the use of stereo vision in unstructured laboratory environment. Robot system is composed of two Fanuc robot arms, one of which carries a stereo vision camera system and the other which is guided in relation to object of interest. The latter robot has a marker that is used for navigation between the robot and the object of interest. Image processing, marker detection, 3-D coordinates extraction, coordinate system transformations, offset coordinates calculation and communication are handled using c++ multithread program and TCP/IP protocol.

VXWORKS系统并发程序动态测试工具设计

近年来随着实时嵌入式系统自动化程度的不断提升，其设计复杂度不断加大，在设计中大量的使用了并发程序设计方法。但在实时嵌入式系统测试的过程中，由于实时嵌入式系统中中断和线程相互交叠，始终缺乏有效的并发程序测试工具。为此本文设计了针对VXWORKS系统并发程序动态测试工具，提出以标记迁移系统作为并发程序的系统模型，对常见的并发错误给出了形式化定义，使用偏序化简算法缩减程序的状态空间，实现了对多线程、多重中断的并发程序错误检测。 In recent years, with the improving degree of automation of real-time embedded systems, their design complexity continues to increase. Concurrent programming methods were widely used in designing. But due to real-time embedded system interrupts and threads overlap, in the testing and checking process of real-time embedded system, there is always lack of an effective program testing tool. So we designed a testing tool for VXWORKS systems dynamic concurrent programs. We use Labeled Transition Systems as a system of concurrent programming model, and have given formal definition for common concurrency error, and use of partial order reduction algorithm to reduce the state space of the program. Finally, we have realized the testing tool which can detect multi-threaded and multi-interrupt program concurrent errors.

DRDet: Efficiently Making Data Races Deterministic

Strongly deterministic multithreading provides determinism for multithreaded programs even in the presence of data races. A common way to guarantee determinism for data races is to isolate threads by buffering shared memory accesses. Unfortunately, buffering all shared accesses is prohibitively costly. We propose an approach called DRDet to efficiently make data races deterministic. DRDet leverages the insight that, instead of buffering all shared memory accesses, it is sufficient to only buffer memory accesses involving data races. DRDet uses a sound data-race detector to detect all potential data races. These potential data races, along with all accesses which may access the same set of memory objects, are flagged as data-race-involved accesses. Unsurprisingly, the imprecision of static analyses makes a large fraction of shared accesses to be data-race-involved. DRDet employs two optimizations which aim at reducing the number of accesses to be sent to query alias analysis. We implement DRDet on CoreDet, a state-of-the-art deterministic multithreading system. Our empirical evaluation shows that DRDet reduces the overhead of CoreDet by an average of 1.6X, without weakening determinism and scalability.

ReconOS: An Operating System Approach for Reconfigurable Computing

The ReconOS operating system for reconfigurable computing offers a unified multithreaded programming model and OS services for threads executing in software and threads mapped to reconfigurable hardware. The OS interface lets hardware threads interact with software threads using well-known mechanisms such as semaphores, mutexes, condition variables, and message queues. By semantically integrating hardware accelerators into a standard OS environment, ReconOS allows for rapid design-space exploration, supports a structured application development process, and improves the portability of applications between different reconfigurable computing systems.

Selective dynamic serialization for reducing energy consumption in hardware transactional memory systems

In the search for new paradigms to simplify multithreaded programming, Transactional Memory (TM) is currently being advocated as a promising alternative to deadlock-prone lock-based synchronization. In this way, future many-core CMP architectures may need to provide hardware support for TM. On the other hand, power dissipation constitutes a first class consideration in multicore processor designs. In this work, we propose Selective Dynamic Serialization (SDS) as a new technique to improve energy consumption without degrading performance in applications with conflicting transactions by avoiding wasted work due to aborted transactions. Our proposal, which is implemented on top of a hardware transactional memory (HTM) system with an eager conflict management policy, detects and serializes conflicting transactions dynamically (at run-time). In its simplest form, in case of conflict, one transaction is allowed to continue whilst the rest are completely stalled. Once the executing transaction has finished, it wakes up several of the stalling transactions. More elaborated implementations of SDS try to delay this behavior until serialization of transactions is profitable, achieving the best trade-off between performance, energy savings and network traffic. SDS implementations differ from each other in the condition that triggers the serialization mode. We have evaluated several SDS schemes using GEMS, a full-system simulator implementing the LogTM-SE Eager---Eager HTM system, and several benchmarks from the STAMP suite. Results for a 16-core CMP show that SDS obtains reductions of 6 % on average in energy consumption (more than 20 % in high contention scenarios) in a wide range of benchmarks without affecting, on average, execution time. At the same time, network traffic level is also reduced by 22 %.