Multiprocessor Computer Architectures Research Articles

Congestion aware low power on chip protocols with network on chip with cloud security

This article is to analyze the bottleneck problems of NoC in many more applications like multi-processor communication, computer architectures, and network interface processors. This paper aims to research the advantages and disadvantages of low congestion protocols on highway environments like multiple master multiple slave interconnections. A long-term evolution and effective on-chip connectivity solution for secured, congestion aware and low power architecture is emerged for Network-on-Chip (NoC) for MCSoC. Applications running simultaneously on a different chip are often exchanged dynamically on the chip network. Of-course, in general on chip communication, resources mean that applications may interact with shared resources to influence each other's time characteristics.

Comparison of Analysis Results Between 2D/1D Synthesis and RAPTOR-M3G in the Korea Standard Nuclear Plant (KSNP)

The 2D/1D synthesis methodology has been used to calculate the fast neutron (E > 1.0 MeV) exposure to the beltline region of the reactor pressure vessel. This method uses the DORT 3.1 discrete ordinates code and the BUGLE-96 cross-section library based on ENDF/B-VI. RAPTOR-M3G (RApid Parallel Transport Of Radiation-Multiple 3D Geometries) which performs full 3D calculations was developed and is based on domain decomposition algorithms, where the spatial and angular domains are allocated and processed on multi-processor computer architecture. As compared to traditional single-processor applications, this approach reduces the computational load as well as the memory requirement per processor. Both methods are applied to surveillance test results for the Korea Standard Nuclear Plant (KSNP)-OPR (Optimized Power Reactor) 1000 MW. The objective of this paper is to compare the results of the KSNP surveillance program between 2D/1D synthesis and RAPTOR-M3G. Each operating KSNP has a reactor vessel surveillance program consisting of six surveillance capsules located between the core and the reactor vessel in the downcomer region near the reactor vessel wall. In addition to the In-Vessel surveillance program, an Ex-Vessel Neutron Dosimetry (EVND) program has been implemented. In order to estimate surveillance test results, cycle-specific forward transport calculations were performed by 2D/1D synthesis and by RAPTOR-M3G. The ratio between measured and calculated (M/C) reaction rates will be discussed. The current plan is to install an EVND system in all of the Korea PWRs including the new reactor type, APR (Advanced Power Reactor) 1400 MW. This work will play an important role in establishing a KSNP-specific database of surveillance test results and will employ RAPTOR-M3G for surveillance dosimetry location as well as positions in the KSNP reactor vessel.

A new parallel lattice reduction algorithm for BKZ reduced bases

In order to implement the original BKZ algorithm in parallel, we describe it in terms of parallelism and give its parallel implementation scheme. Then we analyze the efficiency of algorithm’s parallel implementation and show that the speedup factor of BKZ algorithm in parallel is extremely low. Therefore we present a new parallel lattice reduction algorithm suitable for multiprocessor computer architecture. The new algorithm can obtain a BKZ reduced basis and the parallel speedup is effective. Also with the practical results, although the computational complexity increases compared with the original BKZ algorithm, we still indicate that the new algorithm performs well in parallel and the time cost in parallel is less. At the same time, we show that the length of the shortest vector is smaller.

Emulation and Analytical Model of PIM Supplemental Computing Element via HDL

Abstract This article presents and describes the simulation and emulation of single processing core, designed for new heterogeneous multiprocessor computer architectures with supplemental computing elements in the operating memory. We study the emulated results over the simulated model to confirm it’s usability in the overall simulation of complete system. The simulated models are developed based on existing data, comparing time markers, measuring the output performance against the results from the emulation. Using additional computing elements in the memory will allows us to improve the current limitations of the conventional architectures.

From medical images to flow computations without user-generated meshes.

Biomedical flow computations in patient-specific geometries require integrating image acquisition and processing with fluid flow solvers. Typically, image-based modeling processes involve several steps, such as image segmentation, surface mesh generation, volumetric flow mesh generation, and finally, computational simulation. These steps are performed separately, often using separate pieces of software, and each step requires considerable expertise and investment of time on the part of the user. In this paper, an alternative framework is presented in which the entire image-based modeling process is performed on a Cartesian domain where the image is embedded within the domain as an implicit surface. Thus, the framework circumvents the need for generating surface meshes to fit complex geometries and subsequent creation of body-fitted flow meshes. Cartesian mesh pruning, local mesh refinement, and massive parallelization provide computational efficiency; the image-to-computation techniques adopted are chosen to be suitable for distributed memory architectures. The complete framework is demonstrated with flow calculations computed in two 3D image reconstructions of geometrically dissimilar intracranial aneurysms. The flow calculations are performed on multiprocessor computer architectures and are compared against calculations performed with a standard multistep route.

Internal multi-scale multi-physics coupled system for high fidelity simulation of light water reactors

In order to increase the accuracy and the degree of spatial and energy resolution of core design studies, coupled 3D neutronic (multi-group deterministic and continuous energy Monte-Carlo) and 3D thermal–hydraulic (CFD and subchannel) codes are being developed worldwide. At KIT, both deterministic and Monte-Carlo codes were coupled with subchannel codes and applied to predict the safety-related design parameters such as minimal critical power ratio (MCPR), maximal cladding and fuel temperature, departure from nuclide boiling ratio (DNBR). These coupling approaches were revised and considerably improved. Innovative method of internal on-the-fly thermal feedback interchange between the codes was implemented. It no longer relies on explicit material definitions and allows the modeling of temperature and density distributions based on the cell coordinates. In contrast to all existing coupled schemes, this method uses only standard MCNP geometry input and requires only proper definition of the geometrical dimensions. The initial material definition is arbitrary and is determined on-the-fly during the neutron transport by the thermal–hydraulic feedback. Another key issue addressed is the optimal application of parallel computing and the implementation of less time consuming tally estimators. Using multi-processor computer architectures and implementing collision density flux estimator, it is possible to reduce the Monte-Carlo running time and obtain converged results within reasonable time limit. The coupled calculation was accelerated further, by implementing stochastic approximation-based relaxation technique. Further, it is shown that large fuel assemblies can be analyzed on subchannel level.

High fidelity simulation of conventional and innovative LWR with the coupled Monte-Carlo thermal-hydraulic system MCNP-SUBCHANFLOW

In order to increase the accuracy and the degree of spatial and energy resolution of core design studies, coupled 3D neutronic (multi-group deterministic and continuous energy Monte-Carlo) and 3D thermal-hydraulic (CFD and sub-channel) codes are being developed worldwide. At KIT, both deterministic and Monte-Carlo codes were coupled with sub-channel codes and applied to predict the safety-related design parameters such as critical power ratio, maximal cladding, fuel temperature and DNB. These coupling approaches were revised and improved based on the experience gained. One particular example is replacing COBRA-TF with SUBCHANFLOW, an in-house developed sub-channel code, in the COBRA-TF/MCNP coupling, accompanied with new way of radial mapping between the neutronic and thermal-hydraulic domains. The new coupled system MCNP5/SUBCHANFLOW makes it possible to investigate a variety of fuel assembly types. Key issues in such a coupled system are the implementation of the thermal-hydraulic/neutronic feedback mechanisms, the precision of the Monte-Carlo solutions, and the supervision of convergence during the iterative solution process. Another key issue considered is the optimal application of parallel computing. Using multi-processor computer architectures, it is possible to reduce the Monte-Carlo running time and obtain converged results within reasonable time limit. In particular, it is shown that by exploiting the capabilities of multi-processor calculation, large fuel assemblies on a pin-by-pin basis with a resolution at sub-channel level can be analyzed. One of the most important issues addressed in the current work is the temperature effects on nuclear data. For the particular studies pseudo material mixing approach was used to account for the temperature dependence of the nuclear data.

A computational framework for predicting laminar reactive flows with soot formation

Numerical modeling is an attractive option for cost-effective development of new high-efficiency, soot-free combustion devices. However, the inherent complexities of hydrocarbon combustion require that combustion models rely heavily on engineering approximations to remain computationally tractable. More efficient numerical algorithms for reacting flows are needed so that more realistic physics models can be used to provide quantitative soot predictions. A new, highly-scalable combustion modeling tool has been developed specifically for use on large multiprocessor computer architectures. The tool is capable of capturing complex processes such as detailed chemistry, molecular transport, radiation, and soot formation/destruction in laminar diffusion flames. The proposed algorithm represents the current state of the art in combustion modeling, making use of a second-order accurate finite-volume scheme and a parallel adaptive mesh refinement (AMR) algorithm on body-fitted, multiblock meshes. Radiation is modeled using the discrete ordinates method (DOM) to solve the radiative transfer equation and the statistical narrow-band correlated-k (SNBCK) method to quantify gas band absorption. At present, a semi-empirical model is used to predict the nucleation, growth, and oxidation of soot particles. The framework is applied to two laminar coflow diffusion flames which were previously studied numerically and experimentally. Both a weakly-sooting methane–air flame and a heavily-sooting ethylene–air flame are considered for validation purposes. Numerical predictions for these flames are verified with published experimental results and the parallel performance of the algorithm analyzed. The effects of grid resolution and gas-phase reaction mechanism on the overall flame solutions were also assessed. Reasonable agreement with experimental measurements was obtained for both flames for predictions of flame height, temperature and soot volume fraction. Overall, the algorithm displayed excellent strong scaling performance by achieving a parallel efficiency of 70% on 384 processors. The proposed algorithm proved to be a robust, highly-scalable solution method for sooting laminar flames.

Nonrigid image registration in shared-memory multiprocessor environments with application to brains, breasts, and bees.

One major problem with nonrigid image registration techniques is their high computational cost. Because of this, these methods have found limited application to clinical situations where fast execution is required, e.g., intraoperative imaging. This paper presents a parallel implementation of a nonrigid image registration algorithm. It takes advantage of shared-memory multiprocessor computer architectures using multithreaded programming by partitioning of data and partitioning of tasks, depending on the computational subproblem. For three different biomedical applications (intraoperative brain deformation, contrast-enhanced MR mammography, intersubject brain registration), the scaling behavior of the algorithm is quantitatively analyzed. The method is demonstrated to perform the computation of intra-operative brain deformation in less than a minute using 64 CPUs on a 128-CPU shared-memory supercomputer (SGI Origin 3800). It is shown that its serial component is no more than 2% of the total computation time, allowing a speedup of at least a factor of 50. In most cases, the theoretical limit of the speedup is substantially higher (up to 132-fold in the application examples presented in this paper). The parallel implementation of our algorithm is, therefore, capable of solving nonrigid registration problems with short execution time requirements and may be considered an important step in the application of such techniques to clinically important problems such as the computation of brain deformation during cranial image-guided surgery.

Optimization of car body under constraints of noise, vibration, and harshness (NVH), and crash

A car body structure was optimized for minimum weight under the constraints of noise, vibration, and harshness (NVH), and a crash event, using up to 254 concurrently operating processors. The crash analysis alone, if executed on a single processor and repeated the number of times this optimization required, would have taken 257 days of elapsed computing time. Parallel processing has compressed the elapsed time to one day demonstrating how a multiprocessor machine may be useful in solving engineering tasks that heretofore were regarded as intractable. The optimization procedure transformed the structure initially infeasible to one having its weight reduced and all the constraints satisfied. The experience gained in the reported application indicated it is important to tailor the solution method to the characteristics of the multiprocessor computer architecture and to understand the data handling options offered by that architecture. Another conclusion drawn from this case is that the coarse-grained parallelism whereby an existing code is being replicated over an array of processors should be regarded as an effective way of utilization of multiprocessor machines, immediately available in the interim before solutions are redeveloped from ground up specifically for that class of machines.

USING PARALLEL ALGORITHMS TO COMPUTE GAS-DYNAMIC FLOWS ON IRREGULAR GRIDS

In this article, the supersonic flow of a viscous heat-conducting gas near bodies of complex shape is simulated on a parallel computing system. Kinetically consistent difference schemes are used in the calculation, as they easily adapt to distributed-memory multiprocessor computer architectures. The parallel implementation of the kinetically consistent algorithm has been coded in the language Norma.

Optimisation of irregular multiprocessor computer architectures using genetic algorithms

Many problems today need the computing power that is only available by using large‐scaleparallel processing. For a significant number of these problems, the density of theglobal communications between the individual processors dominates the performance ofthe whole parallel implementation on a distributed memory multiprocessor system. In thesecases, the design of the interconnection network for the processors is known to play asignificant part in the efficient implementation of real problems. Important criteria to optimisethe efficiency of a configuration are the maximum and average distance a message hasto travel between processors. Minimum path systems are irregular multiprocessor computerarchitectures which optimise these criteria. These architectures provide an efficient alternativeto the more common regular topologies for solving real applications in parallel. Thispaper presents new results for two combinatorial problems that occur during the generationof these optimal irregular configurations. These are: (1) The design of the optimum interconnection network between the processors for configurationscontaining up to 128 processors. (2) The design of the routing tables to provide the optimal routing of messages withinthese irregular networks. The paper shows how these combinatorial problems have been solved, using genetic algorithmsfor the first problem and a random local search procedure for the second. It alsoincludes a comparison with the results obtained for regular topologies, for example: hypercubes,tori, and rings.

A multi-processor computer architecture for active control

An integral real-time computer, suitable for active control and digital signal processing applications is presented. The key features are the low-latency high-performance architecture (25 GFLOPS), integrated multi-channel analogue-to-digital interfaces and ease of programming in a MATLAB ® environment. The system has been developed for an active control application, which is discussed along with details of the hardware and software design and future application areas.

Fault-tolerant interleaved memory systems with two-level redundancy

Highly reliable interleaved memory systems for uniprocessor and multiprocessor computer architectures are presented. The memory systems are divided into groups. Each group consists of several banks and each bank has several modules. The error model is defined at the memory-module level. A module is faulty if any single or multiple faults result in loss of the entire module. Spare modules, as well as spare banks, are included in the systems to enhance reliability and availability. A faulty module is replaced by a spare module within a bank first, and, if the bank has no redundancy remaining for the faulty module, the whole bank will be replaced by a spare bank at the next higher level. The structure of the reconfigurable memory system is designed in such a way that the replacement of faulty modules (banks) by spare modules (banks) will not disturb memory references if each bank (group) has at most two spare modules (banks). If there are more than two spare modules (banks) in a bank (group), a second-level address translator is designed which can prohibit references to faulty modules by address remapping. The address translator can be implemented with a CAM or switches. Analysis results show that the system reliability can be significantly improved with little hardware overhead. Also, a typical system with one redundant row of modules has the highest cost-effectiveness during its useful lifetime period. User transparency in memory access is retained.

USAGE OF ARTIFICIAL INTELLIGENCE METHODS IN INVERSE PROBLEMS FOR ESTIMATION OF MATERIAL PARAMETERS

Inverse problems deal with determining the causes on the basis of knowing their effects. The object of the inverse parameter estimation problem is to fix the thermal material parameters (the cause) on the strength of a given observation of the temperature history at one or more interior points (the effect). This paper demonstrates two novel approaches to the inverse problems. These approaches use two artificial intelligence mechanisms: neural network and genetic algorithm. Examples shown in this paper give a comparison of results obtained by both of these methods. The numerical technique of neural networks evolved from the effort to model the function of the human brain and the genetic algorithms model the evolutional process of nature. Both of the presented approaches can lead to a solution without having problems with the stability of the inverse task. Both methods are suitable for parallel processing and are advantageous for a multiprocessor computer architecture.

A high performance embedded machine tool controller

A Diamond Turning Machine (DTM) can fabricate components with extremely high precision and high quality surface finish characteristics. Existing commercial controllers are limited in their ability to support high performance machining and related advanced control algorithms. Evolving enhancements to the functional capability and control algorithms of a DTM require increased performance and flexibility from the computer system controlling it. To provide this capability the Precision Engineering Center at North Carolina State University has developed and implemented a high performance control system for such a machine tool. The control system is based on a heterogeneous hierarchical multiprocessor computer architecture. This provides the capacity to apply advanced control concepts to the DTM, resulting in improved precision and quality of machined parts. Additionally, the ability to machine non-rotationally symmetric components has been made possible by application of multiprocessor capability.

Parallel database systems: Open problems and new issues

Parallel database systems attempt to exploit recent multiprocessor computer architectures in order to build high-performance and high-availability database servers at a much lower price than equivalent mainframe computers. Although there are commercial SQL-based products, a number of open problems hamper the full exploitation of the capabilities of parallel systems. These problems touch on issues ranging from those of parallel processing to distributed database management. Furthermore, it is still an open issue to decide which of the various architectures among shared-memory, shared-disk, and shared-nothing, is best for database management under various conditions. Finally, there are new issues raised by the introduction of higher functionality such as knowledge-based or object-oriented capabilities within a parallel database system.

Response Time Analysis of Multiprocessor Computers for Database Support

Comparison of three multiprocessor computer architectures for database support is made possible through evaluation of response time expressions. These expressions are derived by parameterizing algorithms performed by each machine to execute a relational algebra query. Parameters represent properties of the database and components of the machines. Studies of particular parameter values exhibit response times for conventional machine technology, for low selectivity, high duplicate occurrence, and parallel disk access, increasing the number of processors, and improving communication and processing technology.

Logic Programming in the Fifth Generation

The Japanese Fifth Generation Computer Systems (FGCS) project has chosen logic programming for its core programming language. It has recognized the major contribution that logic programming has to make not only in artificial intelligence but in database systems and software specification as well. It has recognized and intends to exploit the greater potential that logic programming has to offer for taking advantage of the parallelism possible with innovative multiprocessor computer architectures.

Towards a taxonomy of computer architecture based on the machine data type view

Existing taxonomies of computer architecture lack the descriptive tools to deal with the large variety of existing principles, features, and mechanisms of the existing spectrum of single processor, multi processor, and multi computer architectures. Consequently, they lack the discriminating power to be able to taxonomize computer architecture. In the paper, a new approach toward a complete taxonomy is presented. The key to the taxonomy is to start with the dichotomy of 'operational principle' and 'hardware structure' as the foundation of a computer architecture and describe the constituents of the operational principle in terms of 'machine data types' consisting of 'machine data objects', their representations, and the functions applicable on the objects. The resulting taxonomy provides a systematic approach to the design of innovative computer architectures.