Multilayer Boards Research Articles

Detection of Multi-Layered Bond Delamination Defects Based on Full Waveform Inversion.

This study aimed to address the challenges encountered in traditional bulk wave delamination detection methods characterized by low detection efficiency. Additionally, the limitations of guided wave delamination detection methods were addressed, particularly those utilizing reflected waves, which are susceptible to edge reflections, thus complicating effective defect extraction. Leveraging the full waveform inversion algorithm, an innovative approach was established for detecting delamination defects in multi-layered structures using ultrasonic guided wave arrays. First, finite element modeling was employed to simulate guided wave data acquisition by a circular array within an aluminum-epoxy bilayer structure with embedded delamination defects. Subsequently, the full waveform inversion algorithm was applied to reconstruct both regular and irregular delamination defects. Analysis results indicated the efficacy of the proposed approach in accurately identifying delamination defects of varying shapes. Furthermore, an experimental platform for guided wave delamination defect detection was established, and experiments were conducted on a steel-cement bilayer structure containing an irregular delamination defect. The experimental results validated the exceptional imaging precision of our proposed technique for identifying delamination defects in multi-layered boards. In summary, the proposed method can accurately determine both the positions and sizes of defects with higher detection efficiency than traditional pulse-echo delamination detection methods.

Size Effects of Au/Ni-Coated Polymer Particles on the Electrical Performance of Anisotropic Conductive Adhesive Films under Flexible Mechanical Conditions.

In soft electronics, anisotropic conductive adhesive films (ACFs) are the trending interconnecting approach due to their substantial softness and superior bondability to flexible substrates. However, low bonding pressure (≤1 MPa) and fine-pitch interconnections of ACFs become challenging while being extended in advanced device developments such as wafer-level packaging and three-dimensional multi-layer integrated circuit board assembly. To overcome these difficulties, we studied two types of ACFs with distinct conductive filler sizes (ACF-1: ~20 μm and ACF-2: ~5 μm). We demonstrated a low-pressure thermo-compression bonding technique and investigated the size effect of conductive particles on ACF's mechanical properties in a customized testing device, which consists of flexible printing circuits and Flex on Flex assemblies. A consistency of low interconnection resistance (<1 Ω) after mechanical stress (cycling bending test up to 600 cycles) verifies the assembly's outstanding electrical reliability and mechanical stability and thus validates the great effectiveness of the ACF bonding technique. Additionally, in numerical studies using the finite element method, we developed a generic model to disclose the size effect of Au/Ni-coated polymer fillers in ACF on device reliability under mechanical stress. For the first time, we confirmed that ACFs with smaller filler particles are more prone to coating fracture, leading to deteriorated electrical interconnections, and are more likely to peel off from substrate electrode pads resulting in electrical faults. This study provides guides for ACF design and manufacturing and would facilitate the advancement of soft wearable electronic devices.

Hybrid 3D Printing of Molten Metal Microdroplets and Polymers for Prototyping of Printed Circuit Boards Featuring Interdigitated 3D Capacitors

This paper presents layer‐by‐layer additive manufacturing (AM) of molten metal microdroplets and dielectric materials to fabricate multilayer hybrid circuit boards featuring interdigitated 3D capacitors. The printed metal lines have a low resistance of 5 mΩ/mm, 12 times lower than state‐of‐the‐art conductive inks. Exploiting the advantages of Sn‐based oxide as an ideal candidate for Electrical Energy Storage Systems (ESS), we successfully fabricated an out‐of‐plane capacitor module using a combination of polymer and metal materials. The fabrication process exhibited an exceptional aspect ratio of 16, illustrating the successful incorporation of 20 metal layers in the out‐of‐plane capacitor module. Q factor obtained for the 3D capacitor was in the range of 66–500. Additionally, a fully automated printing technique was employed to produce a multilayer hybrid electrical printed circuit board (PCB), eliminating the need for post‐processing. This streamlined approach presents an efficient and comprehensive solution for the one‐stop printing of intricate electrical circuits. © 2024 The Authors. IEEJ Transactions on Electrical and Electronic Engineering published by Institute of Electrical Engineer of Japan and Wiley Periodicals LLC.

Rock Plate Impact Experiment Based on ANSYS Workbench

The study of the physical properties of laminate mainly focuses on the static strength and elastic modulus. Its impact resistance has not attracted enough attention. However, the impact resistance of the multi-layer board used in climbing walls is particularly important to protect the safety of climbers. Using the display dynamics solver ANSYS Workbench and referring to the test method in EN 12572-1-2007, a finite element model of the rock slab impact test was established. The maximum stress and strain of each part during impact were solved, and the vulnerability point of the structure was analyzed. By changing the impact height and solving the influence on the rock slab under each test condition, the results show that the maximum stress of the slab changes nonlinearly. The numerical simulation results provide reference data and new development modes for the development of test methods and testing equipment in the next step of improving national standards.

Geometric modification and placement of high heat flux ic chips on substrates of different materials for enhanced heat transfer

This article presents the significance of using different sizes and positions of IC (Integrated Circuit) chips that are mounted on substrates of different materials. The ICs are cooled by forced convection in a horizontal wind tunnel. COMSOL Multiphysics 5.4 solve the IC chip cooling problem by selecting a conjugate heat transfer module with laminar flow. FR4, ba-kelite, single and multi-layer copper clad boards are used as substrate materials. Numerical simulations are performed for FR4, bakelite with a constant heat flux of 5000 W/m2, at 2.5 m/s air velocity. In contrast, single and multi-layer copper clad boards are studied for 10000 W/m2 with 1.5 m/s air velocity. The prime objective of this research is to use adequate size and placement of chips generating high heat fluxes for enhanced heat transfer. Results showed that larger chips placed at bottom rows and sequentially decreasing sizes in the subsequent rows for the same overall input for high substrate thermal conductivity give more heat dissipation. Among all configurations A0 – F considered in the study, case E provides minimum tempera-ture using single and multi-layer copper clad boards. In addition to modification of chip sizes, geometric spacing of X1/X2 = 1.8 results in lower maximum temperature.

Additive Prototyping for Rapid Circuit and Interface Development at 200°C+

A major challenge in the process of designing analog and digital circuits for high-temperature applications is the usefulness and completeness of information supplied by component manufacturers. The models supplied in datasheet packages require verification and/or extension to be integrated into systems that function at or above 200°C. Between 85°C and 175°C this activity is accomplished through breadboarding and population of bespoke printed circuit boards respectively. Before investing in a fabrication run, rapid additive prototyping can be used to verify designs and inform designers if modification is required. Additively manufactured modules can also interface with final products and can be easily integrated with other high temperature modules such as Ozark IC’s XNode® single board high-temperature computers. The materials used for fabrication of the high-temperature prototype module are selected in a manner that is compatible with the components used for fabrication. Compatible materials are required for all interfaces; connector-to-board, board-to-passive, board-to-wirebond, and wirebond-to-die. Using proper materials and packaging techniques, operation at 200°C for over 7000 hours has been achieved. Ozark IC has developed a post-fire process that allows for maskless single-layer board fabrication, from design to electrical test, in less than one week. Currently in development is an additive dielectric deposition process, which will enable multilayer board fabrication using commercially available metal and dielectric inks. This process was used to fabricate a Resistance Temperature Detector readout function (RTD board) with the dimensions of 5 cm X 5 cm which was then integrated with an XNode AQ200 module and tested at temperatures up to 200°C. This material system was used to fabricate the single-layer and multilayer additively manufactured substrates which have tested successfully at temperatures up to 800°C.

Investigation of the profilogram structure of microstrip microwave modules manufactured using additive 3D-printing technology

Objectives. The aim of the work is to study the surface roughness of the current-carrying topology and dielectric of the upper (Top Layer) and lower (Bottom Layer) sides of microwave modules manufactured using additive three-dimensional printing technology when prototyping prototypes of microwave modules on a 3D printer of DragonFly 2020 LDM multilayer printed circuit boards.Methods. Methods of metallographic analysis in bright and dark fields, surface roughness profiling, and computer modeling were used.Results. Experimental samples of microstrip microwave elements of modules of multilayer boards of a given configuration, telemetry sensors, printed circuit board (PCB) antennas were obtained. The topological and radiophysical features of the additively formed upper and lower surface layers of experimental samples of boards of strip modules were studied. Optical profilogram measurements of the roughness of the outer sides of the board were carried out at 10 points, amounting to 2 µm for the upper layer of the topology and 0.3 µm for the lower layer; the average grain size of the dielectric base was determined at 0.007 mm2. The roughness of the conductive topology and upper side dielectric was shown to correspond to an accuracy class of 6–7, while the roughness of the microstrip conductive topology and the dielectric of the lower side of the board corresponds to an accuracy class of 10–12.Conclusions. It is established that an uneven formation of the lower and upper strip layers of the printed module can affect the inhomogeneity of the distribution of radiophysical parameters (dielectric permittivity, surface conductivity, etc.), as well as the instability of the structural (adhesion ability, thermal conductivity, etc.) characteristics of the strip module, which must be taken into account when prototyping devices using inkjet 3D printing technology, including when adapting Gerber projects of PCB modules created for classical board production technology.

Revisiting Design Rules for Floating Metal

Electrostatic discharges (ESDs) from electrically isolated conductors (commonly called “floating metal”) were discovered to be sources of anomalies on early spacecraft. Ground tests demonstrated that discharges from floating metal were more severe and hazardous than discharges from equal areas of the dielectric film. This led to requirements to ground all thermal blanket layers. Charging and discharging of wires and coaxes were later discovered to be more severe if the conductors were ungrounded, which led to requirements to ground all unused and unterminated wires. Ground tests also showed that discharges from isolated conductors on printed circuit boards (PCBs) were also a potential risk despite the much lower flux levels inside these units. Subsequent tests showed that the peak voltage and energy of ESD transients induced in nearby PCB circuits scaled with the area of floating conductors. Based on those results, NASA HDBK 4002 and 4002A recommended limiting the area to 3 cm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{2}$</tex-math> </inline-formula> (and to 0.3 cm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{2}$</tex-math> </inline-formula> if the floating metal is on a PCB). (The recently released HDBK-4002B has removed these area guidelines.) Recent tests have shown that the peak voltage and delivered energy vary dramatically with the mode of discharge of the floating metal. Blow-off discharge amplitudes were similar to those observed in previous tests. But when the discharge punched through the insulator between the floating metal and underlying conductor, peak voltages and delivered energies were orders of magnitude higher. Given that modern designs employ multilayer circuit boards, the opportunity for punchthrough discharges is higher than that existed on the thick single-layer FR4 boards the HDBK 4002 guideline is based upon.

Transient thermal behaviour of a substrate subjected to the activation of an electronic chip and surface cooling

&amp;lt;p&amp;gt;Controlling the temperature of electronic components is a major interest for the electronics industry. Indeed, the lifetime of the components is directly dependent on the temperature levels reached in the electronic boards. Then, it is essential to predict the chip temperature evolution in order to maximize their lifespan. The electronic boards are more and more complex. They are multi-layers composed of different materials. The numerical resolution of the heat transfer equations in these systems requires very fine meshes and therefore very high computation times. It is possible to standardize the characteristics of these multilayer boards in order to treat them as a homogeneous material. The study presented in this work uses this approach and deals with the transient thermal behaviour of a substrate and its chip. The entire surface of the electronic board is cooled by convection. The developed model assumes that the surface convection coefficient is known, constant and uniform. The heat transfer by conduction in the substrate is based on an axisymmetric assumption on the longitudinal dimensions of the exchange surface (r, theta) and an assumption of semi-infinite medium in the transversal direction of the plate (thickness z). These assumptions are verified if, on the one hand, the activation times of the electronic chips are low enough and the dimensions of the chip is small compared to the electronic board. In these conditions, a fully analytical model is developed considering two successive integral transforms: a Laplace transform for the temporal variable, and a Hankel transform for the radial variable. An explicit expression of the temperature of the surface heated by the component is established, requiring very short computation times compared to numerical simulations. This model can be easily incorporated into a dimensioning code for electronic devices to predict their temperature.&amp;amp;nbsp; It can also be used as a direct model in an inverse procedure for identifying parameters on electronic boards.&amp;lt;/p&amp;gt;

Novel Magic-T Integrated With Rectangular Waveguide-to-Microstrip Line Transition

A magic-T integrated with transition is presented in this letter. The transition from rectangular waveguide to microstrip line meets Faraday’s law, and the function of balance ports is realized by placing a pair of probes in reverse directions. The isolation between the sum port and the difference port of the magic-T is 30 dB, the isolation of the balance ports is 22 dB, the insertion loss (IL) is less than 0.6 dB, and the frequency is between 7.7 and 9.0 GHz. Implemented with multilayer boards only, the waveguide magic-T is more suitable for solid-state amplifiers and increases potentials in miniaturization of antenna array system.

A Novel Printed Circuit Board Laminate for High Frequency Electronics

A novel PCB material that is advantaged at the 10-100+ GHz range has been developed. It consists of a 3 layer laminate, nominally with a total thickness of 140 microns, and individual laminates can be stacked to make multilayer boards. The outer two layers of the laminate consist of the polymer Topas, 50 microns thick and the middle layer is Corning’s ribbon alumina, 40 microns thick. For brevity, the laminate is called “TAT”. The permittivities of the Topas and alumina are 2.5 and 10 respectively, and that of the 50/40/50 TAT laminate is 3.2 in a direction transverse to the plane of the laminate. The individual loss tangents are about 0.0002, and the loss tangent of the TAT laminate has about the same value. Thus, TAT has significantly lower loss with a lower effective permittivity than other PCB materials currently available. These dielectric properties have been measured experimentally at 10 and 15 GHz. The permittivity and loss tangents can also be predicted accurately using extremely simple analytical formulae. This makes predicting the properties of TAT structures with different dimensions very easy. A TAT strip line has been modeled and found to have an effective permittivity of 2.3. The machining of TAT is somewhat incompatible with conventional PCB shop practice. However, laser drilling and cutting are perfectly practicable. In-house processes have been successfully developed, and an external vendor has also developed these capabilities. Copper sheet adheres strongly to the TAT, and the conductivity of the resulting traces is high. Boards for a 77 GHz radar demonstrate the manufacturability of TAT. Mechanical testing of TAT has been carried out, and the measured flexural modulus and stress at failure compare well with calculations. Environmental tests at 80 °C and 80% humidity indicate that TAT is quite robust. Moreover, it is quite possible that TAT itself may satisfy the UL94 criteria, since the alumina may act as a flame retardant. The feasibility of loading Topas with ceramic or fluoropolymer powders to reduce flammability has been investigated, and it has been found that the addition of these powders causes negligible dielectric loss. In summary, laminates of this type are plausible extreme low loss candidates for PCBs for very advanced applications such as 5G and 6G devices.

A wideband transition from substrate integrated suspended parallel strip line (SISPSL) to differential shielded GCPW

AbstractIn this paper, a novel wideband substrate integrated suspended parallel strip line (SISPSL) to differential shielded grounded coplanar waveguide (GCPW) transition is proposed. By embedding the traditional double‐side parallel‐strip line inside multilayer boards, SISPSL has the advantage of self‐packaging and there is almost no radiation loss. SISPSL has inherent differential transmission properties, and a transition from SISPSL to differential GCPW is designed based on multilayer boards. The measured bandwidth of the back‐to‐back transition is from 0.01 to 40 GHz.

Simulation method of debris cloud from fiber-reinforced composite shield under hypervelocity impact

A Whipple shield is a double-plate structure commonly used to protect spacecraft from space fragments. The space fragments hit the outer plate and break into a debris cloud with dispersed energy and momentum, which reduces their risk of penetrating the bulkhead. With the development of high-performance materials, for example, high-performance fiber composites, traditional Whipple shields have evolved into advanced complex shields. Using the finite element and smoothed-particle hydrodynamics adaptive method and mesoscopic modeling technology, this study aims to establish a numerical model for fiber-reinforced composite shields under hypervelocity impact. Several mesoscale models for fiber-reinforced composites for problems under hypervelocity impact have been established. These models can be meshed with high-quality elements that satisfy aerospace engineering requirements (identify hazardous fragments in the debris cloud) while retaining the main structural features of materials. We established a numerical model by combining the finite element and smoothed-particle hydrodynamics adaptive method and existent mesoscale models. Using laminates, 2D woven fiber-reinforced plastics, and 3D woven fiber-reinforced composites as examples, numerical simulations of the debris cloud generated by an aluminum ball under hypervelocity impact were conducted. The simulation results, which are highly consistent with the experimental results of the debris cloud shape, accurately reflect the failure features of laminates, that is, fiber fracture and delamination. Simulation results show that the fiber-reinforced composite has better protection than the aluminum plate at the same areal density. By comparing the debris clouds generated by the hypervelocity impact on different fiber-reinforced composite shields, it can be argued that composite knit modes strongly affect the protective effect of fiber-reinforced composites. This work shows that the simulation method combining the finite element and smoothed-particle hydrodynamics adaptive method and mesoscopic modeling is a powerful tool for simulating the Whipple shield with a fiber-reinforced composite. More importantly, this method can also be applied to other Whipple shields with complex structures and advanced materials, for example, other composite materials, metal foam materials, and multilayer board protective structures.

CMU Array: A 3D nanoprinted, fully customizable high-density microelectrode array platform.

Microelectrode arrays provide the means to record electrophysiological activity critical to brain research. Despite its fundamental role, there are no means to customize electrode layouts to address specific experimental or clinical needs. Moreover, current electrodes demonstrate substantial limitations in coverage, fragility, and expense. Using a 3D nanoparticle printing approach that overcomes these limitations, we demonstrate the first in vivo recordings from electrodes that make use of the flexibility of the 3D printing process. The customizable and physically robust 3D multi-electrode devices feature high electrode densities (2600 channels/cm2 of footprint) with minimal gross tissue damage and excellent signal-to-noise ratio. This fabrication methodology also allows flexible reconfiguration consisting of different individual shank lengths and layouts, with low overall channel impedances. This is achieved, in part, via custom 3D printed multilayer circuit boards, a fabrication advancement itself that can support several biomedical device possibilities. This effective device design enables both targeted and large-scale recording of electrical signals throughout the brain.

An inner boundary condition of moisture diffusion model for simulating transient nonlinear moisture transport in Chinese fir

This paper proposed an inner boundary condition of moisture diffusion model for simulating transient nonlinear moisture transport of Chinese fir (Cunninghamia lanceolata). The inner boundary condition is serviced for simulate the moisture diffusion of multi-layer boards and is mainly used for the boundary conditions inside component, which presents the diffusion of moisture between wood and its adjacent wood. Furthermore, the established simulation model contains fiber orientation information and is used to simulate the moisture diffusion under different boundary conditions, which considers the constrained boundary. Simulation of simple boundary condition models and the proposed inner boundary condition model under different boundary conditions for multilayer board specimen exposed to constant temperature and constant humidity with a known initial moisture content, and the model was then validated in a laboratory climate chamber. Different from the simple boundary condition model the direct error of the proposed inner boundary model was less than 2% (moisture content), which indicates the proposed inner boundary condition could improve the accuracy of moisture diffusion model. The results show that the inner boundary condition model can comprehensively analyze the transient nonlinear moisture transfer process in different fiber directions with high accuracy.

Study on properties of Ca0.9La0.067TiO3‐0.01Al2O3 ceramics reinforced PSAE/fiber composite substrate with high εr

AbstractA “self‐permeation” method was used to fabricate a Ca0.9La0.067TiO3‐0.01Al2O3 (CLT)‐reinforced polysilylaryl‐enyne/fiber multilayer board with different volume fractions of CLT (0–40 vol%). The microstructure, dielectric, mechanical, and thermal properties were fully studied. The results showed that the composite with optimal dielectric properties (εr∼8.75, tanδ∼0.0043) could be obtained when the volume fraction of CLT reached 30 vol%. Meanwhile, the thermal conductivity reached a high level of 0.644 W/(m·K) and 0.762 W/(m·K) at Z and X/Y directions, respectively. Due to the high decomposition temperature of PSAE, Td5 (the temperature corresponding to 5% weight loss) of composite loading with 30 vol% CLT was higher than 900℃, which indicates an excellent thermal resistance. And the bending strength could reach 115.3 MPa indicating excellent mechanical property. The novel polysilylaryl‐enyne/fiber/Ca0.9La0.067TiO3‐0.01Al2O3 multilayer board with excellent performance is expected to be a candidate material for print circuit boards and widely used in the microwave communication field.

Flexible Multi-Layer Circuit Boards Manufacturing using Additive Technology of Inkjet Printing

The technology of inkjet printing for the formation of multilayer flexible commutation boards is presented. The technology improves the ergonomics of the electronic devices around a person, making it possible to create products of a new generation: "smart clothes", "smart skin" and "Laboratories on a Chip". One of the main advantages and features of flexible printed electronics is the ability to use organic polymers as a substrate material to provide conformal hybrid integration.

An Application of the Subwavelength Periodic Microstrip Guard Trace in High-Speed Circuits

This paper proposed a kind of guard traces based on a subwavelength periodic structure to reduce the far-end crosstalk (FEXT) of parallel microstrip lines in the PCB. This technology can be used to improve the false triggering and signal transmitting capacity of a multiconductor transmission line circuit system. In order to explore the present novel guard trace effect on isolating electromagnetic interference (EMI), the frequency response of the mutual capacitance and mutual inductance of the overall circuit system was provided and an equivalent circuit model was built. In comparison to the conventional microstrip line for isolating the EMI between parallel microstrip lines, the novel guard trace can efficiently reduce the mutual capacitance and mutual inductance of the overall circuit system. Thus, it is favorable for suppressing the crosstalk between microstrip lines. The <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$S$ </tex-math></inline-formula> -parameters calculation result showed that this kind of subwavelength periodic microstrip guard trace can isolate the EMI between two microstrip lines more effectively. Particularly, the conventional grounded guard trace needs a lot of dense grounded holes, which severely influences the wiring design of various layers of a multilayer circuit board. However, the proposed guard trace requires only one grounded hole, which has little influence on the circuit wiring of each layer of a multilayer printed circuit board. In our experiment, the step function signal of 30 ps rise time was imported into one microstrip line to measure the FEXT of the other microstrip line. It was demonstrated by the measurement result that the subwavelength periodic microstrip guard trace can reduce the FEXT to be below 5% of the transmission signal amplitude and is more flexible in practice. In compliance with the actual demand for a high-speed circuit, three isolation structures were proposed, and their isolation effects on the electromagnetic coupling between microstrip lines were verified individually.

Additives to the electrolyte for copper plating of through-holes in multilayer printed-circuit boards

Additives to the electrolyte for copper plating of through-holes in multilayer printed-circuit boards

Faraday shield for electronic components of a multilayer microwave board

Wydawnictwo SIGMA-NOT wydaje czasopisma fachowe informujące swoich czytelników o najnowszych osiągnięciach naukowych i nowoczesnych rozwiązaniach technicznych w Polsce i na świecie, popularyzuje problemy techniczne oraz poszerza wiedzę i kulturę techniczną.