Mixed-criticality Multicore Systems Research Articles

LEC-MiCs: Low-Energy Checkpointing in Mixed-Criticality Multi-Core Systems

With the advent of multicore platforms in designing Mixed-Criticality Systems (MCSs), simultaneous management of reliability and energy while guaranteeing an acceptable service level for low-criticality tasks is a crucial challenge. To ensure the reliability of the MCSs against transient faults, fault-tolerant techniques are employed which will increase energy consumption. To mitigate the energy overhead, the Dynamic Voltage and Frequency Scaling (DVFS) technique will be exploited. However, this technique might lead to violating the timing constraints of high-criticality tasks. Therefore, this paper presents, for the first time, the low-energy checkpointing technique to guarantee the reliability of multiple preemptive periodic mixed-criticality tasks in a multicore platform. In contrast to the previous works in checkpointing technique which consider a specific number of faults that all the tasks in the system should tolerate, in this paper, the number of tolerable faults for each execution section of a task, and in each voltage and frequency level is determined through proposed formulas to meet the reliability target based on safety standards. Then, our proposed method determines the number of checkpoints and their non-uniform intervals for the normal and overrun sections of each task to reduce energy consumption, respectively. Moreover, the unified demand bound function (DBF) analysis is proposed for analyzing the schedulability of the task set, where each high-criticality task meets its timing and reliability constraints, and low-criticality tasks execute based on their derived guaranteed periods in each operational mode of the system. Experimental results show that our proposed scheme meets the timing and reliability constraints while at the same time, improving the QoS of low-criticality tasks, and managing energy consumption with an average of 29.49%, and 32.78%, respectively.

Response time analysis of memory-bandwidth-regulated multiframe mixed-criticality systems

The multiframe mixed-criticality task model eliminates the pessimism in many systems where the worst-case execution times (WCETs) of successive jobs vary greatly by design, in a known pattern. Existing feasibility analysis techniques for multiframe mixed-criticality tasks are shared-resource-oblivious, hence unsafe for commercial-off-the-shelf (COTS) multicore platforms with a memory controller shared among all cores. Conversely, the feasibility analyses that account for the interference on shared resource(s) in COTS platforms do not leverage the WCET variation in multiframe tasks. This paper extends the state-of-the-art by presenting an analysis that incorporates the memory access stall in memory-bandwidth-regulated multiframe mixed-criticality multicore systems. An exhaustive enumeration approach is proposed for this analysis to further enhance the schedulability success ratio. The running time of the exhaustive analysis is improved by proposing a pruning mechanism that eliminates the combinations of interfering job sequences that subsume others. Experimental evaluation, using synthetic task sets, demonstrates up to 72% improvement in terms of schedulability success ratio, compared to frame-agnostic analysis.

Toward the Design of Fault-Tolerance-Aware and Peak-Power-Aware Multicore Mixed-Criticality Systems

Mixed-Criticality (MC) systems have recently been devised to address the requirements of real-time systems in industrial applications, where the system runs tasks with different criticality levels on a single platform. In some workloads, a high-critically task might overrun and overload the system, or a fault can occur during the execution. However, these systems must be fault-tolerant and guarantee the correct execution of all high-criticality tasks by their deadlines to avoid catastrophic consequences, in any situation. Furthermore, in these MC systems, the peak power consumption of the system may increase, especially in an overload situation and exceed the processor Thermal Design Power (TDP) constraint. This may cause generating heat beyond the cooling capacity, resulting the system stop to avoid excessive heat and halting the processor. In this paper, we propose a technique for dependent dual-criticality tasks in fault-tolerant multi-core MC systems to manage peak power consumption and temperature. The technique develops a tree of possible task mapping and scheduling at design-time to cover all possible scenarios and reduce the low-criticality task drop rate in the high-criticality mode. At run-time, the system exploits the tree to select a proper schedule according to fault occurrences and criticality mode changes. Experimental results show that the average task schedulability is 74.14% on average for the proposed method, while the peak power consumption and maximum temperature are improved by 16.65% and 14.9 C on average, respectively, compared to a recent work. In addition, for a real-life application, our method reduces the peak power and maximum temperature by up to 20.06% and 5 C, respectively, compared to a state-of-the-art approach.

REALISM: Reliability-aware energy management in multi-level mixed-criticality systems with service level degradation

Mixed-criticality embedded systems, as the next-generation of safety-critical systems, are increasingly employed in the industry due to consolidating functionalities with varying criticality levels onto the same computing platform. Technology scaling, battery-supplied design, and heavy computation in mixed-criticality systems necessitate employing energy management techniques. Due to the degrading effects of these techniques on the system's reliability, minimizing energy consumption and meeting tasks’ timing constraints without sacrificing the reliability requirement is a vital challenge in designing mixed-criticality systems. In this paper, we propose REALISM; a novel Reliability- and Energy-Aware task mapping and scheduling approach in multi-core mixed-criticality systems with three levels of criticality. To guarantee the desired QoS of tasks from lower levels of criticality, our approach exploits the degraded WCET for these imprecise mixed-criticality tasks in critical modes. In design time, tasks are mapped to cores based on dynamic switching between different system utilizations in different modes. In each core, task instances are scheduled according to their virtual deadlines, which are calculated based on the system's overrun tolerance limit (TL) and the desired QoS, by time reservation. Then our heuristic DVFS techniques are applied in order to reduce system energy consumption. Our simulation results show that the REALISM provides on average ~41.5% (up to 52.7%) energy savings compared to the approach without energy management with 100% QoS degradation in lower levels of criticality. Also, with guaranteeing the system's desired QoS, REALISM provides on average ~38% (up to 46.2%) energy savings compared to the approach without energy management.

Tolerating Permanent Faults with Low-Energy Overhead in Multicore Mixed-Criticality Systems

Due to the battery-operated nature of embedded Mixed-Criticality Systems, simultaneous energy and reliability management is a cru-cial issue in designing these systems. We propose two comprehensive schemes, MC-2S and MC-4S, which tolerate permanent faults through exploiting the inherent redundancy of multicore systems for applying standby-sparing technique and maintaining the system re-liability against transient faults with low energy overhead. In these schemes, two copies of each high-criticality task are scheduled on different cores to guarantee their timeliness in case of permanent fault occurrence. In order to guarantee the quality of service of low-criticality tasks, in the MC-2S scheme, sufficient slack time is reserved to schedule a backup task for each low criticality task on an al-ternative core. The MC-4S scheme exploits semi-partitioned scheduling in which low-criticality tasks migrate to other cores in case of permanent fault or overrun occurrence on one of the cores. We also develop a Demand Bound Function schedulability analysis to guar-antee the timeliness, and propose a preference-oriented scheduling algorithm along with reliability-aware DVFS method for energy saving. The proposed schemes provide up to 57% (39% on average) energy saving, and enhance the acceptance ratio of the system significantly in comparison to other state-of-the-art methods.

Power-Aware Runtime Scheduler for Mixed-Criticality Systems on Multicore Platform

In modern multi-core Mixed-Criticality (MC) systems, a rise in peak power consumption due to parallel execution of tasks with maximum frequency, specially in the overload situation, may lead to thermal issues, which may affect the reliability and timeliness of MC systems. Therefore, managing peak power consumption has become imperative in multi-core MC systems. In this regard, we propose an online peak power and thermal management heuristic for multi-core MC systems. This heuristic reduces the peak power consumption of the system as much as possible during runtime by exploiting dynamic slack and per-cluster Dynamic Voltage and Frequency Scaling (DVFS). Specifically, our approach examines multiple tasks ahead to determine the most appropriate one for slack assignment, that has the most impact on the system peak power and temperature. However, changing the frequency and selecting a proper task for slack assignment and a proper core for task re-mapping at runtime can be time-consuming and may cause deadline violation which is not admissible for high-criticality tasks. Therefore, we analyze and then optimize our run-time scheduler and evaluate it for various platforms. The proposed approach is experimentally validated on the ODROID-XU3 (DVFS-enabled heterogeneous multi-core platform) with various embedded real-time benchmarks. Results show that our heuristic achieves up to 5.25% reduction in system peak power and 20.33\% reduction in maximum temperature compared to an existing method while meeting deadline constraints in different criticality modes.

On the Scheduling of Energy-Aware Fault-Tolerant Mixed-Criticality Multicore Systems with Service Guarantee Exploration

Advancement of Cyber-Physical Systems has attracted attention to Mixed-Criticality Systems (MCSs), both in research and in industrial designs. As multicore platforms are becoming the dominant trend in MCSs, joint energy and reliability management is a crucial issue. In addition, providing guaranteed service level for low-criticality tasks in critical mode is of great importance. To address these problems, we propose “LETR-MC” scheme that simultaneously supports certification, energy management, fault-tolerance, and guaranteed service level in mixed-criticality multicore systems. In this paper, we exploit task-replication to not only satisfy reliability requirements, but also to improve the QoS of low-criticality tasks in overrun situation. Our proposed LETR-MC scheme determines the number of replicas, and reduces the execution time overlap between the primary tasks and replicas. Moreover, instead of ignoring low-criticality tasks or selectively executing them without any guaranteed service level in overrun mode, it mathematically explores the minimum achievable service guarantee for each low-criticality task in different execution modes, i.e., normal, fault-occurrence, overrun and critical operation modes. We develop novel unified demand bound functions (DBF), along with a DVFS method based on the proposed DBF analysis. Our experimental results show that LETR-MC provides up to 59 percent (24 percent on average) energy saving, and significantly improves the service levels of low-criticality tasks compared to the state-of-the-art schemes.

Optimization of Fault-Tolerant Mixed-Criticality Multi-Core Systems with Enhanced WCRT Analysis

This article proposes a novel optimization technique of fault-tolerant mixed-criticality multi-core systems with worst-case response time (WCRT) guarantees. Typically, in fault-tolerant multi-core systems, tasks can be replicated or re-executed in order to enhance the reliability. In addition, based on the policy of mixed-criticality scheduling, low-criticality tasks can be dropped at runtime. Such uncertainties caused by hardening and mixed-criticality scheduling make WCRT analysis very difficult. We show that previous analysis techniques are pessimistic as they consider avoidably extreme cases that can be safely ignored within the given reliability constraint. We improve the analysis in order to tighten the pessimism of WCRT estimates by considering the maximum number of faults to be tolerated. Further, we improve the mixed-criticality scheduling by allowing partial dropping of low-criticality tasks. On top of those, we explore the design space of hardening, task-to-core mapping, and quality-of-service of the multi-core mixed-criticality systems. The effectiveness of the proposed technique is verified by extensive experiments with synthetic and real-life benchmarks.

DOL-BIP-Critical: a tool chain for rigorous design and implementation of mixed-criticality multi-core systems

Mixed-criticality systems are promoted in industry due to their potential to reduce size, weight, power, and cost. Nonetheless, deploying mixed-criticality applications on commercial multi-core platforms remains a highly challenging problem. To name a few reasons: (i) Industrial mixed-criticality applications are usually complex reactive applications, which cannot be specified by traditional, e.g., dataflow-based, models of computation. Appropriate mixed-criticality models of computation built upon Vestal’s assumptions are missing; (ii) Scheduling such applications on multicores with shared resources, such as memory buses, requires that any timing interference among applications of different criticality is bounded in order to guarantee—the necessary for certification—temporal isolation and to enable incremental design; (iii) The implementation of isolation-preserving mixed-criticality schedulers is itself subject to certification. Hence, it needs to be not only efficient, but also provably correct. This paper proposes, for the first time, a complete design flow covering all aspects from specification, using a novel mixed-criticality aware model of computation (DOL-Critical), to correct-by-construction implementation, using the principle ‘what you verify is what you generate’ which is based on a novel variant of task automata. We demonstrate the applicability of our design flow with an industrial avionic test case on the state-of-the-art Kalray MPPA®-256.

Multicore Mixed-Criticality Systems: Partitioned Scheduling and Utilization Bound

In mixed-criticality (MC) systems, multiple activities with various certification requirements (thus with different criticality levels) can co-exist on shared hardware platforms, where multicore processors have emerged as the de facto computing engines. In this paper, by using the partitioned earliest-deadline-first with virtual deadlines (EDF-VDs) scheduler for a set of periodic MC tasks running on multicore systems, we derive a criticality-aware utilization bound for efficient feasibility tests and then identify its characteristics . Our analysis shows that the bound increases with increasing number of cores and decreasing system criticality level. We show that, since the utilizations of MC tasks at different criticality levels can vary considerably, the utilization contribution of a task on different cores may have large variations and thus can significantly affect the system schedulability under the EDF-VD scheduler. Based on these observations, we propose a novel and efficient criticality-aware task partitioning algorithm (CA-TPA) to compensate for the inherent pessimism of the utilization bound. In order to improve the system schedulability, the task priorities are determined according to their utilization contributions to the system in CA-TPA. Moreover, by analyzing the utilization variations of tasks at different levels, we develop several heuristics to minimize the utilization increment and balance the workload on cores. The simulation results show that the CA-TPA scheme is very effective in achieving higher schedulability ratio and yielding balanced workloads. The actual implementation in Linux operating system further demonstrates the applicability of CA-TPA with lower run-time overhead, compared to the existing partitioning schemes.

Resource Sharing in Multicore Mixed-Criticality Systems: Utilization Bound and Blocking Overhead

In mixed-criticality (MC) system, diverse application activities with various certification requirements (different criticality) can share a computing platform, where multicore processors have emerged as the prevailing computing engines. Focusing on the problem of resource access contention in multicore MC systems, we analyze the synchronization issues and blocking characteristics of the Multiprocessor Stack Resource Policy (MSRP) with both priority and criticality inversions among MC tasks being considered. We develop the first criticality-aware utilization bound under partitioned Earliest Deadline First (EDF) and MSRP by taking the worst case synchronization overheads of tasks into account. The non-monotonicityof the bound where it may decrease when more cores are deployed is identified, which can cause anomalies in the feasibility tests. With the objective to improve system schedulability, a novel criticality-cognizant and resource-oriented analysis approach is further studied to tighten the bound on the synchronization overheads for MC tasks scheduled under partitioned EDF and MSRP. The simulation results show that the new analysis approach can effectively reduce the blocking times for tasks (up to 30 percent) and thus improve the schedulability ratio (e.g., 10 percent more). The actual implementation in Linux kernel further shows the practicability of partitioned-EDF with MSRP (with run-time overhead being about 3 to 7 percent of the overall execution time) for MC tasks running on multicores with shared resources.

Reusable generic design patterns for mixed-criticality systems based on DREAMS

Multi-core mixed-criticality systems are complex solutions that provide benefits regarding lower power consumption, size, weight and cost and better performance and scalability, compared with single-core architectures. However, these systems where virtualization mechanisms such as hypervisors are used for integrating functionalities with different criticality levels into the same hardware platform and where on-chip and off-chip communication systems are implemented for communicating, imply certification challenges due to their complexity. Those challenges to certification are supported by the fact that today’s safety-related standard focus on single computing systems where spatial and temporal interferences are quite probable. Multi-core architectures enable sharing resources (e.g., cache memory, I/Os) between more than one processor at the same time, facilitating the appearance of interferences which may hinder the achievement of the spatial and temporal independences.This paper analyses the certification challenges in mixed-criticality systems and identifies some reusable generic solutions to overcome those challenges. The solutions presented in this paper are integrated into a safety wind turbine system that follows the design style introduced in European project DREAMS.

Using NPS-F for mixed-criticality multicore systems

Hard real-time multiprocessors scheduling has recently seen the flourishing of semi-partitioned scheduling algorithms -- a category of scheduling schemes that combine elements of partitioned and migrative scheduling to allow more efficient processor usage, while providing improved schedulability guarantees at the same time. Yet, so far, semi-partitioning has not made any inroads into mixed-criticality scheduling. We aim to address this by proposing a way of combining mixed-criticality scheduling with semi-partitioning. Specifically, we adapt the NPS-F scheduling algorithm [1] for this purpose. The timeslot-based dispatching of NPS-F allows for fairness and responsiveness for lower-criticality workloads with no detriment to the schedulability guarantees of high-criticality tasks.