Multichip Module Technology Research Articles

Free-Space Optical Crossbar-Switches for Self-Routing and Strictly Nonblocking Networks

A space-division multiplexing switch was fabricated without precise alignments using electro-photonic multichip module technologies. Design rules and fabrication processes for the switch are described. Experiments show the switch has capacity for 1-Gigabit-per-second data transmission.

Performance-driven routing with multiple sources

Existing routing problems for delay minimization consider the connection of a single source node to a number of sink nodes, with the objective of minimizing the delay from the source to all sinks, or a set of critical sinks. In this paper, we study the problem of routing nets with multiple sources, such as those found in signal busses. This new model assumes that each node in a net may be a source, a sink, or both. The objective is to optimize the routing topology to minimize the total weighted delay between all node pairs (of a subset of critical node pairs). We present a heuristic algorithm for the multiple-source performance driven routing tree problem based on efficient construction of minimum diameter minimum-cost Steiner trees. Experimental results on random nets with submicrometer CMOS IC and MCM technologies show an average of 12.6% and 21% reduction in the maximum interconnect delay, when compared with conventional minimum Steiner tree based topologies. Experimental results on multisource nets extracted from an Intel processor show as much as a 16.1% reduction in the maximum interconnect delay, when compared with conventional minimum Steiner tree based topologies.

Performance analysis of MCM systems

When a new interconnection technology is developed, it is of interest to accurately characterize its electrical features from a system's perspective and evaluate its possible application areas and boundary limits. Accurate design models can then be extracted and used for a correct design and implementation of electronic systems. This paper describes a case study used to characterize a five-layer thin-film multichip module (MCM) technology developed for high speed digital applications. The high frequency characterization of the substrate has been combined with the electrical models of the input/output (I/O) buffers of a complementary metal-oxide-semiconductor (CMOS) technology to accurately analyze the signal propagation with a network simulation tool. A test chip and MCM module have been developed to evaluate how the maximum system frequency is influenced by different quantities such as line length, type of driver or noise. Experimental results, showing a good match with simulations, demonstrate the effectiveness of this approach. It is also shown how it is possible to take advantage of some apparently limiting features of thin-film MCM's to actually improve the system performance.

Cost-effective multichip module manufacture using passive substrate fault tolerance

The widespread use of multichip module (MCM) technology is currently restricted by high substrate cost, poor substrate yield and low quality level of mounted components: the known good die (KGD) problem. This paper examines three yield enhancing fault tolerance techniques suitable for use with conventional (passive) substrates with the aid of a generic processor-memory MCM architecture. The use of spare memory dies and a paged address space is shown to be a very effective solution to the KGD problem for this particular architecture.

Fundamentals of MCM Testing and Design-for-Testability

Products motivated by performance-driven and/or density-driven goals often use Multi-Chip Module (MCM) technology, even though it still faces several challenging problems that need to be resolved b...

MCM packaging for present- and next-generation high clock-rate digital- and mixed-signal electronic systems: areas for development

This paper will review the manner in which electronic packaging will be driven by the high-level performance requirements of next-generation mixed-signal systems, and by the evolving characteristics of next-generation integrated circuits. Present performance and fabrication limitations of the multichip module (MCM) technology will be discussed, as well as possible approaches to remove or minimize these constraints. Areas fruitful for research by the simulation community will be noted. This review is intended to provide a broad applications-oriented framework for the theoretical and simulation-directed papers in this special issue on interconnect and packaging.

Photonic packaging using laser/receiver arrays and flexible optical circuits

Optoelectronic modules and multifiber optical connectors were successfully applied to intrasystem interconnection within a large telecommunication transmission terminal. The optoelectronic modules are 32-channel 850 nm vertical cavity surface emitting laser (VCSEL) and detector arrays packaged using multichip module technology system components include multimode silica optical fibers and silicon V-groove technology based multifiber optical connectors. The system architecture presented particularly difficult challenges for parallel optics because of complex cable assemblies required by the fan-out nature of the cables and the signal bifurcation needed to accomplish duplication, Nevertheless, the experiments completed demonstrate that parallel optics can dramatically increase the capacity of telecommunications equipment with no significant changes in system or physical architecture. The density of the optical modules and connectors clearly demonstrates that optical interconnection technology will be able to support the input/output (I/O) requirements of new generations of integrated circuit technology.

Development of an imaging microstrip gas chamber with a 5 cm × 5 cm area based on multi-chip module technology

We have developed a two-dimensional MicroStrip Gas Chamber (MSGC) with a 5 cm × 5 cm detection area based on Multi-Chip Module (MCM) technology. It has a 17 μm thin substrate, 254 anodes, and 255 back strips both with a 200 μm pitch. The MSGC was mounted on a large Pin Grid Array (PGA) package having more than 500 pins, which allowed us to readily connect a large number of signals of an imaging MSGC with readout electronics. In this article, we report on the capability of the MSGC as an X-ray imaging detector operated near an intense X-ray source. In order to get stable operation at high X-ray intensity, we found one solution using a ∼ 20 μm substrate and a surface resistivity of ∼ 10 15 Ω/square. The control of the surface resistivity was carried out by coating the polyimide substrate with organic titanium. This improvement enabled the MSGC to be stably operated for ∼ 10 3 s under a very high counting rate of 10 7 Hz/mm 2. The MSGC is also being operated for several months under medium intensity X-rays from an X-ray generator. In this measurement, high quality digital X-ray images with ∼ 60 μm RMS (Root Mean Square) position resolution were obtained with a simple-readout method of recording only the positions of hit electrodes.

A Cost Comparison of New MCM Technologies

In the course of technology development, decisions must be made about the nature of future progress. To aid in this decision‐making process, Technical Cost Modelling has evolved from traditional cost modelling methodologies in order to accurately predict the dynamics of a system of manufacture. As an example of the utility of this methodology, a new MCM technology has been chosen for cost analysis: deposited dielectric on laminate (MCM‐D/L) electronic packages. For this illustration, the cost drivers are determined and cost/performance trade‐offs with MCM‐D and MCM‐L analysed. With this disciplined approach to cost prediction, technology development cost issues can be decided thoroughly yet fairly quickly.

A modular massively parallel computing approach to image-related processing

A modular massively parallel computing (Modular-MPC) philosophy to image-related processing is discussed in this paper The approach is based on application-specific configurations of generic fine-grain Single Instruction stream operating on Multiple Data (SIMD) streams massively parallel computing modules to achieve high performance and maximal flexibility and programmability while remaining cost-effective. The need for a software architecture to allow programming such systems is highlighted and the implementations on current Modular-MPC systems are described. The experience with ASTRA, a Modular-MPC testbed system, in image related application development and system performance has led to a technology road-map using VLSI, MCM, and monolithic WSI technologies aiming at 'future proofing' of the Modular-MPC concept and systems achieving T (10/sup 12/) operations per second performance. This experience and progress are discussed together with the implementation of three image-related processing applications.

PE-MOCVD of Dielectric Thin Films: Challenges and Opportunities

The current trend in electronic-systems technology is to produce compact, lighter, low-power-dissipating, affordable, reliable, and mobile information systems. These factors favor the augmentation of interface systems that sense, source, store, display, and actuate with artificial-intelligence strategies. Herein lies the opportunity to introduce novel technologies based on integrated multi-component oxide (e.g., titanates, niobates, and tantalates) films into usable systems. In particular the oxygen octahedra class of materials (e.g., (Ba,Sr)TiO3 or BST, Pb(Zr,Ti)O3 or PZT, layered SrBi2Ta2O9 or SBT, and polytitanates) that exhibit high permittivities; large electromechanical-coupling coefficients; and pyroelectric, electro-optic, and ferroelectric effects are of interest. They are being evaluated, due to growing demand for compatibility with integrated-circuit (IC) technology, for a variety of applications. These include nonvolatile memories, ultralargescale-integration (ULSI) dynamic random-access memories (DRAMs), decoupling capacitors, piezoelectric sensors and actuators, pyroelectric detectors, and neural network components. Moreover in high-performance multichip-module (MCM) technology, there remains a vital need for the replacement of discrete passive devices, which occupy valuable real estate, by embedded ones. These high-density interconnect structures will play a significant role in nondigital electronic modules including mixed-mode circuits, power conversion and conditioning, microwave transmit/receive (T/R), and optoelectronics. Table I specifically illustrates some electronic applications along with their estimated requirements.

A chips-first multichip module implementation of passive and active test coupons utilizing Texas Instruments' high density interconnect technology

In this paper, we describe the development and measurement of two separate test structures, or "coupons" to assess the performance of Texas Instruments' "chips-first" multichip module technology at high operating clock rates, A "passive" coupon containing a variety of microstrip and stripline transmission line structures allowed the measurement of DC and AC signal amplitude losses in long conductors, as well as assessments of crosstalk and reflections as functions of line dimensions and spacings. An "active" coupon containing 16 interconnected gallium arsenide (GaAs) chips of two separate designs allowed the assessment of this MCM technology's ability to support the propagation of digital signals at clock and pulse rates above 500 MHz, and the ability of the power and ground plane structures to deliver clean power to the operating components. These comprehensive tests have allowed the development of design rules for developing future high performance systems using this unique packaging technology. Finally, comments are presented regarding future directions for this technology to lower manufacturing costs while preserving the high levels of operational performance demonstrated by these tests.

A novel capacitor technology based on porous silicon

A capacitor based on an electrochemically etched macroporous silicon substrate and a layered dielectric (ONO) is presented. This solid-state technology allows us to realize values of specific capacitance which so far could only be reached by electrolytic capacitors. The dependence of the capacitance on temperature, frequency, applied bias and time of operation is found to be negligible. Due to a low series resistance and a operating temperature of at least 200 °C the device withstands high a.c. currents. Being a silicon chip, the capacitor is fully compatible with today's surface mounted device and multi-chip module technologies.

Grape-4: A Teraflops Machine for N-Body Simulations

We have developed a massively parallel special-purpose computer system for N-body simulations, GRAPE-4 (GRAvity-PipE 4). The GRAPE-4 system is designed for high-accuracy simulations of dense stellar systems. The GRAPE-4 calculates gravitational forces, their derivatives in time and potential energies. It has a hardware for prediction of positions and velocities, which is used for the individual timestep scheme. Using multi-chip module technology, we integrated 1692 chips of 640 megaflops performance. The peak speed of GRAPE-4 is 1.08 teraflops.

Design and evaluation of an epoxy three-dimensional multichip module

A low-cost, three-dimensional multichip module (MCM) technology provides greatly improved system density and reduced mass over planar packaging technologies. The technology offers a high degree of testability that negates the need for known good die (KGD) procurement. Testing is achieved with very low cost overheads and with no increase in the volume of the module. The technology allows complete, heterogeneous systems to be packaged and interconnected in a single, ultra-dense module. The electrical characteristics of the technology are comparable to standard chip packages. However, the parasitics due to package-to-package interconnects are eliminated. This removes the dominant cause of parasitics, dramatically improving the electrical characteristics. A programmable integrated camera and image processing system has been developed which incorporates a grayscale camera, analog-to-digital conversion, four programmable processors and memory. Utilizing the three-dimensional multichip module technology, the system, which consists of nine chips and 36 discrete components, has an overall volume of 4.77 ml. This is approximately six times more dense than an advanced PCB implementation. The system forms the first stage in the design and manufacture of a portable video communications device. For such applications, low system volume and mass are key attributes. The system demonstrates the potential of the packaging technique for the integration of complete mixed signal systems incorporating sensors and processing. Further developments to the technology will provide increased module density, improved routing capacity, and electrical performance.

ＭＣＭ実用化の動向 ＭＣＭの新技術 フィルム積層方式薄膜多層配線板

ＭＣＭ実用化の動向 ＭＣＭの新技術 フィルム積層方式薄膜多層配線板

ＭＣＭ実用化の動向 ＭＣＭの新技術 ビアアレイ基板とＣＡＤによる配線

ＭＣＭ実用化の動向 ＭＣＭの新技術 ビアアレイ基板とＣＡＤによる配線

ＭＣＭ実用化の動向 ＭＣＭの実用化例 コンピュータにおけるＭＣＭとベアチップ実装技術

ＭＣＭ実用化の動向 ＭＣＭの実用化例 コンピュータにおけるＭＣＭとベアチップ実装技術

ＭＣＭ実用化の動向 ＭＣＭの実用化例 １６０Ｇｂｉｔ／ｓ ＡＴＭ交換システムにおけるマルチチップモジュール技術

ＭＣＭ実用化の動向 ＭＣＭの実用化例 １６０Ｇｂｉｔ／ｓ ＡＴＭ交換システムにおけるマルチチップモジュール技術

EARLY FEASIBILITY AND COST ASSESSMENT FOR MULTICHIP MODULE TECHNOLOGIES

Multichip Module (MCM) technologies introduce new levels of complexity in the design and analysis of systems. As a result, early assessment of feasibility and cost are crucial to a successful design effort. We propose an efficient but effective global router based on a multiterminal multicommodity flow model to perform the estimation.