Multichip Module Substrate Research Articles

High-performance MCM routing

The authors describe the multilayer MCM (multichip module) routing problem, and propose an approach for routing high-performance MCMs with the objective of minimizing interconnect delays and crosstalk. They first introduce an approach for rapidly estimating the time-domain response of lossy transmission line trees, and propose a realistic second-order delay model for MCM interconnects. The delay model is used to guide a performance-driven global routing algorithm. Given the 2-D global paths, the next stage is layer assignment. An effective algorithm for constrained layer assignment is developed. Based on the best-known maxcut approximation algorithm (which performs well in practice), a maximal k-color ordering is formulated for minimizing both interlayer and intralayer crosstalk as well as crossings in 3-D MCM substrates. The authors also propose a strategy that exhibits a good tradeoff between circuit performance and design cost, instead of concentrating exclusively on a single objective such as area minimization. >

Application of diamond substrates for advanced high density packaging

The increased speed of integrated circuits (ICs) is accompanied by increased power levels and the need to package the IC chips very close together in order to realize that speed at the system level. Combined, these spell very high power densities and severe thermal problems at the package level, which are difficult to deal with satisfactorily using conventional packaging materials. Recently, the promise of major reductions in the price of synthetic diamond has allowed its consideration for use in electronic thermal management applications, such as multichip module (MCM) substrates, requiring many tens of grams of material ( e.g. substrates 100 mm square and 1 mm thick). Because of the combination of extremely high thermal conductivity and an electrically insulating nature, diamond is an ideal IC packaging or MCM substrate material, not only for reducing chip temperatures in conventional 2D MCM configurations but also in making it practical to implement advanced 2D package configurations and ultrahigh performance, three-dimensionally interconnected MCM packaging approaches. These advanced packaging concepts are made possible because diamond can cool, through lateral thermal conduction to board edges alone, MCMs with many hundreds of watts of power dissipation and at the same time allow for a high density of vertical via interconnects through the diamond substrate.

Interaction of multichip module substrates with high-density connectors

The stresses and strains in substrate-connector systems in multichip modules (MCMs) are discussed. Simultaneous stresses were applied as structural loads in combined stress models. Modeling results show that definite relations exist between connector pitch, length, substrate thickness and material, and stresses in a connector body. >

Co-integration of optoelectronics and submicrometer CMOS

The rapid emergence of multichip modules (MCMs) and the continuing interest in wafer scale integration (WSI) provide important opportunities for successful insertion of high performance optical interconnections into real systems. The large area substrates and the distances between packaged wafer-level modules introduce distances of sufficient length that propagation of very high-speed digital signals along electrical lines will be difficult. At the same time, the substrates allow use of thin film technologies for fabrication of optoelectronic devices, optical waveguides, and other optical elements, drawing on the natural alignment accuracy of photolithographic definition of optical components to avoid several practical problems arising when optical elements are surface mounted. For such reasons, large area silicon wafers provide an important potential application for more aggressive use of optical interconnections. An important issue is growth of GaAs semiconductor regions within a silicon WSI or MCM substrate containing high performance silicon CMOS circuitry, seeking to co-integrate optical and silicon VLSI devices. Experimental studies of submicrometer CMOS device characteristics following thermal simulation of GaAs heteroepitaxial growth are summarized. >

Electron-beam substrate testing approaches 25 cm × 25 cm

Miniaturization in electronics packaging technology require the development of new testing methods. Electron beam techniques have already demonstrated their applicability to the testing of multichip module substrates. Broad application of this technique requires a large scanfield in order to gain flexibility in the size of substrates. The electron optics for beam deflection over an area of 25 cm × 25 cm are being developed. Beam focusing and fast positioning have been experimentally realized. An e-beam spot size of 25 μm is attained in any position within the field at a beam current of 140 nA. The settling time of the beam on a 100 μm pad is 30 μs in the worst case.

Frequency-domain solution for coupled striplines with crossing strips

A frequency-domain approach to the modelling of the propagation of short-rise-time digital pulses along groups of coupled striplines, which are overcrossed or undercrossed by orthogonally positioned signal conductors on adjacent signal planes in a high-density circuit board or multichip module substrate is presented. A solution is presented which has several particular features which are important in the application of this method to real-world modeling problems. The solution significantly simplifies the mathematical formulas which sum the multiple reflections and crosstalk components with the primary digital pulse to generate the final waveform conformations on the multiple conductors. As a result, this method is much easier to implement than earlier techniques, especially as a software kernel for a computer-aided design tool. The method presented reduces the central processing unit time needed to execute these solutions by a nontrivial factor of 2-3 in comparison with a previously published method. The method removes the earlier constraint that the crossing strips on the orthogonal signal layer be uniformly spaced: that is, nonuniformly spaced crossing strips are supported by the mathematical derivation. The derivation allows for nonideal voltage sources.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Multi‐chip Modules for Telecom Applications

System performance can be improved by the use of MCM (multi‐chip module) technology. Better signal transmission properties, lower power dissipation if C‐MOS chips are used and decreased physical volume will be obtained. Today MCM is an expensive technique, but the authors' cost analysis shows that it has the potential to become more cost‐effective than the standard technique of using single chip packages. It can also become more cost‐effective to use the MCM technique than to increase the number of gates on the silicon chip over a certain level. In order to study the properties of MCM technology, a project has been started at the authors' company in which a processor application is built up on three different types of MCM substrates.

4956604 Broad band contactor assembly for testing integrated circuit devices

A micromachining technology for integrating high-performance radio-frequency (RF) passives on CMOS-grade low-cost silicon substrates is developed. The technology can form a thick solid-state dielectric isolation layer on silicon substrate through high-aspect-ratio trench etch and refill. On the non-high-resistivity but low-loss substrate, two metal layers with an inter-metal dielectric layer are formed for integrating embedded RF components and passive circuits. Using the technology, two types of integrated RF filters are fabricated that are band-pass filter and image-reject filter. The band-pass filter shows measured minimum insertion loss of 3.8 dB and return loss better than 15 dB, while the image-reject filter exhibits steeper band selection and achieves better than −30 dB image rejection. A 50 Ω co-planar waveguide (CPW) on the substrate is also demonstrated, showing low loss and low dispersion over the measured frequency range up to 40 GHz. The developed technology proves a viable solution to implementing silicon-based multi-chip modules (MCM) substrates for RF system-in-package (RF-SiP).