Monolithic RF Research Articles

Design of Monolithic RF CMOS Sub-mW Self-Oscillating-Mixers

In this paper, different topologies of RF self-oscillating mixers (SOM), stacking the voltage controlled oscillator (VCO) and the mixer on top of each other, are assessed. Their design considerations to address sub-mW operation suitable to ultra-low power applications are presented. Two configurations of SOM circuits are implemented in 130nm CMOS technology. The obtained results are presented and performances in terms of gain, noise, linearity, area, power consumption and stability over process and mismatch are compared and discussed.

Effects of Back Metal on the DC and RF Characteristics of 3D Stacked InGaAs RF Device for Monolithic 3D RF Applications

In this letter, we demonstrate three-dimensional (3D) stacked InGaAs high-electron-mobility transistors (HEMTs) on Si with back metal for a monolithic 3D RF platform. The devices are fabricated through a wafer bonding technique and the back metal is inserted during the 3D integration process. We investigate the effect of the back metal on the DC and RF performance of 3D stacked InGaAs HEMTs, which are essential to implement the monolithic 3D RF platform. Furthermore, we obtained a current gain cutoff frequency ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">f</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> ) of 307 GHz and a maximum oscillation frequency ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">f</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">MAX</sub> ) of 765 GHz even though it is a 3D stacked device with back metal. The <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">f</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">MAX</sub> value is the highest ever reported in 3D stacked RF transistors.

Monolithically-integrated 3D printed coaxial bandpass filters and RF diplexers: single-band and dual-band

AbstractThe manuscript reports on additively-manufactured (AM) coaxial-resonator-based bandpass filters (BPFs) and RF diplexers. A monolithic integration concept using stereolithography apparatus (SLA) is proposed and discussed in detail. Coupled-resonator-based synthesis alongside full-electromagnetic-based design methods is used for the design of the monolithic filters and RF diplexers. In particular, the paper discusses a new external coupling mechanism for dual-band BPFs that allow to independently control the coupling in each of the BPF passbands. Furthermore, a novel coaxial transmission line-type T-junction is proposed for the design of single- and dual-band RF diplexers. For practical validation purposes, multiple BPF and RF diplexer prototypes were designed, manufactured and tested at S- and C-band demonstrating the applicability of the proposed concept to low-cost, low-loss and low-weight RF components with complex geometrical features.

Monolithic Multiband MEMS RF Front-End Module for 5G Mobile

This work reports a monolithic RF front-end module integrating bulk acoustic wave (BAW) filters, Lamb acoustic wave filters, and electronic RF silicon-on-insulator (RFSOI) switches to deliver single-chip multiband RF front-end module (RF-FEM) manufactured on commercial 200mm RF silicon-on-insulator (RFSOI) foundry technology. BAW and Lamb filters built in the same chip and within the same process enable multiband operation. Vertical System-on-Chip (SoC) integration of MEMS and RFSOI components contributes to footprint reduction up to 50%, compared to system-in-package (SiP) modules, and reduces the integration and design complexity of the modules. At its current state of development, this technology is suitable for diversity receive modules (DRX) for 4G/LTE and 5G bands. Extensive characterization results and case studies demonstrate the robustness of the integrated platform. Further productization of this technology will enable the next generation of hundred-filter 5G sub-6GHz RF-FEMs.

An 18–56-GHz Wideband GaN Low-Noise Amplifier With 2.2–4.4-dB Noise Figure

An 18-56-GHz gallium nitride (GaN) low-noise amplifier (LNA) monolithic microwave integrated circuit (MMIC) is presented in this letter. This LNA is fabricated with commercial 0.1-μm gate-length GaN-on-silicon (GaN/Si) process. The gain is 16-21.5 dB and the |S11| and |S22| are below -5 dB across the band. The noise figure (NF) is 2.2-4.4 dB and the output power at 1-dB compression point (P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sub> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dB</sub> ) is 10-20 dBm. This LNA has four-stage-cascade and common-source structure with 4.8 × 1 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> chip area. The dc power dissipation is 1.4 W. To the best of the author's knowledge, there has been no GaN LNA covering such a wide bandwidth at this frequency range. This LNA shows ultrawide bandwidth, low NF, high linearity, and high robustness. Moreover, it can be directly integrated with GaN power amplifiers (PAs) and switches to realize the monolithic RF front-ends, which can largely reduce the packaging loss and the module volume. This LNA has a great potential in wideband, high-speed, high-reliability, and high-integration applications.

Normalized Nonlinear Semiempirical MOST Model Used in Monolithic RF Class A-to-C PAs

This paper presents a simple but accurate normalized nonlinear large-signal semiempirical MOS transistor model to be used in monolithic RF Class A-to-C PAs. MOS transistor characteristics, saved in lookup tables, are extracted for different PVT corners, allowing the study of the PA performance spread. Model accuracy is ratified by the excellent matching obtained when comparing data algebraically calculated with electrical simulations of hundreds of PAs, and with the measurement data of a fabricated 2.4 GHz PA.

Photosensitive Glass-Ceramics for Heterogeneous Integration

The push for heterogeneous integration requires very unique material properties with respect to processing, material constants, and integration capabilities with other materials (such as copper, II...

2011 RFIC Symposium Mini-Special Issue Editorial

The eight papers that are part of this special mini-special issue were based on papers originally presented at the IEEE Radio Frequency Integrated Circuits (RFIC Symposium, held June 5-10, 2011, in Baltimore, MD. The papers have been distributed in the subsection "Hybrid and Monolithic RF Integrated Circuits. A note has been added to the footnote on the first page of each paper that identifies it as part of the 2011 RFIC Symposium.

A monolithic RF transceiver for DC-OFDM UWB

This paper presents a first monolithic RF transceiver for DC-OFDM UWB applications. The proposed direct-conversion transceiver integrates all the building blocks including two receiver (Rx) cores, two transmitter (Tx) cores and a dual-carrier frequency synthesizer (DC-FS) as well as a 3-wire serial peripheral interface (SPI) to set the operating status of the transceiver. The ESD-protected chip is fabricated by a TSMC 0.13-μm RF CMOS process with a die size of 4.5 × 3.6 mm2. The measurement results show that the wideband Rx achieves an NF of 5–6.2 dB, a max gain of 76–84 dB with 64-dB variable gain, an in-/out-of-band IIP3 of −6/+4 dBm and an input loss S11 of < −10 in all bands. The Tx achieves an LOLRR/IMGRR of −34/-33 dBc, a typical OIP3 of +6 dBm and a maximum output power of −5 dBm. The DC-FS outputs two separate carriers simultaneously with an inter-band hopping time of < 1.2 ns. The full chip consumes a maximum current of 420 mA under a 1.2-V supply.

2010 Radio Frequency Integrated Circuits (RFIC) Symposium Mini-Special Issue

The six papers in this special mini-special issue are based on papers originally presented at the IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, Anaheim, CA, May 23-28, 2010. These papers are distributed in the section "Hybrid and Monolithic RF Integrated Circuits," and a note had been added to the footnote on the first page of each paper that identifies the paper as part of the 2010 RFIC Symposium.

A monolithic 3.1–4.8 GHz MB-OFDM UWB transceiver in 0.18-μm CMOS

A monolithic RF transceiver for an MB-OFDM UWB system in 3.1–4.8 GHz is presented. The transceiver adopts direct-conversion architecture and integrates all building blocks including a gain controllable wideband LNA, a I/Q merged quadrature mixer, a fifth-order Gm–C bi-quad Chebyshev LPF/VGA, a fast-settling frequency synthesizer with a poly-phase filter, a linear broadband up-conversion quadrature modulator, an active D2S converter and a variable-gain power amplifier. The ESD protected transceiver is fabricated in Jazz Semiconductor's 0.18-μm RF CMOS with an area of 6.1 mm2 and draws a total current of 221 mA from 1.8-V supply. The receiver achieves a maximum voltage gain of 68 dB with a control range of 42 dB in 6 dB/step, noise figures of 5.5–8.8 dB for three sub-bands, and an in-band/out-band IIP3 better than −4 dBm/+9 dBm. The transmitter achieves an output power ranging from −10.7 to −3 dBm with gain control, an output P1dB better than −7.7 dBm, a sideband rejection about 32.4 dBc, and LO suppression of 31.1 dBc. The hopping time among sub-bands is less than 2.05 ns.

Design of Highly Efficient Wideband RF Polar Transmitters Using the Envelope-Tracking Technique

This paper discusses the design issues of highly efficient and monolithic wideband RF polar transmitters, especially the ones that use the envelope-tracking (ET) technique. Besides first reviewing the current state-of-the-art polar transmitters in the literature, three focus topics will be discussed: 1) the system-on-a-chip (SoC) design considerations of the monolithic polar transmitter using ET versus EER (envelope elimination and restoration); 2) the design of highly efficient envelope amplifier capable of achieving the high efficiency, current, bandwidth, accuracy and noise specifications required for wideband signals; and 3) the design of high-efficiency monolithic Si-based class E power amplifiers (PAs) suitable for ET-based RF polar transmitters. A design prototype of a polar transmitter using ET and a monolithic SiGe PA that passed the stringent low-band EDGE (Enhanced Data rates for GSM Evolution) transmit mask with 45% overall transmitter system efficiency will be given; the simulated data of the entire polar transmitter system is also compared against the measurement. Further investigations on how to solve the technical challenges to successfully implement linear and high-efficiency ET-based polar transmitter for broadband wireless applications such as WiBro/WiMAX are also discussed.

Monolithic 1-Chip FBAR duplexer for W-CDMA handsets

Film bulk acoustic resonator (FBAR) filters and duplexers are receiving increasing attentions in RF systems due to the advantages of having high power handling capability, high Q-factors, good thermal stability, require a small volume and are relatively cheap. There are currently no published papers and research about FBAR 1-Chip duplexer, which have been designed with Tx and Rx filters because it is a very challenging task. We report for the first time that a monolithic 1-Chip RF duplexer is achieved with the size of 2.5 mm × 2.5 mm using thin FBAR technology to meet the stringent demand for miniaturization and monolithic integration of duplexers in RF communication systems. In this work, a novel 1-Chip duplexer is designed by EM (electromagnetic) simulation and RF circuit simulation using HFSS and ADS. The highest insertion losses in the pass band (1920–1980, 2110–2170 MHz) are measured below 4.35 dB, and attenuation are over 39 dB.

Temperature and Substrate Effects in Monolithic RF Inductors on Silicon With 6-&lt;tex&gt;$muhboxm$&lt;/tex&gt;-Thick Top Metal for RFIC Applications

Comprehensive analyses of the effects of temperature (from <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$-hbox50 ^circhboxC$</tex> to 200 <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$^circhboxC$</tex> ), silicon substrate thickness, and proton implantation postprocess on the performances of a set of planar spiral inductors with 6- <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$muhboxm$</tex> -thick top metal are demonstrated. Quality-factor (Q-factor) and power gain <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$( G_ A)$</tex> decrease with increasing temperatures but show a reverse behavior within a higher frequency range. Stability-factor (K-factor) and noise figure (NF) increase with increasing temperatures but show a reverse behavior within a higher frequency range. The reverse frequencies <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$f_R$</tex> , which correspond to the zero temperature coefficient of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$G_A$</tex> , K-factor, and NF, are almost the same. In addition, both the silicon substrate thinning and proton implantation are verified to be effective in improving the Q-factor and NF performances of inductors on silicon. The present analyses enable RF engineers to understand more deeply the Q-factor and NF behavior of inductors fabricated on a thin silicon substrate (20 <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$muhboxm$</tex> ) and hence are helpful for them to design high-performance fully on-chip low-noise-amplifiers and other RF integrated circuits.

Monolithic RF MEMS inductor using silicon MEMS foundry process

A successful design of a radio frequency inductor based on a silicon microelectromechanical system foundry process is presented. The suspended inductor has been realised in electroplated thick nickel with front side bulk micromachining of the substrate. The overall size of the inductor is ~1×1 mm. The inductors have been experimentally characterised, and inductances ~2 nH in the frequency range of 200 MHz to 7 GHz have been measured with a self-resonant frequency of 9.8 GHz. The peak measured value of the Q factor is 12 at 4 GHz. After de-embedding, the Q factor reaches 13 at 4.8 GHz. Simulation based on a parameter extraction method has been carried out for the inductor. There is a good agreement between simulated and experimental results.

Temperature and substrate-impedance dependence of noise figure of monolithic RF inductors on silicon

In this letter, we analyze the effects of temperature (from -50/spl deg/C to 200/spl deg/C) and substrate impedance on the noise figure (NF) and quality factor (Q-factor) performances of monolithic RF inductors on silicon. The results show a 0.75 dB (from 0.98 to 0.23 dB) reduction in minimum NF (NF/sub min/) at 8 GHz, an 86.1% (from 15.1 to 28.1) increase in maximum Q-factor (Q/sub max/), and a 4.8% (from 16.5 to 17.3 GHz) improvement in self-resonant frequency (f/sub SR/) were obtained if post-process of proton implantation had been done. This means the post-process of proton implantation is effective in improving the NF and Q-factor performances of inductors on silicon mainly due to the reduction of eddy current loss in the silicon substrate. In addition, it was found that NF increases with increasing temperature but show a reverse behavior within a higher frequency range. This phenomenon can be explained by the positive temperature coefficients of the series metal resistance (R/sub s/), the parallel substrate resistances (R/sub sub1/ and R/sub sub2/), and the resistance R/sub s1/ of the substrate transformer loop. The present analyzes are helpful for RF designers to design less temperature-sensitive high-performance fully on-chip low-noise-amplifiers (LNAs) and voltage-controlled-oscillators (VCOs) for single-chip receiver front-end applications.

Temperature-dependence of noise figure of monolithic RF transformers on a thin (20 /spl mu/m) silicon substrate

We demonstrate an analysis of the effect of temperature (from -45/spl deg/C to 175/spl deg/C) on the quality-factor (Q-factor) and noise figure (NF) performances of monolithic RF transformers on both normal (750 /spl mu/m) and thin (20 /spl mu/m) silicon substrates. The results show that silicon substrate thinning is effective in improving the Q-factor and NF performances of transformers. In addition, Q-factors of both primary and secondary coils decrease with increasing temperature but show a reverse behavior within a higher frequency range. The noise figure (NF) increases with increasing temperature. The present analysis enables RF engineers to understand more deeply the NF (i.e. power loss) behavior of RF monolithic transformers fabricated on a silicon substrate, and hence is helpful for them in designing less temperature-sensitive low-supply-voltage transformer-feedback low-noise-amplifiers (LNA) and voltage-controlled-oscillators (VCO), and other radio-frequency integrated circuits (RF-ICs) which include transformers.

An X-band to Ku-band RF MEMS switched coplanar strip filter

Radio frequency microelectromechanical systems (RF MEMS) are key enabling technologies for miniature reconfigurable circuits such as microwave filters. We present a two-pole monolithic RF MEMS switched filter, fabricated on GaAs, that employs surface-micromachined capacitors to present a variable capacitance to a coupled coplanar strip filter, thereby switching the filter center frequency 37% between 10.7 GHz and 15.5 GHz with voltages of 20 and 0 V, respectively. This 15% bandwidth filter occupies a chip area of 2.2 /spl times/1.5 mm and demonstrates less than 2-dB of loss, making it promising for numerous applications within these critical frequency bands.

Synthetic Quasi-TEM Meandered Transmission Lines for Compacted Microwave Integrated Circuits

This paper presents a two-dimensional transmission line (2-D TL) that supports quasi-TEM propagation mode and reduces problems associated with compacted meandering of microstrip (MS) on propagation constants and the characteristic impedances commonly observed in conventional one-dimensional MSs. The proposed 2-D TL comprises two layers of metallic surfaces on either side of a dielectric substrate. The top metal surface is a meandered connection of a unit cell with a central patch and connecting arms. The bottom surface is a meshed 2-D periodical ground plane, whose etched portion complements the patch portion of the top surface, forming a complementary-conducting-strip (CCS) TL, enabling a combination of an MS and MS with the tuning septa in a unit cell. Both theoretical and experimental investigations of the CCS TL agree well and demonstrate that it is much less susceptible to the effects of meanderings on the propagation constant and characteristic impedance than an MS for the same meandered pattern. Two design examples are presented to demonstrate the potential for a CCS TL for miniaturizing microwave passive circuits with minimal losses. The first example involves a 5.4-GHz CCS four-port rat-race hybrid realized in RO4003 and reduces the area of original MS design by 87%. The second example illustrates the applicability of a CCS TL to a monolithic RF integrated circuit using a first-pass design of a 5.2-GHz CMOS oscillator incorporating a CCS TL as a resonator with an area totaling 500/spl times/600 /spl mu/m/sup 2/ including pads base on Taiwan Semiconductor Manufacturing Company's 0.25-/spl mu/m 1P5M CMOS process techniques.

Monolithic RF bandpass track-and-hold

A new bandpass track-and-hold (BP-T/H) open loop architecture is developed as a single stage monolithic circuit with low voltage power supply. The sampling of 912 MHz RF-signal with 100 MS/s is demonstrated by Spectre-Cadence-4.4.6 simulations on 0.35 µm RF-SiGe/BiCMOS process of Texas Instruments.