Monolithic Microwave Integrated Circuit Power Amplifier Research Articles

2–8 GHz 8-W Power Amplifier MMIC Developed Using MSAG MESFET Technology

Design approach and test data for a two-octave bandwidth HPA developed using GaAs based multifunction self aligned gate metal semiconductor field effect transistor with multilevel plating monolithic microwave integrated circuit (MMIC) technology are presented. A low loss matching design technique was used in the development of a two-stage power amplifier. The broadband amplifier has exhibited 8 W power output and better than 16% PAE over the 2.0-8.0 GHz frequency range. To our knowledge, these results represent the state-of-the-art in output power for multi-octave S/C-band power MMIC amplifiers.

A 9.1–10.7 GHz 10-W, 40-dB Gain Four-Stage PHEMT MMIC Power Amplifier

This letter presents a compact X-band high gain and high power four-stage AlGaAs/InGaAs/GaAs pseudomorphic high electron mobility transistor (PHEMT) monolithic microwave integrated circuit (MMIC) high power amplifier (PA). This amplifier is designed to fully match a 50-Omega input and output impedance. Based on 0.35-mum gate-length power PHEMT technology, this PA MMIC is fabricated on a 3-mil thick wafer. While operating under 8 V and 2700-mA dc bias condition, the characteristics of 40-dB small-signal gain, a 10-W continuous-wave saturation output power, and 33% power added efficiency at 9.7GHz can be achieved

A single-supply Ku-band 1-W power amplifier MMIC with compact self-bias PHEMTs

In this letter, the design of a self-bias 1.8-mm AlGaAs/InGaAs/GaAs pseudomorphic high electron mobility transistor with a compact source capacitor for operation in Ku-band frequency is described. Based on the proposed device, a self-bias Ku-band 1-W two-stage power amplifier monolithic microwave integrated circuit (MMIC) is also demonstrated. Under a single bias condition of 8 V and 630 mA, the self-bias MMIC possesses 14.2-dB small-signal gain, 30.2-dBm output power at 1-dB gain compression point with 19.2% power added efficiency and 31.3-dBm saturated output power with 22.5% power added efficiency at 14GHz. With the performance comparable to the dual-bias MMIC counterpart, the proposed self-bias MMIC is more attractive to system designers on very small aperture terminal applications.

PCS/W-CDMA dual-band MMIC power amplifier with a newly proposed linearizing bias circuit

A personal communications service/wide-band code division multiple access (PCS/W-CDMA) dual-band monolithic microwave integrated circuit (MMIC) power amplifier with a single-chip MMIC and a single-path output matching network is demonstrated by adopting a newly proposed on-chip linearizer. The linearizer is composed of the base-emitter diode of an active bias transistor and a capacitor to provide an RF short at the base node of the active bias transistor. The linearizer enhances the linearity of the power amplifier effectively for both PCS and W-CDMA bands with no additional DC power consumption, and has negligible insertion power loss with almost no increase in die area. It improves the input 1-dB gain compression point by 18.5 (20) dB and phase distortion by 6.1/spl deg/ (12.42/spl deg/) at an output power of 28 (28) dBm for the PCS (W-CDMA) band while keeping the base bias voltage of the power amplifier as designed. A PCS and W-CDMA dual-band InGaP heterojunction bipolar transistor MMIC power amplifier with single input and output and no switch for band selection is embodied by implementing the linearizer and by designing the amplifier to have broad-band characteristics. The dual-band power amplifier exhibits an output power of 30 (28.5) dBm, power-added efficiency of 39.5 % (36 %), and adjacent channel power ratio of -46 (-50) dBc at the output power of 28 (28) dBm under 3.4-V operation voltage for PCS (W-CDMA) applications.

Low-distortion MMIC power amplifier using a new form of derivative superposition

Reduction of interchannel interference produced by a power amplifier near 1-dB compression is a key concern for the wireless communications industry. In this paper, we present a 100-mW monolithic-microwave integrated-circuit (MMIC) power amplifier designed using a novel form of the derivative superposition method. The measured results of the MMIC power amplifier showed a two-tone carrier-to-interference (C/I) ratio of 45 dBc with an efficiency of 22.5% when backed off by 4.5 dB from the 1-dB compression point. We demonstrate that the MMIC power amplifier represents a good compromise between C/I ratio, output power, efficiency, and gain at the cost of an increase in total gate width, by comparing it to class-A, class-AB, and class-B single field-effect-transistor amplifiers.

X-band MMIC power amplifier with an on-chip temperature-compensation circuit

An X-band monolithic-microwave integrated-circuit (MMIC) power amplifier with a simplified on-chip temperature-compensation circuit composed of a few diodes and a resistor are presented in this paper. At first, the operation principle and design method of the temperature-compensation circuit have been investigated. The fabricated four-stage X-band MMIC power amplifier with the on-chip temperature-compensation circuit has demonstrated the improvement of gain variation from 5.5 to 1.3 dB in the temperature range from -10/spl deg/C to +80/spl deg/C.

Linearised InGaP/GaAs HBT MMIC power amplifier with active bias circuit for W-CDMA application

A high linearity InGaP/GaAs heterojunction bipolar transistor (HBT) monolithic microwave integrated circuit (MMIC) power amplifier is demonstrated using a new structure for a bias circuit for wideband-code division multiple access (W-CDMA) application. A one shunt capacitor is added to a novel active bias circuit and acts as a lineariser improving input P1dB of 16 dB and phase distortion of 5.1° for the hybrid phase shift keying (HPSK) modulated signal at the 28 dBm output power; the lineariser showing no significant increase of signal loss and chip area. The two-stage HBT MMIC amplifier exhibits a power-added efficiency (PAE) of 37%, a linear power gain of 24.5 dB, and an output power of 28 dBm with an adjacent channel power ratio (ACPR) of –45 dBc, under a 3 V operation voltage.

High Frequency Circuits Based on GaAs Phemt Technology for Modern Sensor and Communication Systems

For sensor and communication system applications, monolithic microwave integrated circuits (MMICs) feature performance, functionality, reliability, and competitive price. In this paper, the potential of PHEMT ICs for communication and sensor applications up to 100 GHz is discussed. Specifically, I will address the application of coplanar waveguide technology for rf ICs, millimeter-wave multifunctional ICs and power amplifiers, as well as mixed-signal ICs and OEICs. A 77-GHz transceiver MMIC designed for automotive collision avoidance radar is presented as an example of a very compact, multifunctional mm-wave chip. A chip set for active and passive imaging at 94 GHz includes low noise and high gain amplifiers, low phase noise oscillators, and phase shifters. An FMCW module is conceived for material characterization. A family of coplanar power amplifier MMICs for wireless communication in the range of 20 to 60 GHz with output powers up to 1 W is presented. Finally, integrated circuits for high-speed data transmission at 40 Gbit/s will be discussed.

HIGH FREQUENCY CIRCUITS BASED ON GaAs PHEMT TECHNOLOGY FOR MODERN SENSOR AND COMMUNICATION SYSTEMS

For sensor and communication system applications, monolithic microwave integrated circuits (MMICs) feature performance, functionality, reliability, and competitive price. In this paper, the potential of PHEMT ICs for communication and sensor applications up to 100 GHz is discussed. Specifically, I will address the application of coplanar waveguide technology for rf ICs, millimeter-wave multifunctional ICs and power amplifiers, as well as mixed-signal ICs and OEICs. A 77-GHz transceiver MMIC designed for automotive collision avoidance radar is presented as an example of a very compact, multifunctional mm-wave chip. A chip set for active and passive imaging at 94 GHz includes low noise and high gain amplifiers, low phase noise oscillators, and phase shifters. An FMCW module is conceived for material characterization. A family of coplanar power amplifier MMICs for wireless communication in the range of 20 to 60 GHz with output powers up to 1 W is presented. Finally, integrated circuits for high-speed data transmission at 40 Gbit/s will be discussed.

42% high-efficiency two-stage HBT power-amplifier MMIC for W-CDMA cellular phone systems

This is the first paper to report on a high-efficiency two-stage heterojunction-bipolar-transistor power-amplifier monolithic microwave integrated circuit (MMIC) for 1.95-GHz wide-band code-division multiple-access (W-CDMA) cellular phone systems. Power amplifiers for W-CDMA systems are required to operate at high efficiency and high linearity over a wide range of output power levels. To obtain high efficiency at low output power (P/sub out/) as well as at the required maximum P/sub out/ and obtain a high linearity at the maximum P/sub out/, we chose near-class-B operation. To improve linearity at a medium P/sub out/ range, we suppressed the gain distortion resulting from near-class-B operation by using an adaptive biasing technique. The MMIC exhibited a power-added efficiency of 42%, the highest ever reported, a gain of 30.5 dB, and an adjacent channel leakage power ratio at a 5-MHz offset frequency of -38 dBc at a P/sub out/ of 27 dBm under a supply voltage of 3.5 V with 3.84-Mcps hybrid phase-shift keying modulation.

40-W CW broad-band spatial power combiner using dense finline arrays

This paper presents a broad-band spatial power-combining system based on tapered-slot antenna arrays integrated in a standard WR-90 waveguide environment. The system is designed using a modular tray architecture, providing full waveguide-band frequency coverage and an excellent thermal environment for a set of monolithic-microwave integrated-circuit (MMIC) amplifiers. The shape of the tapered-slot or finline structures was optimized to minimize return loss and provide a broad-band impedance transformation from the waveguide mode to the MMIC amplifiers. A prototype eight-element array using commercial GaAs MMIC power amplifiers yielded a maximum of 41 W output power (continuous wave) with a gain variation less than /spl plusmn/1.2 dB within the entire band of interest. The average combining efficiency over the operating band was estimated at 73%. The results suggest the efficacy of the design and a strong potential for higher powers by moving toward a greater number of MMIC's per tray and a larger number of trays. Should the 100 W system be realized in the near future, our combiner system will become a promising candidate to challenge the dominant position currently claimed by the traveling-wave tube amplifiers.

Trap-related gain/phase jump of HFET power amplifiers

Using novel characterization techniques, output gain, and phase jumps (with respect to input frequency or input level) of multistage monolithic-microwave integrated-circuit power amplifiers were correlated with heterojunction field-effect transistor (HFET) drain-current kinks and negative gate resistances. Both physical and phenomenological models were used to explain the correlation through hole-trapping and self-biasing mechanisms. A remedy involving bias-stabilization diodes was experimentally verified. Other possible remedies are also discussed. The present conclusion can be extended to other metal-semiconductor field-effect transistor and HFET amplifiers with similar gain/phase jump problems.

An HBT MMIC power amplifier with an integrated diode linearizer for low-voltage portable phone applications

This paper gives a detailed description of a novel linearization technique using a transistor base-collector junction diode. The novel linearization technique effectively improves the gain compression and phase distortion of the heterojunction bipolar transistor (HBT) with no additional dc consumption, leading to highly efficient linear amplification of the /spl pi//4 DQPSK modulation signals. An AlGaAs/GaAs HBT monolithic microwave integrated circuit (MMIC) linear power amplifier was fabricated using the novel linearization technique for the handsets used in the 1.9 GHz Japanese Personal Handy Phone System (PHS). The fabricated HBT MMIC power amplifier exhibits an output power of 21 dBm and a power-added efficiency as high as 37% at an operation voltage of 2.7 V. At this rated output power, the adjacent channel power rejection in /spl plusmn/600 kHz offset frequency bands is -55 dBc and the error vector magnitude is 4.3%. This measured linearity is well within the PHS standard.

A 94-GHz 0.35-W power amplifier module

This paper presents a 94-GHz power amplifier (PA) module. This module contains three identical monolithic microwave integrated circuit (MMIC) PA chips and demonstrates 0.35-W output power at the waveguide output port with a miniature size. The MMIC PA is a two-stage monolithic W-band PA using 0.1-/spl mu/m pseudomorphic AlGaAs/InGaAs/GaAs T-gate power high electron mobility transistor (HEMT) process. This MMIC PA exhibits a measured linear gain of 8 dB and a maximum output power of 300 mW with 10.5% peak power-added efficiency (PAE) at 94 GHz. To our knowledge, both the 300-mW output power MMIC PA and the 0.35-W PA module represent the highest output power amplification component performance at this frequency.

Design and performance of an octave band 11 watt power amplifier MMIC

The design and performance of a two-stage 3.0 to 6.0 GHz MMIC (monolithic microwave integrated circuit) power amplifier that has established a new standard for power output and bandwidth in MMIC form are reported. The amplifier produces 11 W+or-1 dB from 3.0 to 6.0 GHz, with maximum power outputs of 13.5 W and 10.5 W at S and C radar bands respectively, and a minimum power of 9 W. This benchmark eclipses the best power levels reported for both two-stage (8 W at S-band) and single-stage (10 W at C-band) narrowband MMIC power amplifiers with a continuous bandwidth coverage of 67%. The yield of this two-stage 40 mm gate periphery MMIC, based on 0.5 mu m gate length selective-implant MESFET technology, averaged 43%, with a 57% yield from the best wafer.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>