Monolayer MoS2 Field-effect Transistors Research Articles

Toward Ideal Low-Frequency Noise in Monolayer CVD MoS2 FETs: Influence of van der Waals Junctions and Sulfur Vacancy Management.

The pursuit of sub-1-nm field-effect transistor (FET) channels within 3D semiconducting crystals faces challenges due to diminished gate electrostatics and increased charge carrier scattering. 2D semiconductors, exemplified by transition metal dichalcogenides, provide a promising alternative. However, the non-idealities, such as excess low-frequency noise (LFN) in 2D FETs, present substantial hurdles to their realization and commercialization. In this study, ideal LFN characteristics in monolayer MoS2 FETs are attained by engineering the metal-2D semiconductor contact and the subgap density of states (DOS). By probing non-ideal contact resistance effects using CuS and Au electrodes, it is uncovered that excess contact noise in the high drain current (ID) region can be substantially reduced by forming a van der Waals junction with CuS electrodes. Furthermore, thermal annealing effectively mitigates sulfur vacancy-induced subgap density of states (DOS), diminishing excess noise in the low ID region. Through meticulous optimization of metal-2D semiconductor contacts and subgap DOS, alignment of 1/f noise with the pure carrier number fluctuation model is achieved, ultimately achieving the sought-after ideal LFN behavior in monolayer MoS2 FETs. This study underscores the necessity of refining excess noise, heralding improved performance and reliability of 2D electronic devices.

Tailoring amorphous boron nitride for high-performance two-dimensional electronics

Two-dimensional (2D) materials have garnered significant attention in recent years due to their atomically thin structure and unique electronic and optoelectronic properties. To harness their full potential for applications in next-generation electronics and photonics, precise control over the dielectric environment surrounding the 2D material is critical. The lack of nucleation sites on 2D surfaces to form thin, uniform dielectric layers often leads to interfacial defects that degrade the device performance, posing a major roadblock in the realization of 2D-based devices. Here, we demonstrate a wafer-scale, low-temperature process (<250 °C) using atomic layer deposition (ALD) for the synthesis of uniform, conformal amorphous boron nitride (aBN) thin films. ALD deposition temperatures between 125 and 250 °C result in stoichiometric films with high oxidative stability, yielding a dielectric strength of 8.2 MV/cm. Utilizing a seed-free ALD approach, we form uniform aBN dielectric layers on 2D surfaces and fabricate multiple quantum well structures of aBN/MoS2 and aBN-encapsulated double-gated monolayer (ML) MoS2 field-effect transistors to evaluate the impact of aBN dielectric environment on MoS2 optoelectronic and electronic properties. Our work in scalable aBN dielectric integration paves a way towards realizing the theoretical performance of 2D materials for next-generation electronics.

Enhanced Electrical Transport Properties of Molybdenum Disulfide Field-Effect Transistors by Using Alkali Metal Fluorides as Dielectric Capping Layers.

The electronic properties of 2D materials are highly influenced by the molecular activity at their interfaces. A method was proposed to address this issue by employing passivation techniques using monolayer MoS2 field-effect transistors (FETs) while preserving high performance. Herein, we have used alkali metal fluorides as dielectric capping layers, including lithium fluoride (LiF), sodium fluoride (NaF), and potassium fluoride (KF) dielectric capping layers, to mitigate the environmental impact of oxygen and water exposure. Among them, the LiF dielectric capping layer significantly improved the transistor performance, specifically in terms of enhanced field effect mobility from 74 to 137 cm2/V·s, increased current density from 17 μA/μm to 32.13 μA/μm at a drain voltage of Vd of 1 V, and decreased subthreshold swing to 0.8 V/dec The results have been analytically verified by X-ray photoelectron spectroscopy (XPS) and Raman, and photoluminescence (PL) spectroscopy, and the demonstrated technique can be extended to other transition metal dichalcogenide (TMD)-based FETs, which can become a prospect for cutting-edge electronic applications. These findings highlight certain important trade-offs and provide insight into the significance of interface control and passivation material choice on the electrical stability, performance, and enhancement of the MoS2 FET.

Direct Assessment of Defective Regions in Monolayer MoS2 Field-Effect Transistors through In Situ Scanning Probe Microscopy Measurements.

Implementing two-dimensional materials in field-effect transistors (FETs) offers the opportunity to continue the scaling trend in the complementary metal-oxide-semiconductor technology roadmap. Presently, the search for electrically active defects, in terms of both their density of energy states and their spatial distribution, has turned out to be of paramount importance in synthetic transition metal dichalcogenides layers, as they are suspected of severely inhibiting these devices from achieving their highest performance. Although advanced microscopy tools have allowed the direct detection of physical defects such as grain boundaries and point defects, their implementation at the device scale to assess the active defect distribution and their impact on field-induced channel charge modulation and current transport is strictly restrained. Therefore, it becomes critical to directly probe the gate modulation effect on the carrier population at the nanoscale of an FET channel, with the objective to establish a direct correlation with the device characteristics. Here, we have investigated the active channel in a monolayer MoS2 FET through in situ scanning probe microscopy, namely, Kelvin probe force microscopy and scanning capacitance microscopy, to directly identify active defect sites and to improve our understanding of the contribution of grain boundaries, bilayer islands, and defective grain domains to channel conductance.

Diffusion Control on the Van der Waals Surface of Monolayers for Uniform Bi‐Layer MoS2 Growth

Abstract2D MoS2 has gained attention for the post‐silicon material owing to its atomically thin nature and dangling bond‐free surface. The bi‐layer MoS2 is considered a promising material for electronic devices due to its better electrical properties than monolayer MoS2. However, the uniform growth of bi‐layer MoS2 is still challenging. Herein, the uniform growth of bi‐layer MoS2 is demonstrated using gas‐phase alkali metal‐assisted metal–organic chemical vapor deposition (GAA‐MOCVD). Thanks to enhanced metal reactant diffusion length in GAA‐MOCVD, the uniform growth of bi‐layer MoS2 film is achieved even at fast nucleation kinetics for a shorter growth time compared to previously reported MOCVD. The bi‐layer MoS2 field‐effect transistors (FETs) show superior electrical properties such as sheet conductance and electron mobility than monolayer MoS2 FETs. The electron mobility of bi‐layer MoS2 FETs with bismuth contacts reaches a maximum of 92.35 cm2 V−1 s−1. Using the partially grown epitaxial bi‐layer (PGEB) MoS2, it is demonstrated that a photodetector showed a near‐infrared photoresponse with a low dark current that is advantageous for both monolayer and bi‐layer applications. The potential expansion of the growth technique to layer‐by‐layer growth can result in boosted performance across a wide spectrum of electronic and optoelectronic devices employing MoS2.

Improving the optoelectronic properties of monolayer MoS2 field effect transistor through dielectric engineering

The reduced dielectric screening in atomically thin two-dimensional materials makes them very sensitive to the surrounding environment, which can be modulated to tune their optoelectronic properties. In this study, we significantly improved the optoelectronic properties of monolayer MoS2 by varying the surrounding environment using different liquid dielectrics, each with a specific dielectric constant ranging from 1.89 to 18. Liquid mediums offer the possibility of environment tunability on the same device. For a back-gated field effect transistor, the field effect mobility exhibited more than two-order enhancement when exposed to a high dielectric constant medium. Further investigation into the effect of the dielectric environment on the optoelectronic properties demonstrated a variation in photoresponse relaxation time with the dielectric medium. The rise and decay times were observed to increase and decrease, respectively, with an increase in the dielectric constant of the medium. These results can be attributed to the dielectric screening provided by the surrounding medium, which strongly modifies the charged impurity scattering, the band gap, and defect levels of monolayer MoS2. These findings have important implications for the design of biological and chemical sensors, particularly those operating in a liquid environment. By leveraging the tunability of the dielectric medium, we can optimize the performance of such sensors and enhance their detection capabilities.

Low Ohmic contact resistance and high on/off ratio in transition metal dichalcogenides field-effect transistors via residue-free transfer.

Beyond-silicon technology demands ultrahigh performance field-effect transistors. Transition metal dichalcogenides provide an ideal material platform, but the device performances such as the contact resistance, on/off ratio and mobility are often limited by the presence of interfacial residues caused by transfer procedures. Here, we show an ideal residue-free transfer approach using polypropylene carbonate with a negligible residue coverage of ~0.08% for monolayer MoS2 at the centimetre scale. By incorporating a bismuth semimetal contact with an atomically clean monolayer MoS2 field-effect transistor on hexagonal boron nitride substrate, we obtain an ultralow Ohmic contact resistance of ~78 Ω µm, approaching the quantum limit, and a record-high on/off ratio of ~1011 at 15 K. Such an ultra-clean fabrication approach could be the ideal platform for high-performance electrical devices using large-area semiconducting transition metal dichalcogenides.

Approaching Ohmic Contacts for Ideal Monolayer MoS2 Transistors Through Sulfur-Vacancy Engineering.

Field-effect transistors (FETs) made of monolayer 2D semiconductors (e.g., MoS2 ) are among the basis of the future modern wafer chip industry. However, unusually high contact resistances at the metal-semiconductor interfaces have seriously limited the improvement of monolayer 2D semiconductor FETs so far. Here, a high-scale processable strategy is reported to achieve ohmic contact between the metal and monolayer MoS2 with a large number of sulfur vacancies (SVs) by using simple sulfur-vacancy engineering. Due to the successful doping of the contact regions by introducing SVs, the contact resistance of monolayer MoS2 FET is as low as 1.7 kΩ·µm. This low contact resistance enables high-performance MoS2 FETs with ultrahigh carrier mobility of 153 cm2 V-1 s-1 , a large on/off ratio of 4 × 109 , and high saturation current of 342 µA µm-1 . With the comprehensive investigation of different SV concentrations by adjusting the plasma duration, it is also demonstrated that the SV-increased electron doping, with its resulting reduced Schottky barrier, is the dominant factor driving enhanced electrical performance. The work provides a simple method to promote the development of industrialized atomically thin integrated circuits.

Observation of Rich Defect Dynamics in Monolayer MoS2.

Defects play a pivotal role in limiting the performance and reliability of nanoscale devices. Field-effect transistors (FETs) based on atomically thin two-dimensional (2D) semiconductors such as monolayer MoS2 are no exception. Probing defect dynamics in 2D FETs is therefore of significant interest. Here, we present a comprehensive insight into various defect dynamics observed in monolayer MoS2 FETs at varying gate biases and temperatures. The measured source-to-drain currents exhibit random telegraph signals (RTS) owing to the transfer of charges between the semiconducting channel and individual defects. Based on the modeled temperature and gate bias dependence, oxygen vacancies or aluminum interstitials are probable defect candidates. Several types of RTSs are observed including anomalous RTS and giant RTS indicating local current crowding effects and rich defect dynamics in monolayer MoS2 FETs. This study explores defect dynamics in large area-grown monolayer MoS2 with ALD-grown Al2O3 as the gate dielectric.

Electrical performance of monolayer MoS2 transistor with MoS2 nanobelt metallic edges as electrodes

The contact electrodes have great influence on the performance of monolayer MoS2 devices. In this paper, monolayer MoS2 and MoS2 nanobelts were synthesized on SiO2/Si substrates via the chemical vapor deposition method. By using wet and dry transfer process, MoS2 nanobelt metallic edges were designed as the source/drain contact electrodes of monolayer MoS2 field effect transistor. The ‘nanobelt metallic edges’ refers to the top surface of the nanobelt being metallic. Because the base planes of MoS2 nanobelt vertically stand on the substrate, which makes the layer edges form the top surface of the nanobelt. The nonlinear I ds–V ds characteristics of the device indicates that the contact between the monolayer MoS2 and MoS2 metallic edges displays a Schottky-like behavior. The back-gated transfer characteristics indicate that monolayer MoS2 device with MoS2 nanobelt metallic edges as electrodes shows an n-type behavior with a mobility of ∼0.44 cm2 V−1·s−1, a carrier concentration of ∼7.31 × 1011 cm−2, and an on/off ratio of ∼103. The results enrich the electrode materials of two-dimensional material devices and exhibit potential for future application of MoS2 metallic edges in electronic devices.

Ultrascaled Contacts to Monolayer MoS2 Field Effect Transistors

Two-dimensional (2D) semiconductors possess promise for the development of field-effect transistors (FETs) at the ultimate scaling limit due to their strong gate electrostatics. However, proper FET scaling requires reduction of both channel length (LCH) and contact length (LC), the latter of which has remained a challenge due to increased current crowding at the nanoscale. Here, we investigate Au contacts to monolayer MoS2 FETs with LCH down to 100 nm and LC down to 20 nm to evaluate the impact of contact scaling on FET performance. Au contacts are found to display a ∼2.5× reduction in the ON-current, from 519 to 206 μA/μm, when LC is scaled from 300 to 20 nm. It is our belief that this study is warranted to ensure an accurate representation of contact effects at and beyond the technology nodes currently occupied by silicon.

Monolithic 3D integration of back-end compatible 2D material FET on Si FinFET

The performance enhancement of integrated circuits relying on dimension scaling (i.e., following Moore’s Law) is more and more challenging owing to the physical limit of Si materials. Monolithic three-dimensional (M3D) integration has been considered as a powerful scheme to further boost up the system performance. Two-dimensional (2D) materials such as MoS2 are potential building blocks for constructing upper-tier transistors owing to their high mobility, atomic thickness, and back-end-of-line (BEOL) compatible processes. The concept to integrate 2D material-based devices with Si field-effect transistor (FET) is technologically important but the compatibility is yet to be experimentally demonstrated. Here, we successfully integrated an n-type monolayer MoS2 FET on a p-type Si fin-shaped FET with 20 nm fin width via an M3D integration technique to form a complementary inverter. The integration was enabled by deliberately adopting industrially matured techniques, such as chemical mechanical planarization and e-beam evaporation, to ensure its compatibility with the existing 3D integrated circuit process and the semiconductor industry in general. The 2D FET is fabricated using low-temperature sequential processes to avoid the degradation of lower-tier Si devices. The MoS2 n-FETs and Si p-FinFETs display symmetrical transfer characteristics and the resulting 3D complementary metal-oxide-semiconductor inverter show a voltage transfer characteristic with a maximum gain of ~38. This work clearly proves the integration compatibility of 2D materials with Si-based devices, encouraging the further development of monolithic 3D integrated circuits.

A "Click" Reaction to Engineer MoS2 Field-Effect Transistors with Low Contact Resistance.

Two-dimensional (2D) materials with the atomically thin thickness have attracted great interest in the post-Moore's Law era because of their tremendous potential to continue transistor downscaling and offered advances in device performance at the atomic limit. However, the metal-semiconductor contact is the bottleneck in field-effect transistors (FETs) integrating 2D semiconductors as channel materials. A robust and tunable doping method at the source and drain region of 2D transistors to minimize the contact resistance is highly sought after. Here we report a stable carrier doping method via the mild covalent grafting of maleimides on the surface of 2D transition metal dichalcogenides. The chemisorbed interaction contributes to the efficient carrier doping without degrading the high-performance carrier transport. Density functional theory results further illustrate that the molecular functionalization leads to the mild hybridization and the negligible impact on the conduction bands of monolayer MoS2, avoiding the random scattering from the dopants. Differently from reported molecular treatments, our strategy displays high thermal stability (above 300 °C) and it is compatible with micro/nano processing technology. The contact resistance of MoS2 FETs can be greatly reduced by ∼12 times after molecular functionalization. The Schottky barrier of 44 meV is achieved on monolayer MoS2 FETs, demonstrating efficient charge injection between metal and 2D semiconductor. The mild covalent functionalization of molecules on 2D semiconductors represents a powerful strategy to perform the carrier doping and the device optimization.

High‐Performance Monolayer MoS2 Field‐Effect Transistors on Cyclic Olefin Copolymer‐Passivated SiO2 Gate Dielectric

AbstractTrap states of the semiconductor/gate dielectric interface give rise to a pronounced subthreshold behavior in field‐effect transistors (FETs) diminishing and masking intrinsic properties of 2D materials. To reduce the well‐known detrimental effect of SiO2 surface traps, this work spin‐coated an ultrathin (≈5 nm) cyclic olefin copolymer (COC) layer onto the oxide and this hydrophobic layer acts as a surface passivator. The chemical resistance of COC allows to fabricate monolayer MoS2 FETs on SiO2 by standard cleanroom processes. This way, the interface trap density is lowered and stabilized almost fivefold, to around 5 × 1011 cm−2 eV−1, which enables low‐voltage FETs even on 300 nm thick SiO2. In addition to this superior electrical performance, the photoresponsivity of the MoS2 devices on passivated oxide is also enhanced by four orders of magnitude compared to nonpassivated MoS2 FETs. Under these conditions, negative photoconductivity and a photoresponsivity of 3 × 107 A W−1 is observed which is a new highest value for MoS2. These findings indicate that the ultrathin COC passivation of the gate dielectric enables to probe exciting properties of the atomically thin 2D semiconductor, rather than interface trap dominated effects.

Highly Stretchable MoS2‐Based Transistors with Opto‐Synaptic Functionalities (Adv. Electron. Mater. 9/2022)

Stretchable Opto-Synaptic Transistors In article number 2200238, Na Li, Guangyu Zhang, and co-workers demonstrate highly stretchable monolayer MoS2 field effect transistors with buckled structures. These devices exhibit excellent electrical properties under a large uniaxial/biaxial stretching or oft-repeated tensile force, and such stretchable devices could be well applied to mimic synapses for neuromorphic computation.

Analysis of Schottky barrier heights and reduced Fermi-level pinning in monolayer CVD-grown MoS2 field-effect-transistors

Chemical vapor deposition (CVD)-grown monolayer (ML) molybdenum disulfide (MoS2) is a promising material for next-generation integrated electronic systems due to its capability of high-throughput synthesis and compatibility with wafer-scale fabrication. Several studies have described the importance of Schottky barriers in analyzing the transport properties and electrical characteristics of MoS2 field-effect-transistors (FETs) with metal contacts. However, the analysis is typically limited to single devices constructed from exfoliated flakes and should be verified for large-area fabrication methods. In this paper, CVD-grown ML MoS2 was utilized to fabricate large-area (1 cm × 1 cm) FET arrays. Two different types of metal contacts (i.e. Cr/Au and Ti/Au) were used to analyze the temperature-dependent electrical characteristics of ML MoS2 FETs and their corresponding Schottky barrier characteristics. Statistical analysis provides new insight about the properties of metal contacts on CVD-grown MoS2 compared to exfoliated samples. Reduced Schottky barrier heights (SBH) are obtained compared to exfoliated flakes, attributed to a defect-induced enhancement in metallization of CVD-grown samples. Moreover, the dependence of SBH on metal work function indicates a reduction in Fermi level pinning compared to exfoliated flakes, moving towards the Schottky–Mott limit. Optical characterization reveals higher defect concentrations in CVD-grown samples supporting a defect-induced metallization enhancement effect consistent with the electrical SBH experiments.

Defect-engineered room temperature negative differential resistance in monolayer MoS2 transistors.

The negative differential resistance (NDR) effect has been widely investigated for the development of various electronic devices. Apart from traditional semiconductor-based devices, two-dimensional (2D) transition metal dichalcogenide (TMD)-based field-effect transistors (FETs) have also recently exhibited NDR behavior in several of their heterostructures. However, to observe NDR in the form of monolayer MoS2, theoretical prediction has revealed that the material should be more profoundly affected by sulfur (S) vacancy defects. In this work, monolayer MoS2 FETs with a specific amount of S-vacancy defects are fabricated using three approaches, namely chemical treatment (KOH solution), physical treatment (electron beam bombardment), and as-grown MoS2. Based on systematic studies on the correlation of the S-vacancies with both the device's electron transport characteristics and spectroscopic analysis, the NDR has been clearly observed in the defect-engineered monolayer MoS2 FETs with an S-vacancy (VS) amount of ∼5 ± 0.5%. Consequently, stable NDR behavior can be observed at room temperature, and its peak-to-valley ratio can also be effectively modulated via the gate electric field and light intensity. Through these results, it is envisioned that more electronic applications based on defect-engineered layered TMDs will emerge in the near future.

Demonstration of Stochastic Resonance, Population Coding, and Population Voting Using Artificial MoS2 Based Synapses.

Fast detection of weak signals at low energy expenditure is a challenging but inescapable task for the evolutionary success of animals that survive in resource constrained environments. This task is accomplished by the sensory nervous system by exploiting the synergy between three astounding neural phenomena, namely, stochastic resonance (SR), population coding (PC), and population voting (PV). In SR, the constructive role of synaptic noise is exploited for the detection of otherwise invisible signals. In PC, the redundancy in neural population is exploited to reduce the detection latency. Finally, PV ensures unambiguous signal detection even in the presence of excessive noise. Here we adopt a similar strategies and experimentally demonstrate how a population of stochastic artificial neurons based on monolayer MoS2 field effect transistors (FETs) can use an optimum amount of white Gaussian noise and population voting to detect invisible signals at a frugal energy expenditure (∼10s of nano-Joules). Our findings can aid remote sensing in the emerging era of the Internet of things (IoT) that thrive on energy efficiency.

Isoemissive Photoluminescence from a Quaternary System of Valley-Polarized, Defect-Bound Excitons and Trions in Two-Dimensional Transition Metal Dichalcogenides

Interest in the use of local band extrema, known as valleys, as a possible information carrier has in recent years been advanced by the isolation of 2D transition metal dichalcogenides (TMDCs). In some monolayer TMDCs, the structural inversion asymmetry leads to spin-valley locked states that present potential advantages for information storage and manipulation beyond existing charge- and spin-based semiconductor technologies. However, understanding of the role of defects on exciton recombination and valley scattering remains lacking and limits progress toward applications. Here, we report gate voltage-dependent polarized photoluminescence measurements on CVD-grown monolayer WS2 and MoS2 field-effect transistors and observe a quaternary system of valley polarized excitons and trions. Intriguingly, we find the spectra to exhibit isoemissive points, which were previously seen only as evidence of a binary system. We propose a rate model to explain the existence of isoemission in a quaternary system and find that the presence of isoemissive points imply a kinetic relationship between recombination and valley scattering. This relationship sheds light on the inverse relation seen between the polarization degree and photoluminescence intensity. Further consideration of the phenomenon also led to the identification of a possible new mechanism for charge carrier detrapping using the energy released from trion recombination.

Salt-assisted growth of monolayer MoS2 for high-performance hysteresis-free field-effect transistor

Atomically thin layered materials such as MoS2 have future versatile applications in low power electronics. Here, we demonstrate the growth of a salt-assisted large scale, high-quality monolayer MoS2 toward the realization of a high-performance hysteresis-free field-effect transistor (FET). Density functional theory calculations are implemented to monitor the effects of the Schottky barrier and metal-induced gap states between our metal electrodes and MoS2 for achieving high carrier transport. The role of absorbed molecules and oxide traps on the hysteresis are studied in detail. For the first time, a hysteresis-free intrinsic transistor behavior is obtained by an amplitude sweep pulse I–V measurement with varying pulse widths. Under this condition, a significant enhancement of the field-effect mobility up to 30 cm2 V−1 s−1 is achieved. Moreover, to correlate these results, a single-pulse time-domain drain current analysis is carried out to unleash the fast and slow transient charge trapping phenomena. Our findings on the hysteresis-free transfer characteristic and high intrinsic field-effect mobility in salt-assisted monolayer MoS2 FETs will be beneficial for future device applications in complex memory, logic, and sensor systems.