Molecular Crossbar Research Articles

Linear symmetric self-selecting 14-bit kinetic molecular memristors.

Artificial Intelligence (AI) is the domain of large resource-intensive data centres that limit access to a small community of developers1,2. Neuromorphic hardware promises greatly improved space and energy efficiency for AI but is presently only capable of low-accuracy operations, such as inferencing in neural networks3-5. Core computing tasks of signal processing, neural network training and natural language processing demand far higher computing resolution, beyond that of individual neuromorphic circuit elements6-8. Here we introduce an analog molecular memristor based on a Ru-complex of an azo-aromatic ligand with 14-bit resolution. Precise kinetic control over a transition between two thermodynamically stable molecular electronic states facilitates 16,520 distinct analog conductance levels, which can be linearly and symmetrically updated or written individually in one time step, substantially simplifying the weight update procedure over existing neuromorphic platforms3. The circuit elements are unidirectional, facilitating a selector-less 64 × 64 crossbar-based dot-product engine that enables vector-matrix multiplication, including Fourier transform, in a single time step. We achieved more than 73 dB signal-to-noise-ratio, four orders of magnitude improvement over the state-of-the-art methods9-11, while consuming 460× less energy than digital computers12,13. Accelerators leveraging these molecular crossbars could transform neuromorphic computing, extending it beyond niche applications and augmenting the core of digital electronics from the cloud to the edge12,13.

A Scalable Memory-Based Reconfigurable Computing Framework for Nanoscale Crossbar

Nanoscale molecular electronic devices amenable to bottom-up self-assembly into a crossbar structure have emerged as a promising candidate for future electronic systems. To address some of the design challenges in molecular crossbar, we propose “memory-based architecture for reconfigurable computing” (MBARC), where memory, instead of switch-based logic functions, is used as the computing element. MBARC leverages on the fact that regular and periodic structures of molecular crossbar are attractive for a dense memory design. The main idea in MBARC is to partition a logic circuit, store the partitions as multi-input-multi-output lookup tables in a memory array, and then, use a simple CMOS-based scheduler to evaluate the partitions in a topological time-multiplexed manner. Compared to existing reconfigurable nanocomputing models, the proposed memory-based computing has three major advantages: 1) it minimizes the requirement of programmable interconnects (PIs); 2) it minimizes the number of CMOS interfacing elements that are required for level restoration and cascading logic blocks; and 3) it can achieve higher defect tolerance through efficient use of redundancy. Simulation results for a set of ISCAS benchmarks show average improvement of 32% in area, 21% in delay, and 34% in energy per vector compared to the implementation of a nanoscale field-programmable gate array. Effectiveness of the framework is also studied for two large sequential circuits, namely, 2-D discrete cosine transform and eight-tap finite-impulse-response filter.

Self‐Organization of a Highly Integrated Silicon Nanowire Network on a Si(110)–16 × 2 Surface by Controlling Domain Growth

AbstractHere, bottom‐up nanofabrication for the two‐dimensional self‐organization of a highly integrated, well‐defined silicon nanowire (SiNW) mesh on a naturally‐patterned Si(110)–16 × 2 surface by controlling the lateral growths of two non‐orthogonal 16 × 2 domains is reported. This self‐ordered nanomesh consists of two crossed arrays of parallel‐aligned SiNWs with nearly identical widths of 1.8–2.5 nm and pitches of 5.0–5.9 nm, and is formed over a mesoscopic area of 300 × 270 nm2 so as to show a high integration density in excess of 104 µm−2. These crossed SiNWs exhibit semiconducting character with an equal band gap of ∼0.95 eV as well as unique quantum confinement effect. Such an ultrahigh‐density SiNW network can serve as a versatile nanotemplate for nanofabrication and nanointegration of the highly‐integrated metal‐silicide or molecular crossbar nanomesh on Si(110) surface for a broad range of device applications. Also, the multi‐layer, vertically‐stacked SiNW networks can be self‐assembled through hierarchical growth, which opens the possibility for creating three‐dimensionally interconnected crossbar circuits. The ability to self‐organize an ultrahigh‐density, functional SiNW network on a Si(110) surface represents a simple step toward the fabrication of highly‐integrated crossbar nanocircuits in a very straightforward, fast, cost‐effective, and high throughput process.

A study of asynchronous design methodology for robust CMOS-nano hybrid system design

Among the emerging alternatives to CMOS, molecular electronics based diode-resistor crossbar fabric has generated considerable interest in recent times. Logic circuit design with future nano-scale molecular devices using dense and regular crossbar fabrics is promising in terms of integration density, performance and power dissipation. However, circuit design using molecular switches involve some major challenges: 1) lack of voltage gain of these switches that prevents logic cascading; 2) large output voltage level degradation; 3) vulnerability to parameter variations that affect yield and robustness of operation; and 4) high defect rate. In this article, we analyze some of the above challenges and investigate the effectiveness of asynchronous design methodology in a hybrid system design platform using molecular crossbar and CMOS interfacing elements. We explore different approaches of asynchronous circuit design and compare their suitability in terms of several circuit design parameters. We then develop the methodology and an automated synthesis flow to support two different asynchronous design approaches ( Micropipelines and Four phase Dual-rail ) for system designs using nano-crossbar logic stages and CMOS interface data-storage elements. Circuit-level simulation results for several benchmarks show considerable advantage in terms of performance and robustness at moderate area and power overhead compared to two different synchronous implementations.

Analysis of Defect Tolerance in Molecular Crossbar Electronics

Molecular electronics such as silicon nanowires (NW) and carbon nanotubes (CNT) demonstrate great potential for continuing the technology advances toward future nano-computing paradigm. However, excessive defects from bottom-up stochastic assembly have emerged as a fundamental obstacle for achieving reliable computation using molecular electronics. In this paper, we present an information-theoretic approach to investigate the intrinsic relationship between defect tolerance and inherence redundancy in molecular crossbar systems. By modeling defect-prone molecular crossbars as a non-ideal information processing medium, we determine the information transfer capacity, which can be interpreted as the bound on reliability that a molecular crossbar system can achieve. The proposed method allows us to evaluate the effectiveness of redundancy-based defect tolerance in a quantitative manner. Employing this method, we derive the gap of reliability between redundancy-based defect tolerance and ideal defect-free molecular systems. We also show the implications to the related design optimization problem.

Optoelectronic switching of addressable self-assembled monolayer molecular junctions

This Letter reports on the observation of optoelectronic switching in addressable molecular crossbar junctions fabricated using stamp-printing method. The active medium is a self-assembled monolayer softly sandwiched between gold electrodes. The junctions are investigated through current–voltage measurements at varied temperature, which show reversible optoelectronic switching with on/off ratio of three orders of magnitude at 95 K. The switching is independent of both optical wavelength and molecular structure, while it strongly depends on the temperature. It is shown that the distinct binding nature of the molecule/electrode interfaces play a dominant role in the switching performance.

Application-independent defect tolerance of reconfigurable nanoarchitectures

Self-assembled nanofabrication processes yield regular and reconfigurable devices. However, defect densities in this emerging nanotechnology are higher than those in conventional lithography-based VLSI. In this article, we present an application-independent defect tolerant design flow to minimize customized postfabrication design efforts to be performed per chip. In this flow, higher level design steps are not needed to be aware of the existence and the location of defects in the chip. Only a final mapping step is required to be defect aware. Application independence of this flow minimizes the number of per-chip design steps, making it appropriate for high volume production. We also present two mapping algorithms, recursive and greedy, which make the connection between defect-unaware design steps and the final defect-aware mapping step. Experiments show that the results obtained by the greedy algorithm are very close to the exact solutions. Using these algorithms, we analyze the manufacturing yield of molecular crossbars under different defect distribution models. We report on the size of the minimum crossbar to be fabricated such that a defect-free crossbar of the desirable size can be found with a guaranteed manufacturing yield.

Power to the molecules [nanometer-size switch

Hewlett-Packard Co., is developing a nanometer-size switch that has the power to amplify a signal. This power is one of the great features of transistors because it allows a signal to pass through a circuit without petering out. The switch consists of a single molecular layer sandwiched between two metal wires. HP achieved the gain it needed by using the so-called molecular crossbar, made from two switches. Each switch connects to its own control wire, which supplies it with voltage pulses. The two switches also connect to a common latch wire, which carries either a high or a low voltage. Together, the two switches encode a single bit.