Operator Research Articles

Transforming industrial automation: voice recognition control via containerized PLC device

The article discusses the impact of voice recognition and containerization technologies in the industrial sector, particularly on Programmable Logic Controller (PLC) devices. It highlights how voice assistants like Alexa, Siri, Cortana, and Google Assistant are pioneering and pushing the future of human–machine interfaces, with applications moving from smart homes to industrial automation. Containerization, illustrated by Docker, is transforming software deployment practices, offering benefits such as enhanced portability, modular architecture, and improved security when applied to industrial PLCs. The article introduces a novel approach to enhancing human–machine interfaces (HMIs) within industrial applications, leveraging voice recognition and containerization technologies on Programmable Logic Controllers (PLCs). Unlike traditional systems, this article integrates voice assistant with industrial PLCs through a containerized IoT architecture. This innovative framework enables efficient deployment on edge devices, supporting modular, portable, and secure operations aligned with Industry 4.0 and 5.0 paradigms. The study further includes a detailed implementation on microcontrollers and industrial PLCs, validating its application in a controlled laboratory environment and virtual model.

On the exact quantum query complexity of MOD and EXACT functions

On the exact quantum query complexity of MOD and EXACT functions

Dual-wavelength sub-Nyquist sampling scheme for clipping-avoidance photonic ADC.

We propose a dual-wavelength scheme for a clipping-avoidance photonic analog-to-digital converter (PADC) operating at the sub-Nyquist sampling rate. The scheme utilizes two characteristics, the phase-wrapping feature of a PADC and the wavelength-sensitive feature of a phase modulator, equivalently performing a dual-modulus (DM) modulo operation to avoid clipping. Coupled with an unwrapping algorithm based on the Chinese remainder theorem (CRT), the proposed scheme enables signal reconstruction from the processed signals independent of the sampling rate. We demonstrated proof-of-concept experiments on a PADC chip fabricated on an LNOI platform. Experimental results show that 1G/2G/4G-baud 10-level pulse amplitude modulation (PAM-10) waveforms were successfully reconstructed at the sub-Nyquist sampling rate of 1/2/4Gs/s, respectively. Our work provides a potential solution to achieve on-chip clipping-avoidance PADCs operating at the sub-Nyquist sampling.

GAN-based pseudo random number generation optimized through genetic algorithms

Pseudo-random number generators (PRNGs) are deterministic algorithms that generate sequences of numbers approximating the properties of random numbers, which are widely utilized in various fields. In this paper, we present a Genetic Algorithm Optimized Generative Adversarial Network (hereinafter referred to as GAGAN), which is designed for the effective training of discrete generative adversarial networks. In situations where non-differentiable activation functions, such as the modulo operation, are employed and traditional gradient-based backpropagation methods are inapplicable, genetic algorithms are utilized to optimize the parameters of the generator network. Based on this framework, we propose a novel recursive PRNG. Given that a PRNG can be constructed from one-way functions and their associated hardcore predicates, our proposed generator consists of two neural networks that simulate these functions and serve as the state transition function and the output function, respectively. The proposed PRNG has been rigorously tested using stringent benchmarks such as the NIST Statistical Test Suite (SP800-22) and the Chinese standard for random number generation (GM/T 0005-2021). Additionally, it has demonstrated outstanding performance in terms of Hamming distance. The results indicate that the proposed GAN-based PRNG has achieved a high degree of randomness and is highly sensitive to variations in the input.

A Review on Modular Multi-level Converter Based HVDC Systems

Modular Multilevel Converters (MMCs) have emerged as a promising technology for High Voltage Direct Current (HVDC) transmission systems, offering several advantages such as reduced harmonic distortion, high voltage capability and modularity. This paper presents a comprehensive review of MMC-based HVDC systems, focusing on their applications, control strategies and challenges. The paper begins by discussing the basic principles and structure of MMCs, highlighting their modular design and operation. The paper delves into the control strategies employed in MMC-HVDC systems, emphasizing the importance of coordinated control between the AC and DC sides to ensure stable and efficient operation. Furthermore, the paper addresses the challenges associated with MMC-HVDC systems, such as fault ride-through capability, harmonic interactions and grid integration. It highlights recent advancements in control techniques and technologies that are being developed to address these challenges. The paper provides a valuable overview of MMC-based HVDC systems, highlighting their potential benefits and the ongoing research efforts to overcome their challenges. As the demand for renewable energy sources and long-distance power transmission increases, MMC-HVDC systems are poised to play a crucial role in shaping the future of the power grid

JumpBackHash: Say Goodbye to the Modulo Operation to Distribute Keys Uniformly to Buckets

ABSTRACTIntroductionDistributed data processing and storage systems require efficient methods to distribute keys across buckets. While simple and fast, the traditional modulo‐based mapping is unstable when the number of buckets changes, leading to spikes in system resource utilization, such as network or database requests. Consistent hash algorithms minimize remappings but are either significantly slower, require floating‐point arithmetic, or are based on a family of hash functions rarely available in standard libraries. This work introduces JumpBackHash, a consistent hash algorithm that overcomes those shortcomings.MethodologyJumpBackHash applies the concept of active indices borrowed from consistent weighted sampling, which inherently leads to consistency. It generates the active indices in reverse order, which avoids floating‐point operations, enables the minimization of consumed random values and the use of a standard pseudorandom generator, and finally leads to a very efficient algorithm.ResultsTheoretical analysis shows that JumpBackHash has an expected constant runtime. The expected value and the variance of the number of consumed random values perfectly agree with the experiments. Empirical tests also confirm the consistency.ConclusionJumpBackHash offers a fast and efficient solution for uniformly distributing keys across buckets in distributed systems. Its simplicity, performance, and the availability of a production‐ready Java implementation as part of the Hash4j open source library make it a viable replacement for the modulo‐based approach for improving assignment and system stability.

Local invariants of conformally deformed non-commutative tori II: Multiple operator integrals

We explicitly compute the local invariants (heat kernel coefficients) of a conformally deformed non-commutative d-torus using multiple operator integrals. We derive a recursive formula that easily produces an explicit expression for the local invariants of any order k and in any dimension d. Our recursive formula can conveniently produce all formulas related to the modular operator, which before were obtained in incremental steps for d∈{2,3,4} and k∈{0,2,4}. We exemplify this by writing down some known (k=2, d=2) and some novel (k=2, d≥3) formulas in the modular operator.

Integrated photonic modular arithmetic processor

Integrated photonic computing has emerged as a promising approach to overcome the limitations of electronic processors in the post-Moore era. However, present integrated photonic computing systems face challenges in achieving high-precision calculations, consequently limiting their potential applications, and their heavy reliance on analog-to-digital (AD) and digital-to-analog (DA) conversion interfaces undermines their performance. Here we propose an innovative photonic computing architecture featuring scalable calculation precision and, to our knowledge, a novel photonic conversion interface. By leveraging the residue number system (RNS) theory, the high-precision calculation is decomposed into multiple low-precision modular arithmetic operations executed through optical phase manipulation. Those operations directly interact with the digital system via our proposed optical digital-to-phase converter (ODPC) and phase-to-digital converter (OPDC). Through experimental demonstrations, we showcase a calculation precision of 9 bits and verify the feasibility of the ODPC/OPDC photonic interface. This approach paves the path towards liberating photonic computing from the constraints imposed by limited precision and AD/DA converters.

Tolerance to asynchrony in algorithms for multiplication and modulo

In this article, we study some parallel processing algorithms for multiplication and modulo operations. We demonstrate that the state transitions that are formed under these algorithms satisfy lattice-linearity, where these algorithms induce a lattice among the global states. Lattice-linearity implies that these algorithms can be implemented in asynchronous environments, where the nodes are allowed to read old information from each other. It means that these algorithms are guaranteed to converge correctly without any synchronization overhead. These algorithms also exhibit snap-stabilizing properties, i.e., starting from an arbitrary state, the sequence of state transitions made by the system strictly follows its specification.

RSD-based high-performance radix-4 Montgomery Modular Multiplication for Elliptic Curve Cryptography

This paper proposes a high-performance radix-4 Montgomery Modular Multiplication (MMM) algorithm and its corresponding hardware architecture for Elliptic Curve Cryptography (ECC), in which the quotient and the partial product accumulation are computed in parallel in each iteration. Additionally, in this MMM, the Redundant Signed Digit (RSD) representation and the Signed Digit Adder (SDA) are used to eliminate the long carry chain and achieve parallel computation, as well as remove pre-computation and integrate modular reduction operations. Our MMM algorithm is implemented in 256-bit and 1024-bit versions on Xilinx Virtex-6 and Virtex-7 FPGAs, respectively. It consumes only 1.55k/10.18k Look-Up Tables (LUTs), takes 133/517 clock cycles, and runs at maximum frequencies of 558.8/641.7 MHz. According to the comparison in terms of Area Time Product (ATP), our design can achieve the ATP of 0.369 over the 256-bit NIST prime domain, which is approximately half of that of the state-of-the-art works. The Scalar Point Multiplication (SPM) scheme using this MMM algorithm consumes 14.19k LUTs and completes a single Scalar Point Multiplication (SPM) operation in 0.217 ms, and it also has a lower ATP than most other SPM algorithms currently in existence.

Truncated multiplication and batch software SIMD AVX512 implementation for faster Montgomery multiplications and modular exponentiation

This paper presents software implementations of batch computations, dealing with multi-precision integer operations. In this work, we use the Single Instruction Multiple Data (SIMD) AVX512 instruction set of the x86-64 processors, in particular the vectorized fused multiplier-adder VPMADD52. We focus on batch multiplications, squarings, modular multiplications, modular squarings and constant time modular exponentiations of 8 values using a word-slicing storage. We explore the use of Schoolbook and Karatsuba approaches with operands up to 4108 and 4154 bits respectively. We also introduce a truncated multiplication that speeds up the computation of the Montgomery modular reduction in the context of software implementation. Our Truncated Montgomery modular multiplication improvement offers speed gains of almost 20 % over the conventional non-truncated versions. Compared to the state-of-the-art GMP and OpenSSL libraries, our speedup modular operations are more than 4 times faster. Compared to OpenSSL BN_mod_exp_mont_consttimex2 using AVX512 and madd52* (madd52hi or madd52lo) in 256-bit registers, in fixed-window exponentiations of sizes 1024 and 2048 , our 512-bit implementation provides speedups of respectively 1.75 and 1.38, while the 256-bit version speedups are 1.51 and 1.05 for 1024 and 2048 -bit sizes (batch of 4 values in this case).

Mesh Convolution With Continuous Filters for 3-D Surface Parsing.

Geometric feature learning for 3-D surfaces is critical for many applications in computer graphics and 3-D vision. However, deep learning currently lags in hierarchical modeling of 3-D surfaces due to the lack of required operations and/or their efficient implementations. In this article, we propose a series of modular operations for effective geometric feature learning from 3-D triangle meshes. These operations include novel mesh convolutions, efficient mesh decimation, and associated mesh (un)poolings. Our mesh convolutions exploit spherical harmonics as orthonormal bases to create continuous convolutional filters. The mesh decimation module is graphics processing unit (GPU)-accelerated and able to process batched meshes on-the-fly, while the (un)pooling operations compute features for upsampled/downsampled meshes. We provide an open-source implementation of these operations, collectively termed Picasso. Picasso supports heterogeneous mesh batching and processing. Leveraging its modular operations, we further contribute a novel hierarchical neural network for perceptual parsing of 3-D surfaces, named PicassoNet++. It achieves highly competitive performance for shape analysis and scene segmentation on prominent 3-D benchmarks. The code, data, and trained models are available at https://github.com/EnyaHermite/Picasso.

Small interval interpolation fitting bootstrapping method based on residue number system

Aiming at the problem that the bootstrapping time of approximate homomorphic encryption scheme is too long, a small interval interpolation fitting method based on residue system is proposed. In this paper, the sinusoidal function by using interpolating and fitting method between the multiple cells to avoid the increase in bootstrapping time or decrease in calculation accuracy caused by the high degree of fitting polynomial is calculated. And the efficiency of modular multiplication and modular inversion in the calculation process is improved by combining the residual system. Lagrange interpolation polynomial is used to interpolate and fit the sine function among different intervals. The comparison function is implemented by the compound implementation of low-degree polynomials, and an interval judgment algorithm is proposed to identify the interval of the ciphertext. Finally, under the precision of 24 bits, the modular operation time in the bootstrapping process decreased to 8% of the HEAAN. When the number of slots is 65 536, the average module operation time per slot is 0.028 ms.

Dynamical non-locality in the near-horizon region of a black hole with quantum time

The formalization of the modular energy operator within the curved spacetime is achieved through the timeless approach proposed by Page and Wootters. The investigation is motivated by the peculiar behavior of the near horizon region of a black hole and its quantum effects, leading to a restriction of the study to the immediate vicinity. The focus lies on the perspective of a static observer positioned close to the horizon. This paper highlights the alteration of the modular energy's behavior in this region compared to flat spacetime. Furthermore, it is observed that the geometry of the spacetime influences the non-local properties of the modular energy. Moreover, within the event horizon of the black hole, the modular energy exhibits a completely distinct behavior, rendering its modular behavior imperceptible in this specific region.

CSAIL2019 Crypto-Puzzle Solver Architecture

tThe CSAIL2019 time-lock puzzle is an unsolved cryptographic challenge introduced by Ron Rivest in 2019, replacing the solved LCS35 puzzle. Solving these types of puzzles requires large amounts of intrinsically sequential computations, with each iteration performing a very large (3,072-bit for CSAIL2019) modular multiplication operation. The complexity of each iteration is several times greater than known field-programmable gate array (FPGA) implementations, and the number of iterations has been increased by about 1,000x compared with LCS35. Because of the high complexity of this new puzzle, a number of intermediate, or milestone, versions of the puzzle have been specified. In this article, we present several FPGA architectures for the CSAIL2019 solver, which we implement on a medium-sized Intel Agilex device. We develop a new multi-cycle modular multiplication method, which is flexible and can fit on a wide variety of sizes of current FPGAs. We introduce a class of multi-cycle squarer-based architectures that allow for better resource and area trade-offs. We also demonstrate a new approach for improving the fitting and timing closure of large, chip-filling arithmetic designs. We used the solver to compute the first 23 out of 28 milestone solutions of the puzzle, which are the first reported results for this problem.

Constructing a Nondegenerate m-Dimensional Integer-Domain Chaotic Map Model over GF(2n) with Application in PRNG

To address the problem of dynamic degradation over a finite-precision platform of chaotic maps and the reversibility of linear chaotic maps, we propose an improved model over GF([Formula: see text]) that is called the nondegenerate m-Dimensional [Formula: see text] Integer-Domain Chaotic Maps (mD-IDCMs). This model incorporates modular exponentiation operation, and is capable of constructing nondegenerate IDCMs of any dimension. Moreover, we prove the irreversibility of mD-IDCM and analyze its chaotic behaviors in terms of positive Lyapunov Exponents (LEs). The results of theoretical analysis show that the proposed mD-IDCM model can obtain the desired positive LEs by appropriately configuring its coefficient matrix. Then, we present two instances, and analyze their LEs, Kolmogorov entropy, Sample entropy, Correlation dimension, and the dynamic analysis indicates that the chaotic map constructed by mD-IDCM has ergodicity within a sufficiently large chaotic range. Finally, we design a Pseudo-Random Number Generator (PRNG) with a key to verify the practicability of the mD-IDCM.

U-DeepONet: U-Net enhanced deep operator network for geologic carbon sequestration

Learning operators with deep neural networks is an emerging paradigm for scientific computing. Deep Operator Network (DeepONet) is a modular operator learning framework that allows for flexibility in choosing the kind of neural network to be used in the trunk and/or branch of the DeepONet. This is beneficial as it has been shown many times that different types of problems require different kinds of network architectures for effective learning. In this work, we design an efficient neural operator based on the DeepONet architecture. We introduce U-Net enhanced DeepONet (U-DeepONet) for learning the solution operator of highly complex CO2-water two-phase flow in heterogeneous porous media. The U-DeepONet is more accurate in predicting gas saturation and pressure buildup than the state-of-the-art U-Net based Fourier Neural Operator (U-FNO) and the Fourier-enhanced Multiple-Input Operator (Fourier-MIONet) trained on the same dataset. Moreover, our U-DeepONet is significantly more efficient in training times than both the U-FNO (more than 18 times faster) and the Fourier-MIONet (more than 5 times faster), while consuming less computational resources. We also show that the U-DeepONet is more data efficient and better at generalization than both the U-FNO and the Fourier-MIONet.

Modular linear differential operators and generalized Rankin-Cohen brackets

The aim of this paper is to give expressions for modular linear differential operators (MLDOs) of any order. In particular, we show that they can all be described in terms of Rankin-Cohen brackets and a modified Rankin-Cohen bracket found by Kaneko and Koike. We also give more uniform descriptions of MLDOs in terms of canonically defined higher Serre derivatives and an extension of Rankin-Cohen brackets, as well as in terms of quasimodular forms and almost holomorphic modular forms. The last of these descriptions involves the holomorphic projection map. The paper also includes some general results on the theory of quasimodular forms on both cocompact and non-cocompact subgroups of S L 2 ( R ) SL_2(\mathbb {R}) , as well as a slight sharpening of a theorem of Martin and Royer on Rankin-Cohen brackets of quasimodular forms.

A multi-objective decision-making method for small modular reactor operation based on A3C algorithm

Small modular reactors (SMRs) are ideal energy sources for remote areas, but they still require operators to make decisions. Due to the harsh working environment, it is difficult to resume operation of small modular reactors once an accident occurs in unmanned application scenarios. Therefore, a multi-objective operation scheme that ensures safety and takes into account the operational task requirements is particularly important. We proposed an artificial intelligence approach for multi-objective optimization and decision-making for SMRs. We used a multi-objective extension of the Asynchronous Advantage Actor-Critic (A3C) algorithm to learn a comprehensive optimization function reflecting the importance of each objective under different tasks. We also used a proxy deep neural network (DNN) simulating the reactor dynamics and speeding up the training process. We tested our approach on a simulated SMR under different scenarios, such as normal operation and fault occurrence. The results showed that our approach can perform well under different conditions and avoid local optima. The verification results showed that the operation limits are not violated in the transient process. Our approach solves a challenging problem and provides a valuable insight for the field of SMRs. It can also be applied to other complex systems that require multi-objective optimization and decision-making.

Operation Scheme analysis of a multipurpose small modular reactor under cogeneration condition based on a once-through steam generator dynamic model

Highly flexible load requirements and cogeneration economy need to challenge the operation of a multipurpose small modular reactor cogeneration plant with once-through steam generators. Therefore, the present study develops a once-through steam generator dynamic model to analyze the multipurpose small modular reactor operation scheme under cogeneration conditions at different power levels. The once-through steam generator dynamic model is derived based on conversation equations using the moving boundary method. It is verified with RELAP5 results and open literature and the maximum relative error is 3.21 %. Three operation schemes are proposed for multipurpose small modular reactor cogeneration operation: Scheme 1 with constant steam pressure and average coolant temperature, Scheme 2 with constant steam temperature and pressure, and Scheme 3 with constant steam temperature and pure sliding steam pressure. Steady-state and dynamic characteristics with three operation schemes are simulated and investigated at three power levels: 100 %, 70 % and 30 %. The steady-state results show that Scheme 1 is more favorable for the primary loop, while Scheme 2 is beneficial to the secondary loop, and Scheme 3 can improve the thermal efficiency at low power level. The transient findings indicate that disturbances from the reactor side have a significant impact on the once-through steam generator and the minimum settling time is 3.3 s. Consequently, steam temperature control of once-through steam generator is achieved by regulating the control rods for Schemes 2 and 3, while steam pressure is suggested to be controlled by the feedwater valve for Scheme 1. For cogeneration conditions at 70 % power level, Scheme 2 can achieve the highest steam flow of turbine, the highest steam flow of steam extraction and the smallest steam specific volume, which are 87.88 kg·s−1, 28.96 kg·s−1, and 0.0503 m3·kg−1, respectively. Scheme 2 is recommended for high power levels under cogeneration operation. In contrast, Scheme 1 is more suitable for the condensing unit operation for low power levels.