Modern General-purpose Processors Research Articles

Bitmap filter: Speeding up exact set similarity joins with bitwise operations

The Exact Set Similarity Join problem aims to find all similar sets between two collections of sets, with respect to a threshold and a similarity function such as Overlap, Jaccard, Dice or Cosine. The naïve approach verifies all pairs of sets and it is often considered impractical due the high number of combinations. So, Exact Set Similarity Join algorithms are usually based on the Filter-Verification Framework, that applies a series of filters to reduce the number of verified pairs. This paper presents a new filtering technique called Bitmap Filter, which is able to accelerate state-of-the-art algorithms for the exact Set Similarity Join problem. The Bitmap Filter uses hash functions to create bitmaps of fixed b bits, representing characteristics of the sets. Then, it applies bitwise operations (such as xor and population count) on the bitmaps in order to infer a similarity upper bound for each pair of sets. If the upper bound is below a given similarity threshold, the pair of sets is pruned. The Bitmap Filter benefits from the fact that bitwise operations are efficiently implemented by many modern general-purpose processors and it was easily applied to four state-of-the-art algorithms implemented in CPU: AllPairs, PPJoin, AdaptJoin and GroupJoin. Furthermore, we propose a Graphic Processor Unit (GPU) algorithm based on the naïve approach but using the Bitmap Filter to speedup the computation. The experiments considered 12 collections containing from 100 thousands up to 10 million sets and the joins were made using Jaccard thresholds from 0.50 to 0.95. The Bitmap Filter was able to improve 85% of the experiments in CPU, with speedups of up to 4.50× and 1.35× on average. Using the GPU algorithm, the experiments were able to speedup the original CPU algorithms by up to 577× using an Nvidia Geforce GTX 980 Ti.

Centralized MAC protocol for hierarchical caching processors

The subject of research is the architecture of modern processors with hierarchical organization of cache subsystem. Analysis of implementation possibility of wireless connectivity between cores and Level 3 cache has been carried out. In order tospecify the requirements to wireless communication channel, communication in modern general-purpose processors has been explored by an example of Intel Core i7 (Haswell). Interaction model of cache subsystem components has been developed, and on its basis interaction characteristics between them are being evaluated. Analysis of the model shows that the latency of cache line transmission via the proposed channel is about 0.26 nanoseconds, which correlates well with the latency of L1 cache (about 2 nanoseconds). Also, wireless channel satisfies the distance requirements, giving the possibility for data transmission upto 3 centimeters, as well as power requirements with consumption of 1 uW. The result of research is the developed medium access protocol for wireless connectivity between computational cores and Level 3 cache. To account for required simplicity of implementation and efficiency of operation, it is proposed to use the single frequency range for all radio interfaces and time division multiple access scheme with prescribed fields for addressing and data. The paper deals with protocol data unit structure, which is used for communication between units. Possibility of shared time counter creationis used for synchronization between units. Time division duplex with possibly dynamic non-equal time shares is used to organize uplink and downlink communications. Time division mechanism gives the possibility for the system to adapt to load irregularities between the cores through allocation of various amounts of time slots for each core.

ESTIMATION OF THE CROSS CORRELATION BASED OPTICAL FLOW FOR VIDEO SURVEILLANCE

This paper describes a new algorithm to calculate cross-correlation function. We combined box filtering technique for calculation of cross correlation coefficients with parallel processing using MMX/SSE technology of modern general purpose processors. We have used this algorithm for real time optical flow estimation between frames of video sequence. Our algorithm was tested on real world video sequences obtained from the cameras of video surveillance system.

Integer Ray Tracing

Despite nearly universal support for the IEEE 754 floating-point standard on modern general-purpose processors, a wide variety of more specialized processors do not provide hardware floating-point units and rely instead on integer-only pipelines. Ray tracing on these platforms thus requires an integer rendering process. Toward this end, we clarify the details of an existing fixed-point ray/triangle intersection method, provide an annotated implementation of that method in C++, introduce two refinements that lead to greater flexibility and improved accuracy, and highlight the issues necessary to implement common material models in an integer-only context. Finally, we provide the source code for a template-based integer/floating-point ray tracer to serve as a testbed for additional experimentation with integer ray tracing methods.

Extreme Filters-cache-efficient implementation of long IIR and FIR filters

Modern general purpose processors have powerful vector processing units that can be used in infinite impulse response and finite impulse response filtering in real time. In practice, the calculations are efficient only if the filter parameters fit into the processor's cache. With long filters, the computation is slowed down since the filter data do not fit into the cache at once. By computing the filter in multiple segments, more efficient cache utilization can be achieved. The presented optimization method works when multiple samples are processed in row. The improved cache efficiency increases performance by up to almost one magnitude over direct filter implementation on modern hardware

Hardware-Assisted Circumvention of Self-Hashing Software Tamper Resistance

Self-hashing has been proposed as a technique for verifying software integrity. Appealing aspects of this approach to software tamper resistance include the promise of being able to verify the integrity of software independent of the external support environment, as well as the ability to integrate code protection mechanisms automatically. In this paper, we show that the rich functionality of most modern general-purpose processors (including UltraSparc, x86, PowerPC, AMD64, Alpha, and ARM) facilitate an automated, generic attack which defeats such self-hashing. We present a general description of the attack strategy and multiple attack implementations that exploit different processor features. Each of these implementations is generic in that it can defeat self-hashing employed by any user-space program on a single platform. Together, these implementations defeat self-hashing on most modern general-purpose processors. The generality and efficiency of our attack suggests that self-hashing is not a viable strategy for high-security tamper resistance on modern computer systems.

Tools for real-time signal-processing research

The use of digital signal processing (DSP) devices for real-time communication applications is discussed. The authors comment on distinguishing aspects of DSP architecture, describing not so much individual processors as those features common to DSPs and distinct from modern general-purpose processors. They describe three DSP32xx-based machines that support DSP algorithm implementation: SURF-board, HoBo, and DSP3. They also described rtpi, a source-code debugger for workstations and for the AT&T DSP32C signal-processor integrated circuit, and dspx, a collection of subroutines and host programs that provides an execution environment for DSPs akin to the UNIX environment. These tools facilitate the transfer of algorithms from mainframes or workstations to DSP hardware. Included are case studies of two real-time implementations: the low-delay CELP (LD-CELP) speech coder and the decoder side of the perceptual audio coder (PAC), an algorithm that compresses CD-quality audio into a 128-kb/s stream without perceptible distortion. >