Abstract This letter proposes a low noise amplifier which has low noise figure and high linearity simultaneously using a cascode structure with an additional transistor. The proposed structure minimizes the noise source by using optimizing transistor sizes and also improves linearity from the current bleeding technique. The device was fabricated in a 0.5μm GaAs pHEMT process and has noise figure of 1.1 dB, a voltage gain of 15.0 dB, an OIP 3 of 30.8 dBm and an input/output return loss of 11.6 dB/10.4 dB from 1.8 to 2.6 GHz.Key words: Low Noise Amplifier(LNA), Linearity, PCSNIM, Internal Matching WX YZ[B\]^GV6_`abc8/ITde)fgRBG80a/X hBijklm(NIPA-2014-H0301-14-1008).n o pqM\r=s=t Revised December 18, 2015 ; Accepted January 27, 2016. (ID No. 20151111-35S)Corresponding Author: Moon-Que Lee (e-mail: mqlee@uos.ac.kr) x. 서 론 3yEg1-j/ z&&{9 |}~1Z1f $)-. 1' 7h&.g@ DD@ 1(Carrier Aggregation: CA) i-MN/Cjhe/ (band)iD0H&1-. 177N.j_j -1g(dynamic range)MN6_p /1 J-.1L6_p /-1gB !/7hGJ-. jS4;i i#$%&/¢£¤¥-. }~, #$%&¦ jBLp 1O§¨© /j¤aj-. «., #$%&y¬®/¤a¨&¯ !1 J-