Minimum Sum Of Absolute Difference Research Articles

VLSI Implementation of High Performance Optimized Architecture for Video Coding Standards

This study presents a fast search algorithm and its Very Large Scale Integration (VLSI) design to implement an Enhanced Diamond Search (EDS) of Block-based Motion estimation for video compression systems. The proposed algorithm reduces the number of search points with a slight increase in average Sum-of-Absolute Difference (SAD) per pixel and significant reduction in Peak Signal-to-Noise Ratio (PSNR) than the Full search (FS). The speed improvement ratio is 11.26%. A novel Motion Estimation (ME) algorithm is proposed in this study that exhibits some properties with potential to facilitate optimized VLSI implementation and to achieve high performance for real video sequences. The main characteristic of this proposed architecture is possessing of only five processing elements (PE) that are used to calculate minimum SAD by using efficient comparators and compressors. Simulation results indicate that our proposed architecture employs low power and processes the video data with high speed than existing architectures without significant change in the video quality.

A low-power VLSI implementation for fast full-search variable block size motion estimation

Variable block size motion estimation (VBSME) is becoming the new coding technique in H.264/AVC. This article presents a low-power VLSI implementation for VBSME, which employs a fast full-search block-matching algorithm to reduce power consumption, while preserving the optimal motion vectors (MVs). The fast full-search algorithm is based on the comparison of the current minimum sum of absolute difference (SAD) to a conservative lower bound so that unnecessary SAD calculations can be eliminated. We first experimentally determine the specific conservative lower bound of SAD and then implement the fast full-search algorithm in FPGA and 0.18 µm CMOS technology. To the best of our knowledge, this is the first time that a fast full-search block-matching algorithm is explored to reduce power consumption in the context of VBSME and implemented in hardware. Experiment results show that the proposed design can save power consumption by 45% compared to conventional VBSME designs that give optimal MV based on the full-search algorithms.

An Adaptive Occluded Region Detection and Interpolation for Robust Frame Rate Up-Conversion

FRUC (Frame Rate Up-Conversion) technique needs an effective frame interpolation algorithm using motion information between adjacent neighboring frames. In order to have good visual qualities in the interpolated frames, it is necessary to develop an effective detection and interpolation algorithms for occluded regions. For this aim, this paper proposes an effective occluded region detection algorithm through the adaptive forward and backward motion searches and also by introducing the minimum value of normalized cross-correlation coefficient (NCCC). That is, the proposed scheme looks for the location with the minimum sum of absolute differences (SAD) and this value is compared to that of the location with the maximum value of NCCC based on the statistics of those relations. And, these results are compared with the size of motion vector and then the proposed algorithm decides whether the given block is the occluded region or not. Furthermore, once the occluded regions are classified, then this paper proposes an adaptive interpolation algorithm for occluded regions, which still exist in the merged frame, by using the neighboring pixel information and the available data in the occluded block. Computer simulations show that the proposed algorithm can effectively classify the occluded region, compared to the conventional SAD-based method and the performance of the proposed interpolation algorithm has better PSNR than the conventional algorithms.

An improved intra-prediction algorithm for H.264

H.264 improves the coding efficiency by adopting rate distortion optimization (RDO); however, it yields high computational complexity. In order to reduce the intra-frame coding time, a fast and effective intra-prediction mode selection algorithm is proposed. The minimum sum of absolute differences between sub-block and its marginal weighted-pixels are used for selecting the candidates of prediction modes to speed up the intra-prediction process with an early termination criterion. Experimental results show that the proposed method can reduce the encoding time by more than 63% comparing with JM (Joint Model) software and is better than the previous algorithms, with negligible loss of coding performance.

Novel Automated Motion Compensation Technique for Producing Cumulative Maximum Intensity Subharmonic Images

The aim of this study was to develop a novel automated motion compensation algorithm for producing cumulative maximum intensity (CMI) images from subharmonic imaging (SHI) of breast lesions. SHI is a nonlinear contrast-specific ultrasound imaging technique in which pulses are received at half the frequency of the transmitted pulses. A Logiq 9 scanner (GE Healthcare, Milwaukee, WI, USA) was modified to operate in grayscale SHI mode (transmitting/receiving at 4.4/2.2 MHz) and used to scan 14 women with 16 breast lesions. Manual CMI images were reconstructed by temporal maximum-intensity projection of pixels traced from the first frame to the last. In the new automated technique, the user selects a kernel in the first frame and the algorithm then uses the sum of absolute difference (SAD) technique to identify motion-induced displacements in the remaining frames. A reliability parameter was used to estimate the accuracy of the motion tracking based on the ratio of the minimum SAD to the average SAD. Two thresholds (the mean and 85% of the mean reliability parameter) were used to eliminate images plagued by excessive motion and/or noise. The automated algorithm was compared with the manual technique for computational time, correction of motion artifacts, removal of noisy frames and quality of the final image. The automated algorithm compensated for motion artifacts and noisy frames. The computational time was 2 min compared with 60–90 minutes for the manual method. The quality of the motion-compensated CMI-SHI images generated by the automated technique was comparable to the manual method and provided a snapshot of the microvasculature showing interconnections between vessels, which was less evident in the original data. In conclusion, an automated algorithm for producing CMI-SHI images has been developed. It eliminates the need for manual processing and yields reproducible images, thereby increasing the throughput and efficiency of reconstructing CMI-SHI images. The usefulness of this algorithm can be further extended to other imaging modalities. (E-mail: flemming.forsberg@jefferson.edu)

Quantification and MRI Validation of Regional Contractile Dysfunction in Mice Post Myocardial Infarction Using High Resolution Ultrasound

A versatile, computationally efficient two-dimensional (2D) speckle-tracking method based on high resolution ultrasound imaging is proposed to quantify regional myocardial dysfunction in mice. Ultrasound scans were performed on the hearts of normal and post myocardial infarction (MI) mice with a Vevo770 scanner (VisualSonics, Toronto, Canada) operating at 30 MHz frequency. Regional myocardial motion was tracked using a 2D minimum sum of absolute differences (MSAD) block-matching algorithm. Motion analyses calculated from ultrasound images were compared with gold-standard analyses performed using small animal magnetic resonance imaging (MRI). The radial and circumferential components of strain were compared between ultrasound and MRI short axis views and promising correlations were obtained (r = 0.90 and r = 0.85 for radial and circumferential strain, respectively). Therefore, ultrasound imaging, followed by 2D image tracking, provides an effective, low cost, mobile method to quantify murine cardiac function accurately and reliably. (E-mail: jh7fj@virginia.edu)

A High-Performance Low Cost SAD Architecture for Video Coding

This paper presents a high-performance low cost sum of absolute difference (SAD) architecture for motion estimation, which consumes a lot of computation and resource in video coding. Unlike many hardware implementations based on complement adders, this paper features the comparison of unsigned numbers to generate partial results of SAD and determine minimum SAD. Furthermore, the compression array unit is implemented by 4-2 compressor. This general-purpose architecture is implemented with a 2-stage pipeline and it is suitable for block-based video compression standards, such as MPEG-4, H.263 and H.264/AVC. Performance analysis shows that compared with other SAD architectures, the proposed architecture reduces 15.3%-22.9% area at almost no cost of latency.

SAD computation based on online arithmetic for motion estimation

Block-based motion estimation is one of the critical tasks in today's video compression standards such as H.26x, MPEG-1, -2 and -4. Most of the block-based motion estimation algorithms are based on computing the sum of absolute differences (SAD) between corresponding elements in the candidate and reference blocks. In this paper, an field-programmable gate-array (FPGA) design is proposed for rapidly computing the minimum SAD. Two goals are achieved due to the use of online arithmetic (OLA): it is possible to implement a full 16×16 macroblock SAD in a single FPGA device; and it allows us to speed up computation by early termination of the SAD calculation when the candidate involved is bigger than the current reference SAD. Reconfigurable devices enable us to change 8×8 or 16×16 pixels per block quickly and easily. For a 16×16 SAD unit 1945 look-up tables (LUTs) are required at 425 MHz. A comparison with other related works is provided.

Global Elimination Algorithm and Architecture Design for Fast Block Matching Motion Estimation

This paper presents a new block matching motion estimation algorithm and its VLSI architecture design. The proposed global elimination algorithm (GEA) was derived from successive elimination algorithm (SEA), which can skip unnecessary sum of absolute difference (SAD) calculation by comparing minimum SAD with subsampled SAD (SSAD). Our basic idea is to separate the decision of early termination and SAD calculation for each candidate block to make data flow more regular and suitable for hardware. In short, we first compare the rough characteristics of all candidate blocks with the current block (SSAD). In turn, we select several best roughly matched candidate blocks to re-compare them with the current block by using detailed characteristics (SAD). Other features of GEA include fixed processing cycles, no initial guess, and high video quality (almost the same as full search). Unlike other fast algorithms, the mapping of GEA to hardware is very simple. We proposed an architecture that is composed of a systolic part to efficiently compute SSAD, an adder tree to support both SSAD and SAD calculations, and a comparator tree to avoid expensive sorting circuits. Simulation results show that our design is much more area efficient than many full-search architectures while maintaining high video quality and processing capability.

Quantitative 3-d diagnostic ultrasound imaging using a modified transducer array and an automated image tracking technique.

An approach for acquiring dimensionally accurate three-dimensional (3-D) ultrasound data from multiple 2-D image planes is presented. This is based on the use of a modified linear-phased array comprising a central imaging array that acquires multiple, essentially parallel, 2-D slices as the transducer is translated over the tissue of interest. Small, perpendicularly oriented, tracking arrays are integrally mounted on each end of the imaging transducer. As the transducer is translated in an elevational direction with respect to the central imaging array, the images obtained by the tracking arrays remain largely coplanar. The motion between successive tracking images is determined using a minimum sum of absolute difference (MSAD) image matching technique with subpixel matching resolution. An initial phantom scanning-based test of a prototype 8 MHz array indicates that linear dimensional accuracy of 4.6% (2 sigma) is achievable. This result compares favorably with those obtained using an assumed average velocity [31.5% (2 sigma) accuracy] and using an approach based on measuring image-to-image decorrelation [8.4% (2 sigma) accuracy]. The prototype array and imaging system were also tested in a clinical environment, and early results suggest that the approach has the potential to enable a low cost, rapid, screening method for detecting carotid artery stenosis. The average time for performing a screening test for carotid stenosis was reduced from an average of 45 minutes using 2-D duplex Doppler to 12 minutes using the new 3-D scanning approach.

Hardware-software co-implementation of a H.263 video codec

An H.263 video codec is implemented by adopting the concept of hardware and software co-design. Each module of the codec is investigated to find which approach between hardware and software is better to achieve real-time processing speed as well as flexibility. The hardware portion includes motion-related engines, such as motion estimation and compensation, and a memory control part. The remaining portion of the H.263 video codec is implemented in software using a RISC processor. This paper also introduces efficient design methods for hardware and software modules. In hardware, an area-efficient architecture for the motion estimator of a multi-resolution block matching algorithm using multiple candidates and spatial correlation in motion vector fields (MRMCS), is suggested to reduce the chip size. Software optimization techniques are also explored by using the statistics of transformed coefficients and the minimum sum of absolute difference (SAD) obtained from the motion estimator.