Microprogrammable Microprocessor Research Articles

Application of a microprogrammable microprocessor in digital signal processing analysis

In this paper, a digital signal processing system based on a microprogrammable bit-slice microprocessor is described. A horizontal microinstruction format with a field width of 124 pipelined bits is used. Hardware is designed to implement the Fourier analysis, linear prediction code, and other mathematical equations often involved in digital signal processing. The system is shown to be practical and flexible in student laboratory environment and research.

A microprogrammable high-speed data collection system for position sensitive x-ray detectors

A high-speed data acquisition system has been designed which collect digital data from one- and two-dimensional position sensitive X-ray detectors at a maximum average data rate of 1 MHz. The system consists of two separate fast buffer memories, a 64K word by 20-bit main storage, two timers, a display controller, a computer interface and a keyboard, controlled by a specially designed microprogrammable microprocessor. Data collection is performed by executing a microprogram stored in the control storage; data coming from a detector are first accumulated in a small but fast buffer memory by hardware and transferred to the main storage under control of the microprogram. This design not only permits time-resolved data collections but also provides maximum speed, flexibility and cost-effectiveness simultaneously. The system also accepts data from integrating detectors such as TV cameras. The system has been designed for use in experiments at conventional and synchrotron X-ray sources.

A Microprogrammable Microprocessor Simulator and Development System

A microprogrammable microprocessor simulation is discussed. Four memory mapped I/O devices permit the interaction with various simulated on-line devices. The microprogrammable format, based on the architecture of the Am2900 family of bit-slice products, allows numerous architectures to be modeled. A development system that includes a microassembler and a macroassembler is detailed. The application of this simulation in teaching and the development and debugging of macro/ microprograms are discussed. The simulation is written in Pascal, and the assemblers are built using the UNIX development tools LEX and YACC.

Microprogramming with microprocessors

Today's microprogramming of microprocessors includes the programming of the control unit as well as the structuring of the operation unit. This paper illustrates both tasks by presenting some concepts of architectures of microprogrammed and microprogrammable microprocessors. Special emphasis lies on the description of the influences of horizontal and vertical microprogramming and of space-sequential, time-sequential and pipelined processor organization on the design of digital computers. The paper should be understood as a tutorial, which is based on an except of a lecture on Principles of Computer Structures at the Technische Universität Berlin.

A High-Performance Microprocessor-Based FFT Processor

A high-performance FFT processor based on a microprogrammable microprocessor is described here. The system processes a 256-point complex transform in less than 5.3 ms and is capable of processing a variable length (4 to 256, radix-2) complex transform. The system uses fixed point arithmetic, and each complex piece of data consists of a 16-bit 2's complement real part and a 16-bit 2's complement imaginary part. The hardware consists of Intel 3000-bit-slice microprocessor, TRW's multiplier chip (MPY 16A-J), input and output RAM's, control PROM's, and some TTL logic.

Microprogrammable microprocessor survey

The purpose of this document is to provide a general overview of most of the commercially available microprogrammable microprocessors and associated microprogram sequencers. This document attempts to provide both an architectural overview as well as a microprogramming overview. No attempt is made in this document to provide the basic concepts of microprogramming, microprogramming terminology, etc. Instead, it is assumed that the reader has read or has access to the large amount of literature dealing with the topic of microprogramming, in general.

Development of a microprogrammable microprocessor system by means of a PDP-8E minicomputer

This paper describes a realized solution for some practical problems of microprogrammable microprocessor system applications, i.e. generation and verification of microprograms. The solution is especially suitable for emulation applications, e.g. simulation of the central processing unit of computers. Automatic microprogram generating, optimizing and verifying high level program were not used for microprogram writing. As a matter of fact the procedure itself and the hardware structure form a round whole, therefore neither the known microassemblers (CROMIS [8], Signetics Micro Assembler [9] nor incircuit emulators (as Intel MDS ICE-30 or the one described in [10]) were not applied. The program package described syntactically checks the symbolic source microprograms, makes it possible to edit the source programs, assembles them, and produces binary object programs. The hardware-software system presented here is Intel-3000 microprocessor family oriented but is applicable to any other type of microprogrammable microprocessor. The method for the symbolic writing of microprograms is presented; the assembler and auxiliary programs for generating and correcting microprograms are then described; and finally, descriptions of the development system and the program verification are given.

Intel 3000 and AM 2900 microprocessors — a comparison

Abstract Writing microprograms is notoriously hard. In practice, a major element in determining the difficulty of microprogramming is the architecture of the underlying processor. This paper compares the properties of two widely used bit-slice microprocessor systems — the Intel 3000 and AM 2900 series — as vehicles for microprograms. It begins with a general introduction to microprogrammable microprocessors and goes on to discuss in some detail the ways in which the various facilities needed for microprogramming are implemented on each of the two systems. Being impartial and based on experience, it brings out certain aspects of the system which cannot easily be deduced from the manufacturers' literature alone.

A multi-microprocessor implementation of a general purpose pipelined CPU

This paper discusses and shows by example the potential of a network of microprogrammable microprocessors as a cost-effective alternative to traditional hardwired medium- and large-scale mainframes. While biased towards vector processing, this system is not intended to compete with multi-million dollar supercomputers such as the 360/195, CDC STAR, Illiac IV, CRAY-1, TI ASC, etc., which use special algorithms and the fastest circuitry available. The architecture incorporates pipelining, multiprocessing and distributed processing techniques with bipolar microprocessor technology. The result should be a machine which will equal or outperform most traditional third- and fourth-generation mainframes at a fraction of the CPU cost. This should be the case even for scalar, general purpose computation.

A General Purpose Disk Based Distributed Processing Data Acquisition and Analysis System

This paper describes a recently developed general purpose distributed processing data acquisition and analysis system. The system has been designed to operate on a high speed synchronous bus. By adhering to the rigid protocol of the bus, the individual components of the system are independent of position and of other system components. The basic design uses multiple microcomputers and microprogrammable microprocessors to perform specific functions, many of which are normally performed by the CPU in a conventional minicomputer system.