Microprocessor Research Articles

The structural landscape of Microprocessor-mediated processing of pri-let-7 miRNAs

MicroRNA (miRNA) biogenesis is initiated upon cleavage of a primary miRNA (pri-miRNA) hairpin by the Microprocessor (MP), composed of the Drosha RNase III enzyme and its partner DGCR8. Multiple pri-miRNA sequence motifs affect MP recognition, fidelity, and efficiency. Here, we performed cryoelectron microscopy (cryo-EM) and biochemical studies of several let-7 family pri-miRNAs in complex with human MP. We show that MP has the structural plasticity to accommodate a range of pri-miRNAs. These structures revealed key features of the 5' UG sequence motif, more comprehensively represented as the "flipped U with paired N"(fUN) motif. Our analysis explains how cleavage of class-II pri-let-7 members harboring a bulged nucleotide generates a non-canonical precursor with a 1-nt 3' overhang. Finally, the MP-SRSF3-pri-let-7f1 structure reveals how SRSF3 contributes to MP fidelity by interacting with the CNNC motif and Drosha's Piwi/Argonaute/Zwille (PAZ)-like domain. Overall, this study sheds light on the mechanisms for flexible recognition, accurate cleavage, and regulated processing of different pri-miRNAs by MP.

The structural landscape of Microprocessor mediated pri-let-7 miRNA processing.

miRNA biogenesis is initiated upon cleavage of a primary miRNA (pri-miRNA) hairpin by the Microprocessor (MP), composed of the Drosha RNase III enzyme and its partner DGCR8. Multiple pri-miRNA sequence motifs affect MP recognition, fidelity, and efficiency. Here, we performed cryo-EM and biochemical studies of several let-7 family pri-miRNAs in complex with human MP. We show that MP has the structural plasticity to accommodate a range of pri-miRNAs. These structures revealed key features of the 5' UG sequence motif, more comprehensively represented as the "fUN" motif. Our analysis explains how cleavage of class-II pri-let-7 members harboring a bulged nucleotide generates a noncanonical precursor with a 1-nt 3' overhang. Finally, the MP-SRSF3-pri-let-7f1 structure reveals how SRSF3 contributes to MP fidelity by interacting with the CNNC-motif and Drosha's PAZ-like domain. Overall, this study sheds light on the mechanisms for flexible recognition, accurate cleavage, and regulated processing of different pri-miRNAs by MP.

An Untethered Heart Rhythm Monitoring System with Automated AI‐Based Arrhythmia Detection for Closed‐Loop Experimental Application

AbstractThe heart produces bioelectrical signals, which can be measured as an electrocardiogram (ECG) for the detection of rhythm disturbances. Rapid and precise detection of these arrhythmias is crucial for their termination by closed‐looped therapeutic interventions to counteract detrimental effects. However, there is a current lack of such systems tailored for experimental cardiovascular applications. This hampers not only in‐depth mechanistic studies but also translational testing of new therapeutic strategies, especially in an untethered manner in awake animal models. To break new ground, recent advances to develop a non‐invasive AI‐supported heart rhythm monitoring system for untethered automated arrhythmia detection in a continuous manner is combined. This system is housed in a lightweight jacket for mobile use and includes an on‐skin ECG sensor, a low‐power microprocessor unit, a massive data storage unit, and a power‐management system. By implementing a novel hybrid algorithm based on so‐called heart rate (R‐R) variability and a case‐specific AI model, 100% sensitivity and 95% specificity is achieved in detecting atrial arrhythmias within 2 s upon initiation in adult rats. Thereby, the novel system sets the stage for advanced mechanistic studies and therapeutic testing, including closed‐loop applications aiming for the termination of a broad range of atrial arrhythmias.

Heterovalent Zr4+/Nb5+‐Cosubstituted Negative Thermal Expansion Luminescent Materials with Anti‐Thermal Quenching Luminescence

AbstractRare earth luminescent materials based on negative thermal expansion (NTE) have achieved thermally enhanced photoluminescence, but these materials typically exhibit relatively weak luminescence intensity at room temperature. In this work, adopting the cationic heterovalent substitution strategy, a series of Sc2‐2xZrxNbxW3‐1.5xO12‐3x:Yb/Er (SZNWOx:Yb/Er) phosphors are prepared by solid‐state reaction. With the increase of x value, the substitution of Sc3+ by Zr4+/Nb5+ leads to a decrease in the local symmetry of Er3+. Compared with Sc2W3O12:Yb/Er (SWO:Yb/Er), this heterovalent substitution strategy significantly improves the luminescence intensity of SZNWOx:Yb/Er while retaining its anti‐thermal quenching luminescence and negative thermal expansion properties. By comparing and analyzing the temperature dependent temperature‐dependent steady‐state/transient spectra of SZNWO0.10:Yb/Er and SWO:Yb/Er phosphors, the anti‐thermal quenching mechanism is discussed from a new perspective. The luminescence intensity ratio (LIR) of the thermal coupled levels (TCL) of Er3+(2H11/2/4S3/2) is adopted for optical temperature sensing, achieving a maximum absolute sensitivity of 1.04% K−1 at 464 K and a maximum relative sensitivity of 1.08% K−1 at 298 K for the SZNWO0.10:Yb/Er phosphors. Finally, the potential applicability using the constructed flexible thin film to real‐world sensing scenarios is demonstrated, offering accurate and real‐time temperature monitoring at the local hotspot in the electronic component of the CPU chip.

Heat dissipation analysis and multi-objective optimization of Raspberry Pi CPU by natural convection

With the high-speed and high-frequency operation of CPU chips, as well as miniaturization and dense assembly of integrated circuits, the heat generated by the Raspberry Pi CPU is constantly increasing. To address the urgent need for efficient Raspberry Pi CPU heat dissipation and ensure normal operation within a safe temperature range, this study first established a model to simulate the CPU's thermal physics parameters during operation using CFD simulation software. An experimental platform was then set up to validate the CFD simulation results. Based on the validated CFD model, initial heat dissipation design was carried out. On this basis, the heat dissipation system was optimized by altering the heat sink’s length, width, fin height, thickness, spacing, and the thermal grease’s thermal conductivity between the heat sink and CPU chip. A surrogate model was established using the response surface methodology, and the NSGA-II genetic algorithm was employed for multi-objective optimization of the heat dissipation system’s cooling performance. Compared to the initial solution, the chip temperature was reduced by 6.19 °C, but the heat sink mass was increased by 0.65 g. By conducting multi-objective optimization design and making reasonable choices for the parameters, a suitable and an optimum design, in terms of both economics and efficiency, is obtained. These results demonstrate that this research can provide theoretical guidance and technical support for practical production. Furthermore, the methods and findings from this study can be applied to the design of heat dissipation systems for similar applications.

High Speed Transmission Characteristics on Glass Based Interposers

Interposers for system in package will became more and more important for advanced electronic systems. As the industry moves toward HPC (High Performance Computing) for huge data transmission with low power consumption. The major engineering requirements for HPC application are highdensity, high speed data transmission, low loss, precision manufacturing and low cost. On the 2.5D heterogenous package structure, key technology is fine wiring connected with CPU chip and HBM chips. The fine wires needed high speed transmission. This paper presents the demonstration of Glass-based twin type interposers, Glass interposer with fine pitch metalized through via and RDL interposer with low loss dielectrics on Glass carrier. We compare twin types of Interposes fabrication process capability with panel size format 300x400mm. Finally, we compare the transmission characteristics using eye diagram for heterogenous integration application. Glass Interposer has low loss glass via, it is effective vertical interconnection. RDL interposer has low loss dielectric layers, excellent transmission characteristics obtained on fine pitch trace area.

Microprocessor Design Using COPRAS Method

Introduction: A microprocessor is a computer and An important part of the structure, Without it, on your computer, Nothing can be done. it is a programmable device, It does some arithmetic on the input and logical operations and the desired output creates. In simple words, Microprocessor is on a chip It is a digital device Instructions from memory. Get them and decode them can run and give results. Fundamentals of Microprocessor. In a microprocessor machine language Take some steps that activate them, to the processor That's what it should do says Microprocessor instruction Three basics when implementing Doing things: Its addition, Subtraction, multiplication, division, and some logic functions Arithmetic and Logic Unit (ALU) makes use of. New Microprocessors are floating point Functions in numbers are doing In microprocessors The data in is from one location Can be moved to another location. It is a Program Counter (PC). Contains the registry, which Based on the value of the system address of the next instruction Stores, the microprocessor from place to place Jumps and makes decisions.Research significance: For microprocessor design, this Description Various semiconductors In device fabrication processes Made using some, Consequently in a chip carrier A drop in binding occurs. This chip carrier is then printed. Solder on the circuit board (PCB). done or in the socket is inserted. New microprocessor or microcontroller unit, To make the process flow logically Some general steps can be followed. These few steps make it even easier for small manageable tasks can be separated. A new microprocessor General steps for designing. A must-have in the new app is the determination of skills. required Data path to handle capabilities Set up. Machine code Instructional Design (ISA) Define. data path Create the necessary logic to control.Methodology: An analysis of the COPRAS method in this complex proportionality assessment (COPRAS) system in 1994 showed that the index values used to assess the Gavaskar, Kalkaska, and sarka introduced at this time increased and decreased. Alternatives: Poor life recycled products market, poor consumer perception of recycled products, poor supplier commitment, the poor success of curbside pickup. Evaluation Option: Finance Team, Engagement / Support, Infrastructure Team, Knowledge Team, Environment Team.Alternative: CISC is Intel 386, Intel 486, Pentium, EPIC is IA-64, DEC Alpha 21164. Evaluation preference: Feature size (micron), Supply voltage (V), Die size (mm2), DRAM bits/chip (m).Results: from the result, it is seen that CISC Intel 386 is got the first rank whereas DEC Alpha 21164 is having the lowest rank.

Experimental study on the bionic microchannel heat sink integrated with a piezoelectric pump

The increased integration of electronic chips and the miniaturization of electronic products significantly raise the heat generated by electronic devices. To meet the cooling requirements of highly integrated electronic devices and enhance the cooling performance of the piezo-driven cooling system, a piezo-driven microchannel liquid-cooling system for CPU chip cooling was developed. The system integrated a bionic microchannel heat sink and a piezoelectric pump with umbrella valves (PP-UV). The piezoelectric pump was used as the driving source to propel the coolant flow, and the output of the piezoelectric pump pulsated, contributing to the convective heat transfer of the fluid in the microchannel. The spider web microchannel heat sink (SWM-HS) was designed and compared with the tandem Y-shaped microchannel heat sink (T-YMHS). The performance of the piezo-driven microchannel heat sink system with different structured microchannel heat sinks was studied by combining experimentation and simulation. The results indicated that the SWM-HS cooling system exhibited better fluid transmission and cooling characteristics, along with lower input power (3.32 mW). When the drive voltage was 100 V, the output flow of the SWM-HS cooling system was 56.4 mL/min. With a thermal power consumption of 30 W, the CPU temperature remained stable at approximately 55 °C, while the total thermal resistance measured 0.183 °C/W. In comparison with T-YMHS, the internal pressure drop of the SWM-HS decreased by 20.7 %, the Nusselt number increased by 13.7 %, and it achieved a cooling efficiency of 64.48 %. The experimental results aligned well with the simulation results. This work contributes to advancing the application of piezoelectric devices in electronic cooling and enhancing the cooling efficiency of miniature cooling systems.

The LINUX Operating System: An Introduction

Linux is a Unix-like operating system for Intel 386/486/ Pentium based IBM-PCs and compatibles. The kernel of this operating system was written from scratch by Linus Torvalds and, although copyright by the author, may be freely distributed. A world-wide group of enthusiastic volunteers has collaborated in developing many aspects of Linux on the Internet. Linux can run the powerful set of compilers and programming tools (the 'GNU' corpus) of the Free Software Foundation, and XFree86, a port of the X Window System from MIT. Most capabilities associated with high performance workstations, such as networking, shared file systems, electronic mail, TEX, I*TE.X, etc. are freely available for Linux. It can thus transform cheap IBM-PC compatible machines into Unix workstations with considerable capabilities. The author explains how Linux may be obtained, installed and networked. He also describes some interesting applications for Linux that are freely available. One useful feature of Linux is its ability to coexist with other operating systems. Thus a user who has made an investment in DOS/ MS Windows software, may continue running these applications on his machine and install Linux on a separate partition on his existing hard disk. If needed, files from DOS/ MS Windows partitions can be accessed by Linux. The enormous consumer market for IBM-PC compatible machines continually drives down prices of CPU chips, memory, hard disks, CDROMs etc. Linux can convert such machines into powerful workstations that can be used for teaching, research and software development. For professionals who use Unix based workstations at work, Linux permits virtually identical working environments on their personal home machines. For cost conscious educational institutions (especially in developing nations), Linux can create world-class computing environments from cheap, easily maintained, PC clones. Finally, for university students, especially in science and engineering, Linux provides an essentially cost-free path away from DOS into the world of Unix and X Windows

Nerve GABA neurotransmitter health level detection system

Currently, neurological disorders are the primary global cause of illness and disability. Transcranial ultrasound stimulation in the deep brain has limited spatial resolution. However, ultrasound can enhance energy propagation resolution affected by tissue and bone dispersion. Among the non-invasive imaging methods in this category are biochemical assays that measure GABA levels and the highly expensive Magnetic Resonance Spectroscopy (MRS). Gamma- Aminobutyric Acid (GABA), a major neurotransmitter in the brain, contributes to 40% of inhibitory synapses in adult vertebrates. Biosensors such as piezoelectric sensors and the MPU6050 can accurately determine GABA levels in the nervous system. This system uses a Micro Processing Unit (MPU) and a piezoelectric pressure sensor to detect changes in GABA levels, which are essential for maintaining neurological health and balance. The system provides real-time data on GABA levels, and this high-accuracy information is displayed on an LCD panel.

Automatic elevator shaft inspection using a multi-sensor measuring system and computer vision techniques

The present work introduces a system capable of automatically measuring the dimensions of an elevator shaft using computer vision approaches and optical sensors without human intervention. Miscomputations on the available volume of the elevator shaft could lead to the manufacturing of a cabin that cannot be utilized due to the customization of the product. Hereupon, it is crucial to calculate the smallest cross-section in the shaft since this area affects the maximum floor space of the elevator. The suggested methodology employs a low cost multisensor measuring system incorporating a Jetson Nano, a LiDAR, laser sensors, and a Micro Processor Unit (MPU) that scans the whole elevator shaft in one single run and reconstructs it, evaluating the examined shaft. The arrangement descents through a pulley into the investigated shaft using one string on each side, with a weight hanging at the end to increase stability and avoid rotations. Finally, validation experiments were performed in a test elevator shaft, which was manually measured in each floor to provide a ground truth. The acquired results showed sufficient accuracy of less than 1 % and reliability, assuring the proper dimensioning of the elevator shaft and the high standards of the lift industry.

On-chip, non-invasive detection of all atrial arrhythmias for immediate and accurate characterization in adult rats

Abstract Background To monitor and record the occurrence and duration of cardiac arrhythmias in freely moving animals, ECG telemetry devices are often used. However, traditional telemetry devices require complex equipment unsuitable for on-site application in most animal housing facilities. Additionally, current atrial arrhythmias detection algorithms are mainly based on ECG R-R interval variability for atrial fibrillation (AF) detection. Such algorithms do not allow the detection of stable R-R interval atrial arrhythmias such as flutter. Thus there is currently a lack of non-invasive methods allowing automated detection of all atrial arrhythmias subtypes, thereby precluding in-depth research into general and subtype-specific mechanisms and treatment. Purpose Here we aim to create a non-invasive system allowing fast and accurate on-site detection and characterization of all atrial arrhythmias in rats. Methods Our atrial arrhythmia detector system was made of an on-skin ECG sensor, a low-power microprocessor unit, a large data storage unit and a battery. All components were assembled within a lightweight rat jacket. The filtered ECG signal was sent to the microprocessor allowing algorithm-based, real-time detection of atrial arrhythmias. The device allowed storage of ECG traces as well as arrhythmia characteristics (including type of arrhythmia and its duration). Atrial arrhythmias were induced by transesophageal atrial burst pacing in Wistar rats. These arrhythmia recordings were used to develop an AI detection method. Next, real-time detection algorithms based on R-R variability and AI were both integrated on-chip and compared using the same ECG data. Results ECG traces measured with our new system were similar to classical ECG measurements. Stored ECG traces provided the raw data for the development of an AI-based detection algorithm. The AI training was done using ECG data recorded from five different rats and reached 99.5% self-testing accuracy to detect all sub-types of atrial arrhythmias based on pre-categorized data. Using uncategorized data (n=25 from 5 rats) different from the training dataset, the AI algorithm could detect >80% of all types of atrial arrhythmias within 3s after initiation, while the rest could be detected within 10s. Though R-R interval based algorithm showed a high detection rate of 88% of AF within 10s, this method did not allow the detection of flutter or AF presenting regular R-R intervals within 1 minute after initiation. Conclusion Our atrial arrhythmia detection and analysis system provides a novel method for non-invasive investigation into atrial arrhythmias in rats and could easily be scaled for other species. It allows on-site fast and accurate detection and characterization of atrial arrhythmia subtypes without external equipment, thereby opening new possibilities for mechanistic studies and therapeutic testing, including closed-loop applications aiming for arrhythmia termination.

Global Interconnect Optimization

We propose a new comprehensive solution to global interconnect optimization. Traditional buffering algorithms mostly insert repeaters on a net-by-net basis based on slacks and possibly guided by global wires. We show how to integrate routing congestion, placement congestion, global timing constraints, power consumption, and additional constraints into a single resource sharing formulation. The core of our algorithm is a new buffered routing subroutine. Given a net and Lagrangean resource prices for routing, timing, placement, and power, it computes a buffered Steiner tree. The resource sharing framework provides a special multiplicative price update for fast convergence. Our algorithm is fast enough for practical instances. We demonstrate experimentally on 7nm microprocessor units that it significantly improves timing while reducing netlength and power consumption in an industrial design flow. Our implementation scales well under parallelization with up to 128 threads.

Visualization of structural health monitoring information using Internet-of-Things integrated with building information modeling

Structural Health Monitoring (SHM) has become a paramount necessity in civil engineering for improving the operational performance of aging infrastructure. Recent monitoring techniques have utilized emerging technologies in Industry 4.0, such as the Internet of Things, Big Data analytics, cloud computing, and cybersecurity, to automate SHM methodologies. However, they have found challenges in linking these technologies and developing an autonomous, well-established digital framework for applications of SHM. Visualizing processed SHM data in a real-time digital interface generates multiple obstacles, such as witnessing delays in data transfer and resorting to offline tools for manual data processing. This paper, therefore, explores the integration of Building Information Modeling (BIM) and the Internet of Things (IoT) through an Arduino micro-processing unit for tracking and visualizing the data from the time and frequency domains. Strategies for enabling data monitoring and processing are developed while continuously acquiring structural responses. The query of data is established in a web-based database instead of storing the data in offline resources that await manual intervention. The proposed real-time SHM methodology is validated experimentally using two practical applications: a dynamically moving vehicle over a simply-supported bridge prototype and a randomly excited three-story model with real-time visualization of both time- and frequency-domain information under undamaged and damaged conditions. The proposed research develops an early-phase Digital Twin (DT) to present static and real-time dynamic data in a rich-fed BIM database.

From Algorithm to Module: Adaptive and Energy-Efficient Quantization Method for Edge Artificial Intelligence in IoT Society

Next-generation industrial edge artificial intelligence (AI) applications will undoubtedly emerge on energy-efficient, highly-integrated platforms incorporating various sensors, processors, and functional modules. Effectively bridging sensor data captured from a microprocessor or central processing unit with dedicated processing modules is still being studied in academia and industry. Therefore, embedding the data quantization module onto edge AI chips, connecting sensors, processors, and functional modules, is critical to achieving adaptive transformation of diverse data representation formats. This paper proposes a novel adaptive and low-power quantization technique and systematically validates its effectiveness from algorithm to hardware module for industrial IoT applications, covering precise navigation for autonomous vehicles and accurate classification utilizing deep neural networks (DNNs). The proposed quantization method merges an adaptive conversion function from floating-point to fixed-point binaries and an adaptive radix-point determination function, ensuring adequate resolution and minimal error loss of the fixed-point inputs to the edge AI modules. The experimental results demonstrate that the quantization error in the proposed quantization technique contributes negligible errors to the navigation solutions of the strapdown inertial navigation system and the DNNs' top-1 and top-5 classification accuracy (on the order of 10 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$^{-8}$</tex-math></inline-formula> and 10 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$^{-7}$</tex-math></inline-formula> ). Moreover, a quantization-on-multiplier (QoM) hardware module is designed, synthesized, and routed in accordance with the proposed quantization technique. The simulation results indicate that the QoM's power consumption and area are 0.1 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$mW$</tex-math></inline-formula> and 649.552 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\mu m^{2}$</tex-math></inline-formula> , accounting for 5% and 14.15% of its total energy consumption and area, respectively. With our proposed on-chip quantization technique, the time required to quantize the parameters of DNNs is up to 1142 times shorter than with the existing benchmark off-chip quantization approaches.

An RDL Modeling and Thermo-Mechanical Simulation Method of 2.5D/3D Advanced Package Considering the Layout Impact Based on Machine Learning.

The decreasing-width, increasing-aspect-ratio RDL presents significant challenges to the design for reliability (DFR) of an advanced package. Therefore, this paper proposes an ML-based RDL modeling and simulation method. In the method, RDL was divided into blocks and subdivided into pixels of metal percentage, and the RDL was digitalized as tensors. Then, an ANN-based surrogate model was built and trained using a subset of tensors to predict the equivalent material properties of each block. Lastly, all blocks were transformed into elements for simulations. For validation, line bending simulations were conducted on an RDL, with the reaction force as an accuracy indicator. The results show that neglecting layout impact caused critical errors as the substrate thinned. According to the method, the reaction force error was 2.81% and the layout impact could be accurately considered with 200 × 200 elements. For application, the TCT maximum temperature state simulation was conducted on a CPU chip. The simulation indicated that for an advanced package, the maximum stress was more likely to occur in RDL rather than in bumps; both RDL and bumps were critically impacted by layouts, and RDL stress was also impacted by vias/bumps. The proposed method precisely concerned layout impacts with few resources, presenting an opportunity for efficient improvement.

Noncanonical processing by animal Microprocessor

Microprocessor (MP), DROSHA-DGCR8, processes primary miRNA transcripts (pri-miRNAs) to initiate miRNA biogenesis. The canonical cleavage mechanism of MP has been extensively investigated and comprehensively validated for two decades. However, this canonical mechanism cannot account for the processing of certain pri-miRNAs in animals. In this study, by conducting high-throughput pri-miRNA cleavage assays for approximately 260,000 pri-miRNA sequences, we discovered and comprehensively characterized a noncanonical cleavage mechanism of MP. This noncanonical mechanism does not need several RNA and protein elements essential for the canonical mechanism; instead, it utilizes previously unrecognized DROSHA dsRNA recognition sites (DRESs). Interestingly, the noncanonical mechanism is conserved across animals and plays a particularly significant role in C.elegans. Our established noncanonical mechanism elucidates MP cleavage in numerous RNA substrates unaccounted for by the canonical mechanism in animals. This study suggests a broader substrate repertoire of animal MPs and an expanded regulatory landscape for miRNA biogenesis.

Hierarchical Parallel Vision Processor for High-Speed Ship Detection

Ship detection is essential in ship rescue and marine traffic safety. However, high-speed real-time ship detection has become problematic in practical applications. In this brief, we propose a high-performance ship detection system utilizing the co-design of algorithm and hardware. First, the proposed Coarse-to-Fine Classification and Segmentation algorithm contains a two-stage convolutional neural network. It quickly locates the Region of Interest (RoI) and then accurately locates the ship’s position in the RoI without low-parallelism non-maximum suppression (NMS) post-processing. Second, we proposed a Hierarchical Parallel Vision Processor, including a pixel-parallel processing unit, a patch-parallel processing unit, and a global micro-processing unit, ensuring high-speed processing with different parallelism. Finally, we designed a high-speed real-time ship detection system. The experimental results show that our ship detection system based on the frequency of 100Mhz on Arria 10 FPGA can achieve a speed of 4778FPS, which is beneficial in practical applications.

Study on determination of an asynchronous motor’s reactive power by the current-to-voltage converter

This article presents a method for determining the primary currents, non-sinusoidal and asymmetrical currents flowing through the stator windings of an asynchronous motor based on the signal in the form of the output voltage from the current converter loops placed in each phase between the poles of the asynchronous motor stator and in the arrangement of the stator windings. Differences and characteristics of output signals are researched based on independent, series and opposite (bifilar) connection schemes of asynchronous motor current converter loops of measuring coil. In order to determine the value of the currents generated in each phase of the asynchronous motor stator windings, the output signals of the current converter with independent loop and loops connected in series were mutually analyzed. Measuring non-sinusoidal and asymmetrical currents, according to the opposite (bifilar) connection scheme, the loops of measuring coils are placed in the inter-pole grooves of each phase of the stator in the order corresponding to the three-phase stator windings, the current converter measuring coils each consists of two loops, bifilarly connected to each other. The end of loops of the measuring coils has two exits. Diodes and phase meter-regulators are placed on the first outputs of the loops, and they are oppositely connected to the microprocessor unit for measuring and controlling the asymmetry. The second outputs of the loops are connected directly opposite to the microprocessor unit for measuring and controlling non-sinusoidal currents. This type of current converter is important for determining the non-sinusoidal and asymmetrical currents generated in asynchronous motors, it increases the functional capabilities and accuracy of the current converter, and based on the determined results, it simplifies theoretical calculations, and at the same time, the dynamic and it will be possible to determine the static characteristics through theoretical differential equations. As a result of the research, practical and theoretical results were compared.

Hybrid Power Car Controller Simulation and Testing Equipment and Procedure

This research presents a device and procedure for simulating and testing the finished car controller of a hybrid power car. The device utilizes a PCI interface and a microprocessor for communication, resulting in improved reliability, high data transmission rate, and excellent expandability. By employing a mathematical model of the power unit, the system achieves cost reduction. The device includes a microprocessor unit, a PCI bus processing unit, a display unit, and an interface board card. Through connections between these components, convenient configuration of the finished car's structure, power unit parameters, operation spectrum, road spectrum, and interface board attributes are achieved, enhancing the system's versatility. When applied to testing hybrid power car controllers, this device and procedure reduce test duration and cost, while providing stable and accurate test results.