Microarchitecture Research Articles

Analyzing The Impact of Project-Based Learning STEAM Flipped Classroom on Computer Architecture and Organization Courses in Higher Education

This study examines the differences in students' creative thinking skills between the project-based learning STEAM Flipped Classroom and the direct learning STEAM Flipped Classroom model by paying attention to the role of academic self-efficacy as a moderator variable. The research population consists of students in informatics engineering study programs in the Denpasar area of Bali. The study used a quasi-experimental 2 x 2 factorial design. Data collection is carried out through questionnaires and test instruments. Data analysis used descriptive and inferential statistics, as well as analysis of covariance. The results showed a significant difference in students' creative thinking skills between those who learned with the STEAM Flipped Classroom project learning model and the STEAM Flipped Classroom direct learning model. In addition, there are differences in students' creative thinking skills based on the level of academic self-efficacy. The empirical application of the STEAM Flipped Classroom project model is proven to help students generate new ideas, develop ideas, and improve their thinking skills. However, the findings suggest that flexible thinking skills must be further enhanced. Students with high self-efficacy tend to be more proactive in providing constructive ideas in project-based learning activities. This research implies that it is necessary to actively motivate and share experiential stories with students who have low self-efficacy. In the future, I suggest that universities adopt the innovative learning model of project-based learning STEAM flipped Classroom to improve the creative thinking skills of informatics engineering students at the college level.

Integrating error correction and detection techniques in RISC-V processor microarchitecture for enhanced reliability

An essential consideration in processor design is ensuring reliability, particularly in demanding environments such as outer space and nuclear plants. To mitigate the effects of errors and enable error recovery, processors need to incorporate fault tolerance techniques. One common type of error is SEU (Single Event Upset), which affects various microelectronic devices including microprocessors, microcontrollers, and semiconductor memory devices. While error mitigation techniques have been developed for processors based on architectures like ARM (Advanced RISC Machine) and MIPS (Million Instructions Per Second), there is a gap in research for open-source ISAs (Instruction Set Architecture) like RISC-V, which this paper aims to address. This paper focuses on designing a fault-tolerant microarchitecture for a RISC-V processor that can correct one-bit errors, detect up to two-bit errors, and integrate lockstep and pipeline rollback features at a lower LUTs (Look Up Tables) consumption by re-using the same hardware pipeline for error mitigation and recovery through instruction mimicking. By incorporating these features, the proposed approach enhances the system’s fault tolerance by detecting and correcting errors caused by transient events and achieves a lower effective die size upon realization compared to contemporary works. The proposed microarchitecture design was simulated and synthesized using the Vivado Design Suite 2023.1 and implemented on a Zynq 7000 SoC ZC702 Evaluation Kit.

P‐81: Multimodal Intelligent Display Backplane Blocks

The display of the future is multimodal, integrating optical sensors, RFID antennas, ultrasound transducers, etc. The sensors produce a large amount of redundant data, which should be preprocessed on the substrate, ideally on the backpanel. Control gates and select and data drivers need to be more configurable and partitionable to create operational flexibility. This paper presents various circuit blocks for processing and control, including operational amplifiers, high‐resolution analog‐to‐digital converters, a microprocessor, DC‐DC converters, and high resolution sensor pixel array architectures. Moreover, the performance of the basic building blocks is compared in LTPS and IGZO technology.

Storage Systems: Organization, Performance, Coding, Reliability, and Their Data Processing, 1st Edition, October 13, 2021, Author: Alexander Thomasian

Textbooks on computer organization and architecture, operating systems, and databases do not sufficiently cover storage systems. This is especially so in view of rapid advances in storage technology in the form of flash and Storage Class Memories - SCMs and storage organizations such as datacentric and the DisAggregated Shared Everything - DASE.

Postmenopausal women with normal BMD who have fractures have deteriorated bone microarchitecture: A prospective analysis from The OFELY study

Most postmenopausal women who sustain fragility fracture (Fx) have their areal bone mineral density (BMD) above the osteoporosis threshold. A sizeable proportion of them have normal aBMD. This study aimed to prospectively investigate the association of fragility Fx with bone microarchitecture (MA) assessed by high-resolution peripheral computed tomography (HR-pQCT) in postmenopausal women without low BMD.At the 14th annual follow-up of the OFELY study, we measured bone MA at the distal radius and tibia with HR-pQCT in addition to areal BMD with DXA, in 586 postmenopausal women. Among them, 166 (29 %) women, mean (SD) age 65 (8) yr, had normal BMD defined as a T score ≥ −1 at the lumbar spine, femoral neck, and total hip. During a median [IQR] 15 [14–15] yr of follow-up, 46 of those women sustained incident fragility Fx, including 19 women with a major osteoporotic Fx (clinical spine, forearm, proximal humerus, hip). Women who sustained Fx did not differ for age, BMI, tobacco and alcohol use, diabetes, falls, FRAX®, aBMD, and TBS compared with women without incident Fx. In contrast, they had significant impairment of volumetric densities, cortical area (Ct. Ar) and thickness (Ct. Th), stiffness (K), and estimated failure load (FL) at the radius compared with women without incident Fx. At the radius, each SD decrease of volumetric densities, Ct.Ar, Ct.Th, K, and estimated FL were significantly associated with an increased risk of all fragility fractures with hazard ratios (HR) from 1.44 to 1.56 and of major osteoporotic fractures (HR from 1.66 to 2.57). Lesser impairment of bone MA was seen at the tibia.We conclude that even in women with normal areal BMD fragility fractures are associated with deterioration of bone microarchitecture.

Research on Application of Single Chip Microcomputer in Modern Communication System

The application of single chip microcomputer in modern communication system is deeply studied. Firstly, the main types and characteristics of microcontroller are described in detail, including microcontroller classified according to microprocessor architecture, memory type and use environment. Then, it discusses the main application fields of microcontroller in wireless communication, wired communication and optical communication, and analyzes its practical application in these fields. On this basis, the main challenges and problems encountered in modern communication systems are discussed, such as the complexity of design and production, power consumption, compatibility and expansibility. Finally, the solutions to these challenges and problems are put forward, and the future development trend of single-chip microcomputer in modern communication system is discussed.

E-COMMERCE TO SUPPORT MARKETING IN ASRILOKA WONOSALAM

The internet is an electronic tool that can be used for various activities such as communications, research, business transactions and others. Internet technology connects thousands of computer networks individuals and organizations around the world that internet technology is so popular. As is the sophistication of computer technology, all limitations in facilities, distance and transaction time can be overcome with easy. With just a "click" customers can get the items they want, they can find out what they want as desired and can carry out transactions with anyone without being limited by time and distance. In supporting its effectiveness, these sites continue to update and improve their features so as to make it easier for sellers to advertise their products and services, such as easy to access via Android and Blackberry mobile smartphones. The convenience offered making more and more sellers want to become members to market their goods and services. In product or service marketing activities, the focus required by the seller is subsequent promotion determine the channel to use. Advertising on e-commerce site channels is certainly expected have a positive impact on sellers. Effective marketing channels will be able to provide benefits and positive impacts in achieving the goals of marketing activities themselves. Besides that allows for the cultivation of relationships between sellers and buyers to interact with each other sustainable.

Research of the efficiency of computing services management platforms in the organization of fog computing

The work is devoted to studying the effectiveness of computing service management platforms in the organization of Fog Computing. As part of the work, the effectiveness of container orchestration platforms with the Fog computing organization is being studied. During the research, it is necessary to complete the following tasks: 1) select literature, scientific publications and Internet articles necessary for the research; 2) inspect container orchestration platforms; 3) determine the key requirements and criteria for conducting the study; 4) design and implement an automatic testing utility; 5) conduct a study of the effec-tiveness of container orchestration platforms with the organization of fog computing; 6) ana-lyze the results obtained and draw related conclusions. Deployment of Docker containers is organized. Docker Swarm is used to create a clus-ter. The problems of measuring the following parameters are solved: deployment time of one container, deployment time of a group of containers, response time of the horizontal zoom task, transmission delay time. The analysis of the obtained test results is carried out.

Kajian Konsep Elemen Seni Bina Mikro dalam Perniagaan Jalanan di Pulau Tuba

The purpose of this paper is to identify the elements of street business microarchitecture (MCR) in rural areas, namely Tuba Island, Langkawi, and its significance in the local economy. The impact of Covid-19 leads to a trend of Malaysian youth who had previously migrated to the city are returning to the countryside. Hence, it encourages a better understanding of urban sustainability through classification, design, and intervention in rural areas of Malaysia using case studies from Tuba Island, Langkawi. This study uses a qualitative research approach and literature review, by recording the presence of active structure of MCR of the street businesses and the scenarios that occur in the specific area and identifies the type of microarchitecture classification based on previous studies. Interviews and observation approaches were implemented to obtain comprehensible information to gather data, which were then used in the analysis. This study finds that MCR units that are available at Pulau Tuba are mainly permanent and semi-permanent status and can be found on main roads and places of commercial activities with many visitors. MCR typoscape T8 are mostly restaurants and grocery stores, while T3, T4 and T5 are suitable for small island use as they are remote, easy to set up and ad-hoc but fixed setting.

Microarchitectured strontium doped silver niobate embedded ecoflex composite films for highly efficient box-type mechanical energy harvesters

Understanding the increasing energy demands and probable utilization of mechanical energy harvesters, current research is highly focused on enhancing their performance/applicability in everyday life. Herein, we proposed a box-type hybrid nanogenerator (BT-HNG) consisting of acetone-dissolved microarchitectured strontium (Sr) doped silver niobate (ASNb)/ecoflex composite film as a highly efficient mechanical energy harvester. The simple and unique microarchitectured (MA) master mold was fabricated by immersing a plastic petri dish inside the acetone which was further utilized to obtain MA-composite films. The ASNb microparticles (MPs) with varying the Sr doping concentration were synthesized and further loaded inside the ecoflex film to enhance its dielectric properties. The MA-ASNb/ecoflex composite films were utilized as a negative triboelectric material and copper as a positive triboelectric material for the fabrication of HNG operating in a contact-separation mode. The ASNb filler concentration inside the ecoflex film was optimized in the aspect of Sr doping and filler concentrations to obtain the highest electricity from respective HNG. The highly efficient and stable electrical output produced by the HNG was further utilized to power various small-scale electronics. The BT-HNG producing unique direct current electrical output was developed by integrating five similar HNGs in it. The enhancement in the electrical output with successive addition of each HNG was thoroughly investigated. The proposed BT-HNG was successfully demonstrated as a real-time sensor that can be utilized to turn on the lamps situated at stairs, corridors, etc. in human presence. The enclosed BT-HNG along with a heavy weighing block was demonstrated to harvest vibrational/linear movements into electricity.

Lessons Learned from Automated Sharing of Intrusion Detection Alerts: The Case of the SABU Platform

Sharing the alerts from intrusion detection systems among multiple computer networks and organizations allows for seeing the “big picture” of the network security situation and improves the capabilities of cyber incident response. However, such a task requires a number of technical and non-technical issues to be resolved, from data collection and distribution to proper categorization, data quality management, and issues of trust and privacy. In this field note, we illustrate the concepts and provide lessons learned on the example of SABU, an alert sharing and analysis platform used by academia and partner organizations in the Czech Republic. We discuss the initial willingness to share the data that was later weakened by the uncertainties around personal data protection, the issues of high volume and low quality of the data that prevented their straightforward use, and that the management of the community is a more severe issue than the technical implementation of alert sharing.

Analisis Sistem Bus USB Dan PCI Pada Organisasi Arsitektur Komputer

Bus systems are an important component of modern computer organization and architecture. In this context, the two types of buses that stand out are Universal Serial Bus (USB) and Peripheral Component Interconnect (PCI). The USB bus is an interface standard commonly used to connect various external devices to a computer, while PCI is an internal bus that connects computer components. This study aims to analyze the role and characteristics of the USB and PCI bus systems in computer organization and architecture. The results of this analysis provide an in-depth understanding of the role of USB and PCI bus systems in modern computer organization and architecture. This information can help IT professionals and system designers make decisions regarding hardware connectivity and performance in a variety of computing environments.

RenderBench: The CPU Rendering Benchmark Suite Based on Microarchitecture-Independent Characteristics

This research addresses the issue of evaluating CPU rendering performance by introducing the innovative benchmark test suite construction method RenderBench. This method combines CPU microarchitecture features with rendering task characteristics to comprehensively assess CPU performance across various rendering tasks. Adhering to principles of representativeness and comprehensiveness, the constructed benchmark test suite encompasses diverse rendering tasks and scenarios, ensuring accurate capture of CPU performance features. Through data sampling and in-depth analysis, this study focuses on the role of microarchitecture-independent features in rendering programs, including instruction-level parallelism, instruction mix, branch prediction capability, register dependency distance, data flow stride, and memory reuse distance. The research findings reveal significant variations in rendering programs across these features. For instance, in terms of instruction-level parallelism, rendering programs demonstrate a high level of ILP (instruction-level parallelism), with an average value of 5.70 for ILP256, surpassing benchmarks such as Mibench and NAS Parallel Benchmark. Furthermore, in aspects such as instruction mix, branch prediction capability, register dependency distance, data flow stride, and memory reuse distance, rendering programs exhibit distinct characteristics. Through the application of the RenderBench method, a scalable and highly representative benchmark test suite was constructed, facilitating an in-depth exploration of CPU performance bottlenecks in rendering tasks. By delving into microarchitecture-independent features, this study provides profound insights into rendering program performance, offering valuable guidance for optimizing CPU rendering performance. The application of ensemble learning models, such as random forest, XGBoost, and ExtraTrees, reveals the significant influence of features like floating-point computation, memory access patterns, and register usage on CPU rendering program performance. These insights not only offer robust guidance for performance optimization but also underscore the importance of feature selection and algorithm choice. In summary, the results of feature importance ranking in this study provide beneficial directions and deep insights for the optimization and enhancement of CPU rendering program performance. These findings are poised to exert a positive impact on future research and development endeavors.

Design of High Performance Core Micro-Architecture Based on RISC-V ISA for Low Power Applications

Abstract: Numerous current and future applications aim to create highly efficient central processing units (CPUs). The RISC V processor micro-architecture is one illustration of a design that satisfies the necessities. The RISC-V Instruction Set Architecture [ISA] provides support for the micro-architecture. The instruction set architecture and the micro-architecture of a processor are two of the most crucial aspects of its design. The multiplier and divider circuits have a relatively high level of hardware complexity compared to other stages of the instruction execution process, which must be taken into account in any core microarchitecture. The construction of an appropriate hardware circuit that is capable of multiplication and division determines the overall size, power, and performance of a core. This center has four phases, and during those stages, each guidance is done, except for stacking and putting away information. The arithmetic operations can be completed within one clock cycle. On the other hand, the division and multiplication operations are repeated in an effort to shorten the critical path latency.

Management of Hardware Vulnerabilities in the Life Cycle Stages of Microprocessors and Computers

This article discusses the topical issues of managing information security vulnerabilities in the life cycle stages of processors and computer equipment. An analysis of the experience of identifying vulnerabilities in the course of the joint design of the processor, computing module and computing complex was carried out. A number of actions have been developed and presented to ensure the control of hardware vulnerabilities in the development stage. The use of the binary translation technology of the Elbrus platform is proposed to prevent the execution of malicious software. A method has been developed to eliminate vulnerabilities in computer equipment for automated systems used for various purposes by using the Lintel binary translation system component. An experiment is described, the purpose of which was to successfully exploit the Meltdown vulnerability on a computer with an Elbrus processor. The experiment showed that, due to the peculiarities of the microarchitecture of Elbrus processors, the exploitation of Meltdown-type vulnerabilities is impossible.

Quantum SoC and On-Chip Circuit Synthesis in the NISQ Era

In recent years, fueled by the breakthroughs in the technology in quantum computation, there has been a rising interest in the noisy intermediate-scale quantum (NISQ) era. In addition to a large number of qubits, the study of error correction and quantum algorithms has made great progress. However, as a primary goal of quantum computation, making practicable quantum computers in the NISQ era still needs further study, mainly focusing on quantum computer organization, architecture, and circuit synthesis. This paper studies the quantum circuit synthesis in a small-scale universal quantum computing device called a “quantum system-on-chip” (QSoC). We analyze the quantum compilation of the hybrid architecture for a small-scaled universal quantum computational device with a specific size (quantum chip). Two kinds of on-chip circuit synthesis algorithms are proposed and discussed.

Deep learning techniques on 3D‐MRI lung images for detection and segmentation of COVID‐19 virus

AbstractThe Coronavirus infection 2019 (COVID‐19) has influenced billions and has significantly affected the public medical care. Because of rising distrust toward the affectability of RT‐ PCR as screening technique, clinical imaging like registered tomography offers incredible potential as option. Notwithstanding, openly accessible COVID‐19 imaging information is restricted which prompts over fitting of conventional methodologies. To address this issue, the incumbent article proposes the segmentation of Corona Virus with Edge Based Segmentation and Grey Level Co‐occurrence Matrix‐CNN model, a creative mechanized division pipeline for COVID‐19 tainted districts in the lungs, which can deal with little datasets by use as variation information bases. For the screening of COVID‐19, the converse record polymerase‐based chain response (RT‐PCR) has been viewed as best quality level. As a significant supplement for tests of RT‐PCR, the strategies of radiological imaging, for instance, X‐beams as also Magnetic Resonance Imaging (MRI), DICOM (Digital Imaging and Communications in Medicine). have additionally shown viability in both flow analysis, including subsequent appraisal and assessment of infection advancement. Our strategy centers on‐the‐fly age of novel and irregular picture patches for preparing by playing out a few preprocessing techniques and misusing broad information expansion. For additional decrease of the over fitting danger, we executed a standard 3D U‐Net design rather than new or computational complex neural organization structures. Through a 5‐crease cross‐approval on 150 samples of the lung sweeps of COVID‐19 patients, we had the option to build up a profoundly exact just as vigorous division model for lungs and COVID‐19 tainted locales without over fitting on the restricted information. The article will strategize accomplished GCPSO with an accuracy of 98% for lungs and 0.761 for disease. It will show that the proposed technique beats related methodologies, propels the cutting edge for COVID‐19 division and improves clinical picture examination with restricted information.

Generalized Tree Structure to Annotate Untargeted Metabolomics and Stable Isotope Tracing Data.

In untargeted metabolomics, multiple ions are often measured for each original metabolite, including isotopic forms and in-source modifications, such as adducts and fragments. Without prior knowledge of the chemical identity or formula, computational organization and interpretation of these ions is challenging, which is the deficit of previous software tools that perform the task using network algorithms. We propose here a generalized tree structure to annotate ions in relationships to the original compound and infer neutral mass. An algorithm is presented to convert mass distance networks to this tree structure with high fidelity. This method is useful for both regular untargeted metabolomics and stable isotope tracing experiments. It is implemented as a Python package (khipu) and provides a JSON format for easy data exchange and software interoperability. By generalized preannotation, khipu makes it feasible to connect metabolomics data with common data science tools and supports flexible experimental designs.

Integrated analysis of power and performance for cutting edge Internet of Things microprocessor architectures

The Internet of Things (IoT) devices send and receive data to edge nodes that process the data and perform necessary actions. The rise of these clustered end-node IoT devices will considerably increase the delay in data transmission. In this paper, we analyse the performance and executional characteristics of several IoT devices to enable efficient node computing. The benchmarks related to varying applications are classified and we analyse the micro-architectural characteristics of embedded system devices. We discuss the implications of energy consumption and the effect of leakage power reduction among various architectures. We also investigate the impact of multiple supply voltage (MSV) for overall power reduction in the state-of-the-art processors. The computational characteristics of microprocessor devices including execution time, energy, performance, and power impacts are evaluated using several evaluation metrics. The proposed work provides a comprehensive analysis for the design of modern microprocessor architectures for heterogeneous applications. Finally the importance of artificial intelligence (AI) processor for cloud computing applications is discussed extensively.

Review of Quantum Computer Development

In recent years, quantum computers have been attracting attention. Quantum computers have become a hot topic of research in today's scientific research. This paper first introduces the basic principles of quantum computers, including the storage principle and quantum logic gates, then introduces a quantum algorithm, then introduces the organization of quantum computers, and finally is a discussion that will evaluate the strengths and weaknesses of quantum computers, and discusses the physical implementation of quantum computers and the outlook on quantum computing.