Microelectromechanical Systems Packaging Research Articles

Accurate Assessment of Packaging Stress Effects on MEMS Sensors by Measurement and Sensor–Package Interaction Simulations

In this paper, packaging-induced stress effects are assessed for microelectromechanical systems (MEMS) sensors. A packaged MEMS sensor may experience output signal shift (offset) due to the thermomechanical stresses induced by the plastic packaging assembly processes and external loads applied during subsequent use in the field. Modeling and simulation to minimize the stress-induced offset shift are essential for high-precision accelerometers, gyroscopes, and many other MEMS devices. Improvement of plastic package modeling accuracy is accomplished by correlating finite-element analysis package models using measured material properties and package warpage. Using a refined reduced-order MEMS sensor and package interaction model, device offset is simulated, optimized, and compared with data collected from a unique three-axis accelerometer, which uses a single mass for all three axes sensing. As a result, this accelerometer has achieved very low offset in all axes over device operation temperature range of to . Device offset performance was improved by at least five times after the MEMS design optimization as compared with the one prior to the optimization.

Wafer-Level Packaging of Micromechanical Resonators

An approach to low-cost, wafer-level packaging of microelectromechanical systems (MEMS), e.g., microresonators, is reported. The process does not require wafer-to-wafer bonding and can be applied to a wide range of MEMS devices. A sacrificial polymer-placeholder is first patterned on top of the MEMS component of interest, followed by overcoating with a low dielectric constant polymer overcoat. The sacrificial polymer decomposes at elevated temperature, and the volatile products from the sacrificial material permeate through the overcoat polymer leaving an embedded air-cavity around the MEMS structure. Thus, the device is released from the sacrificial polymeric material, housed in a protective overcoat. The protected MEMS device can then be handled and packaged like an integrated circuit. The electrical characteristics of the microresonators before and after packaging were essentially the same, showing the packaging scheme does not alter the device performance. This approach is applicable to both surface and bulk micromachined devices

Progress in Microelectromechanical Systems

Abstract: Recent advances in microelectromechanical systems (MEMS) technology have led to the development of a multitude of new devices heretofore impossible. However, applications of these devices are still hampered by challenges posed by their integration and packaging. The current trend in micro/nanosystems is to produce ever smaller, lighter and more capable devices at a lower cost than ever before. In addition, the finished products have to operate at very low power and in very adverse conditions while ensuring durable and reliable performance. Some of the new devices have been developed to function at high operational speeds, and others to make accurate measurements of operating conditions of specific processes. Regardless of their applications, the devices have to be packaged to facilitate their use. MEMS packaging, however, is application‐specific and, usually, has to be developed on a case‐by‐case basis. To facilitate advances of MEMS, educational programmes have been introduced addressing all aspects in their development. This paper addresses progress in MEMS by presenting pertinent aspects in a development of MEMS including, but not limited to, design, analysis, fabrication, characterisation, packaging, and testing. This presentation is illustrated with selected examples.

Evaluation of Die Stress in MEMS Packaging: Experimental and Theoretical Approaches

The device performance of microelectromechanical system (MEMS) inertial sensors such as accelerometers and gyroscopes is strongly influenced by the stress developed in the silicon die during packaging processes. This is due to the die warpage in the presence of the stress. It has previously been shown that most of the stress is generated during a die-attach process. In this study, we employ both experimental and theoretical approaches to gain a better understanding in a stress development induced during the packaging processes of a small silicon die (3.5times3.5 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ). The former approach is accompanied with an optical profilometer while the latter part by a finite element analysis and an analytical model. A specific emphasis is given to the effects of structural parameters such as the die-attach adhesive thickness and material properties on the stress development. The results from all three approaches show good agreement, in that more compliant and thicker adhesives offer great relief in the stress development, as well as bend the die convex downward from its central location. A stress model proposed from this study not only provides a diagnostic tool for very small stress-sensitive devices, but it will also present a design tool for low-stress MEMS packaging systems

Prognostics and Health Management of Electronic Packaging

The current state of the art in managing system reliability is geared toward the development of predictive models for unaged pristine materials. The current state of art allows the prediction of time-to-failure for a pristine material under known loading conditions based on relationships such as the Paris' power law , , the Coffin-Manson relationship [2], [13], [23], [24], and the S-N diagram. There is a need for methods and processes which will allow interrogation of material state in complex systems and subsystems to determine the remaining useful life prior to repair or replacement. This capability of determination of material or system state is called prognosis. In this paper, a methodology for prognostication of electronics has been demonstrated with data of leading indicators of failure for accurate assessment of product damage prior to appearance of any macro indicators of damage. Proxies for leading indicators of failure have been identified. Examples of proxies include microstructural evolution characterized by average phase size and correlated to time and equivalent creep strain rate, and stresses at interface of silicon structures. Structures examined include an electronics package and microelectromechanical systems package and interconnections. The test vehicle includes packages that have been mounted on a metal-backed printed circuit board typical of electronics deployed in harsh environments. In application environment, the metal backing provides thermal dissipation, mechanical stability, and interconnections reliability. Since an aged material knows its state, the research presented in this paper focuses on enhancing the understanding of material damage to facilitate proper interrogation of material state. A mathematical relationship has been developed between phase growth rate and time-to-1-percent failure to enable the computation of damage manifested and a forward estimate of residual life

Lifetime Estimation of Moems Devices

Generally, microelectro mechanical systems (MOEMS) devices require encapsulation for protecting their fragile and tiny inner components in a hermetically sealed cavity. Cavity hermeticity can be critical to the device performance and plays a vital role with respect to reliability and long-term drift characteristics of the MOEMS products. The paper presents a theoretical approach for estimation of lifetime of MOEMS devices in terms of cavity’s hermeticity to gases and water. The results are summarized as working maps for MOEMS packaging engineers, in terms of device cavity (internal package volume), equivalent leak rates, and equivalent size of interconnected defects in the bonding zone.

Wafer-level MEMS packaging via thermally released metal-organic membranes

This paper reports on the design, implementation and characterization of wafer-level packaging technology for a wide range of microelectromechanical system (MEMS) devices. The encapsulation technique is based on thermal decomposition of a sacrificial polymer through a polymer overcoat to form a released thin-film organic membrane with scalable height on top of the active part of the MEMS. Hermiticity and vacuum operation are obtained by thin-film deposition of a metal such as chromium, aluminum or gold. The thickness of the overcoat can be optimized according to the size of the device and differential pressure to package a wide variety of MEMS such as resonators, accelerometers and gyroscopes. The key performance metrics of several batches of packaged devices do not degrade as a result of residues from the sacrificial polymer. A Q factor of 5000 at a resonant frequency of 2.5 MHz for the packaged resonator, and a static sensitivity of 2 pF g−1 for the packaged accelerometer were obtained. Cavities as small as 0.000 15 mm3 for the resonator and as large as 1 mm3 for the accelerometer have been made by this method.

Ultrathin Silicon Micropackaging for RF MEMS Devices

In this paper we report a technology for lightweight, small radio-frequency (rf) microelectromechanical system packaging with a short electrical path length. We used an ultrathin silicon substrate as the packaging substrate. Via holes for vertical feed-through were fabricated on the thin silicon wafer. Then, bottom-up gold electroplating was applied to fill via holes. For hermetic sealing, gold-gold direct metal bonding was used in the sealing line. The packaged rf device has a reflection loss below -22 dB and an insertion loss of -0.05 to -0.08 dB. Therefore, with the ultrathin silicon wafer, a lightweight, small device package can be constructed.

Parasitic leakage resonance-free HRS MEMS package for microwave and millimeter-wave

A high resisitivity silicon (HRS, 10 kΩ cm) micro electro mechanical system (MEMS) package using a lightly-doped silicon (Si) chip carrier for coplanar waveguide (CPW) microwave and millimeter-wave integrated circuits (MMICs) is proposed in order to reduce parasitic problems of leakage, coupling, and resonance. The proposed chip carrier scheme is verified by fabricating and measuring a HRS CPW and a package on three types of carriers (conductor-backed metal, lightly-doped Si, and HRS) in the frequency range from 0.5 to 40 GHz. The proposed MEMS package using the lightly-doped (15 Ω cm) Si chip carrier and the HRS package shows the low loss and no parasitic leakage resonance since the lightly-doped Si chip carrier effectively absorbs and suppresses the parasitic leakage resonance. The HRS MEMS package for a CPW MMIC has an insertion loss ( S 21) of 2.0 dB and a power loss (PL) of 6.0 dB up to 40 GHz, while the insertion loss of a half feed-through package is less than 0.9 dB up to 40 GHz.

Wafer Scale Packaging of MEMS by Using Plasma-Activated Wafer Bonding

Plasma-assisted direct bonding has been investigated for wafer scale encapsulation of microelectromechanical systems (MEMS). Direct bonding requires smooth and flat wafer surfaces, which is seldom the case after fabrication of MEMS devices. Therefore, we have used polished chemical vapor deposited oxide as an intermediate bonding layer. The oxide layer is polished prior to bonding the MEMS wafer to cap silicon wafer. The bonding is carried out with plasma-assisted direct wafer bonding at a low temperature . Two different methods to form electrical contacts to the encapsulated device are presented. In the first method trenches are etched on the surface of the cap wafer before the bonding. During the bonding the trenches are aligned to the contact pads of the device wafer. After bonding the cap wafer is thinned down with grinding until the path to the contact pads is opened. In the second method one or both of the wafers are thinned down to around after bonding. The electrical path to contact pads is formed using V-groove sawing, metal sputtering, and lithography. To test the viability of the developed methods for MEMS encapsulation, we have sealed polysilicon resonator structures at a wafer level.

Localized bonding processes for assembly and packaging of polymeric MEMS

Localized bonding schemes for the assembly and packaging of polymer-based microelectromechanical systems (MEMS) devices have been successfully demonstrated. These include three bonding systems of plastics-to-silicon, plastics-to-glass, and plastics-to-plastics combinations based on two bonding processes of localized resistive heating: 1) built-in resistive heaters and 2) reusable resistive heaters. In the prototype demonstrations, aluminum thin films are deposited and patterned as resistive heaters and plastic materials are locally melted and solidified for bonding. A typical contact pressure of 0.4 MPa is applied to assure intimate contact of the two bonding substrates and the localized bonding process is completed within less than 0.25 s of heating. It is estimated that the local temperature at the bonding interface can reach above 150/spl deg/C while the substrate temperature away from the heaters can be controlled to be under 40/spl deg/C during the bonding process. The approach of localized heating for bonding of plastic materials while maintaining low temperature globally enables direct sealing of polymer-based MEMS without dispensing additional adhesives or damaging preexisting, temperature-sensitive substances. Furthermore, water encapsulation by plastics-to-plastics bonding is successfully performed to demonstrate the capability of low temperature processing. As such, this technique can be applied broadly in plastic assembly, packaging, and liquid encapsulation for microsystems, including microfluidic devices.

Self-assembly for microscale and nanoscale packaging: steps toward self-packaging

The packaging of microelectromechanical systems (MEMS) and nanoscale devices constitutes an important area of research and development that is vital to the commercialization of such devices. Packaging needs of these devices include interfaces to nonelectronic domains; integration of structures, devices, and subsystems made with incompatible fabrication processes into a single platform; and the ability to handle a very large numbers of parts. Although serial, robotic assembly methods such as pick-and-place have allowed significant manufacturing feats, self-assembly is an attractive option to tackle packaging issues as the size of individual parts decreases below 300 /spl mu/m. In this paper, we review advances made in the usage of self-assembly for packaging and potential directions that growth in this area can assume. In the micrometer scale, we review the use of capillary forces, gravity, shape recognition, and electric fields to guide two- and three-dimensional self-assembly processes. In the nanoscale, we survey the usage of self-assembled molecular monolayers to solve current packaging issues, DNA hybridization for guiding self-assembly processes of nanoscale devices, and methods used to package nanowires or nanotubes into electronic circuits. We conclude with an example of a nanoscale biosensor which directly incorporates the concept of its package into its fabrication process. Even though the idea of a fully self-packaging system has not been demonstrated to date, the body of work reviewed and discussed here presents a solid foundation for the pursuit of this goal.

Transfer of metal MEMS packages using a wafer-level solder transfer technique

This paper presents a modular, low profile, wafer-level encapsulation technology for microelectromechanical systems (MEMS) packaging. Electroplated caps are formed on top of a solder transfer layer previously deposited on a carrier wafer, then simultaneously transferred and bonded to a device wafer by a novel solder transfer method and transient liquid phase (TLP) bonding technology. The solder transfer method is enabled by the dewetting of the solder transfer layer from the carrier wafer and TLP bonding of the cap to the device wafer during bonding. The bond and transfer cycle has a maximum temperature of 300/spl deg/C and lasts about 2.5 h. This approach has been demonstrated with nickel (Ni) caps as thin as 5 microns, with thicker caps certainly possible, ranging in size from 200 /spl mu/m to 1 mm. They were transferred with a lead-tin (Pb-Sn) solder layer and bonded with nickel-tin (Ni-Sn) TLP bonding with greater than 99% transfer yield across the wafer.

Novel Microsystem Applications with New Techniques in Low‐Temperature Co‐Fired Ceramics

Low‐temperature co‐fired ceramic (LTCC) enables development and testing of critical elements on microsystem boards as well as nonmicroelectronic meso‐scale applications. We describe silicon‐based microelectromechanical systems packaging and LTCC meso‐scale applications. Microfluidic interposers permit rapid testing of varied silicon designs. The application of LTCC to micro‐high‐performance liquid chromatography (μ‐HPLC) demonstrates performance advantages at very high pressures. At intermediate pressures, a ceramic thermal cell lyser has lysed bacteria spores without damaging the proteins. The stability and sensitivity of LTCC/chemiresistor smart channels are comparable to the performance of silicon‐based chemiresistors. A variant of the use of sacrificial volume materials has created channels, suspended thick films, cavities, and techniques for pressure and flow sensing. We report on inductors, diaphragms, cantilevers, antennae, switch structures, and thermal sensors suspended in air. The development of “functional‐as‐released” moving parts has resulted in wheels, impellers, tethered plates, and related new LTCC mechanical roles for actuation and sensing. High‐temperature metal‐to‐LTCC joining has been developed with metal thin films for the strong, hermetic interfaces necessary for pins, leads, and tubes.

Resonance-free Millimeter-wave Coplanar Waveguide Si Microelectromechanical System Package using a Lightly-doped Silicon Chip Carrier

A silicon (Si) microelectromechanical system (MEMS) package using a lightly-doped Si chip carrier for coplanar waveguide (CPW) microwave and millimeter-wave integrated circuits (MMICs) is proposed in order to reduce parasitic problems of leakage, coupling, and resonance. The proposed chip carrier scheme is verified by fabricating and measuring a GaAs CPW on two types of carriers (conductor-back metal and lightly-doped Si) in the frequency range 0.5 to 40 GHz. The proposed MEMS package using the lightly-doped (15 Ω·cm) Si chip carrier and the high resistivity silicon (HRS, 15 kΩ·cm) shows the low loss and resonance-free since the lightly-doped Si chip carrier effectively absorbs and suppresses the resonant leakage. The Si MEMS package for CPW MMICs has an insertion loss (S21) of 2.0 dB, a reflection loss (S11) of 10 dB, and a power loss (PL) of 7.5 dB at 40 GHz.

Characterization of Si and CVD SiC to Glass Anodic Bonding Using TEM and STEM Analysis

Anodic bonding is a common process used in microelectromechanical systems (MEMS) device fabrication and packaging. Polycrystalline chemical vapor deposited (CVD) silicon carbide (SiC) is emerging as a new MEMS device and packaging material because of its excellent material properties including high strength, hardness, and thermal conductivity. A novel process recipe, requiring a SiC RMS surface roughness of 45 nm, was developed for anodically bonding CVD SiC to bulk Pyrex and Hoya SD-2 glass substrates. Transmission electron microscopy (TEM) and scanning transmission electron microscopy (STEM) and elemental analysis presented distinct differences in elemental depletion band(s) of bulk Pyrex and Hoya SD-2 glasses bonded to Si, and in interfacial bonding between Pyrex and CVD SiC compared to Pyrex and Si. This study indicates that magnesium in the Pyrex glass network also participates in the depletion layer process compared to previous studies where only potassium, calcium, aluminum, and sodium were identified. For the first time, this study identifies aluminum, magnesium, sodium, and zinc participating in the depletion layer process in Hoya SD-2glass.

Optical Fiber Shifts and Shear Stains in V-Groove Arrays for Optical MEMS Packaging

The objective of this study is to investigate optical fiber shifts and shear stains in V-groove arrays for optical microelectromechanical system packaging, when the arrays are subjected to temperature cycling. Thermally induced optical fiber shifts in the joints consisting of an optical fiber, epoxy adhesive, and silicon substrate were simulated using a finite element analysis (FEA) package ANSYS. Experiments using real-time Moire´ interferometry were also performed at temperatures of 25, 40, 60, 85 and 100°C for confirmation of the analysis results. The study revealed that thermally induced fiber shifts increased with the number of V-groove channels. The shear strains at the fiber and silicon interface in the fiber joints increased as the V-groove channel was further away from the neutral point of the fiber array packages. The optical coupling loss is the greatest during thermal loading for the outer fiber in the four channel V-groove array. Optical loss of 0.334 and 0.346 dB was calculated using the fiber shift values obtained from the FEA and experimental results, respectively. The effect of fiber shifts, especially the shift of the fiber that is positioned at the outermost V-groove in the array, cannot be ignored.

Activity of the Research Group for Nano- and Microelectromechanical Systems Packaging

Activity of the Research Group for Nano- and Microelectromechanical Systems Packaging

Theoretical investigation on hermeticity testing of MEMS packages based on MIL-STD-883E

In the present study, a gas flow model is used to show that the helium bomb test and bubble test methods in MIL-STD-883E are not applicable for hermeticity testing of packages with small internal volumes (<10 −3 cm 3), typically encountered for microelectromechanical systems (MEMS). The reasons include inaccurate reading due to helium loss in dwell period, undefined regime in leak rate spectrum, and unpractical reject limit for small vacuum packages. The simulation results indicate the necessity to develop new test methods for hermeticity testing of MEMS packages, such as to integrate pressure sensors in the package.

Wafer Level Surface Activated Bonding Tool for MEMS Packaging

A wafer level surface activated bonding (SAB) tool has been developed for microelectromechanical systems (MEMS) packaging at low temperature. The tool accommodates 8 in. diam wafers. The principle features of the tool are the automatic parallel adjustment for 8 in. wafers to a margin of error within ±1 μm and the X, Y, and θ axis alignments with an accuracy of ±0.5 μm. We have approached a new integration technique for the integration of ionic crystals with transparent and nontransparent thin intermediate layers using this tool. Various sizes of patterned and bare silicon, Al silicate glass, and quartz wafers cleaned by a low energy argon ion source in a vacuum have been successfully bonded by this technique at low temperature. Radioisotope fine leak and vacuum seal tests of sealed silicon cavities show leak rates of and Pa/m3 s, respectively, which are lower than the American military standard encapsulation requirements for MEMS devices in harsh environments. Void-free interfaces with bonding strengths comparable to bulk materials are found. Low adhesion between SAB-processed ionic crystals without adhesive layers is believed to be due to radiation-induced discontinuous polarization. © 2004 The Electrochemical Society. All rights reserved.