MHz Signal Bandwidth Research Articles

Sagnac Loop Based Broadband Self-Interference Cancellation and Down-Conversion for Distributed Antenna Systems

Focusing on distributed antenna systems, we propose a photonics-assisted self-interference cancellation and down-conversion method based on a Sagnac loop structure. Two inversely cascaded modulators form a Sagnac loop through polarization multiplexing. To support in-band full duplex (IBFD) communication, a double parallel Mach–Zehnder modulator (DPMZM) operated in a clockwise direction is used as a self-interference canceller (SIC) to achieve the phase conversion in the optical domain. Another MZM modulator working in the counterclockwise direction is used to modulate the local oscillation (LO) signal for frequency down-conversion. The adjustment of bias voltage is analyzed to optimize the conversion efficiency of the system. The power fading effect generated by fiber dispersion is compensated by a polarization-sensitive phase modulator (PS-PM). The experimental results show that the average cancellation depth is 56.4 dB at a single frequency in the operating frequency range of 6–22 GHz, and 29.1 dB and 23.7 dB for 20 MHz and 100 MHz bandwidth signals, respectively. In addition, the error vector map is improved from 16.50% to 6.26% after dispersion compensation. The self-interference cancellation, down-conversion and dispersion compensation are integrated in a microwave photonics link. Two cascaded modulators are equivalent to a parallel structure by the Sagnac loop, simultaneously ensuring high LO isolation and conversion efficiency. The proposed method provides an alternative for IBFD-based distributed antenna communication applications.

28 GHz over-the-air measurement using an OTFS multi-user distributed MIMO under Doppler effect

AbstractThis paper describes the experimental investigation of orthogonal time-frequency space (OTFS) modulation using a 28 GHz multi-user distributed multiple-input multiple-output (D-MIMO) testbed in over-the-air (OTA) and mobility environments to enhance cell throughput in a millimeter-wave band. We build the D-MIMO testbed having newly developed OTFS modulator and demodulator, and measured OTFS signals and orthogonal frequency-division multiplexing (OFDM) signals with up to four user simultaneous connections on an actual office floor. Additionally, the Doppler effect on OTFS signals is mathematically analyzed and is confirmed in the measurements. OTFS indicates higher robustness in time-variant channels than OFDM. The error vector magnitude (EVM) and system throughput of OTFS are −22 dB and 1.9 Gbps with 100 MHz signal bandwidth, respectively. To our knowledge, this is a first paper describing the OTA measurements of EVM, throughput, and spectral efficiency using OTFS modulation on the 28 GHz coherent beamforming system.

A 40 MHz 11-Bit ENOB Delta Sigma ADC for Communication and Acquisition Systems.

This paper describes a Delta Sigma ADC IC that embeds a 5th-order Continuous-Time Delta Sigma modulator with 40 MHz signal bandwidth, a low ripple 20 to 80 MS/s variable-rate digital decimation filter, a bandgap voltage reference, and high-speed CML buffers on a single die. The ADC also integrates on-chip calibrations for RC time-constant variation and quantizer offset. The chip was fabricated in a 1P7M 65 nm CMOS process. Clocked at 640 MHz, the Continuous-Time Delta Sigma modulator achieves 11-bit ENOB and 76.5 dBc THD up to 40 MHz of signal bandwidth while consuming 82.3 mW.

Design of RFSoC-based Digital Phased Array Feed (PAF) and Hybrid Architecture Beamforming System

As the number of array elements and bandwidth increase, the design challenges of the Phased Array Feed (PAF) front-end and its signal processing system increase. Aiming at the ng-PAF of the 110 m radio telescope, this article introduces the concept of fully digital receivers and attempts to use Radio Frequency System-on-Chip (RFSoC) technology to digitize close to the feed array, reduce the complexity and analog components of the front-end, and improve the fidelity of the signals. The article discusses the digital beamforming topology and designs a PAF signal processing experimental system based on RFSoC+GPU hybrid architecture. The system adopts a ZCU111 board to design RF-direct digitization and preprocessing front-end, which can sample eight signals up to 2.048 GSPS, 12 bit, channelize the signals into 1024 chunks, then reorder into four data streams and select one of the 256 MHz frequency bands to output through four 10 Gb links. A GPU server is equipped with four RTX 3090 GPUs running four HRBF_HASHPIPE instances, each receiving a 64 MHz bandwidth signal for high-throughput real-time beamforming. The experimental system uses a signal generator to emulate Sa-like signals and propagates through rod antennas, which verifies the effectiveness of the beamforming algorithm. Performance tests show that after algorithm optimization, the average processing time for a given 4 ms data is less than 3 ms in the four-GPU parallel processing mode. The RFSoC integrated design shows significant advantages in power consumption and electromagnetic radiation compared with discrete circuits according to the measurement results.

Experimental Demonstration and Performance Enhancement of 5G NR Multiband Radio over Fiber System Using Optimized Digital Predistortion

This paper presents an experimental realization of multiband 5G new radio (NR) optical front haul (OFH) based radio over fiber (RoF) system using digital predistortion (DPD). A novel magnitude-selective affine (MSA) based DPD method is proposed for the complexity reduction and performance enhancement of RoF link followed by its comparison with the canonical piece wise linearization (CPWL), decomposed vector rotation method (DVR) and generalized memory polynomial (GMP) methods. Similarly, a detailed study is shown followed by the implementation proposal of novel neural network (NN) for DPD followed by its comparison with MSA, CPWL, DVR and GMP methods. In the experimental testbed, 5G NR standard at 20 GHz with 50 MHz bandwidth and flexible-waveform signal at 3 GHz with 20 MHz bandwidth is used to cover enhanced mobile broad band and small cells scenarios. A dual drive Mach Zehnder Modulator having two distinct radio frequency signals modulates a 1310 nm optical carrier using distributed feedback laser for 22 km of standard single mode fiber. The experimental results are presented in terms of adjacent channel power ratio (ACPR), error vector magnitude (EVM), number of estimated coefficients and multiplications. The study aims to identify those novel methods such as MSA DPD are a good candidate to deploy in real time scenarios for DPD in comparison to NN based DPD which have a slightly better performance as compared to the proposed MSA method but has a higher complexity levels. Both, proposed methods, MSA and NN are meeting the 3GPP Release 17 requirements.

A Bit-Interleaved Sigma-Delta-Over-Fiber Fronthaul Network for Frequency-Synchronous Distributed Antenna Systems

Cell-free massive multiple-input multiple-output (MIMO) has attracted wide attention as wireless spectral efficiency has become a 6G key performance indicator. The distributed scheme improves the spectral efficiency and user fairness, but the fronthaul network must evolve to enable it. This work demonstrates a fronthaul network for distributed antenna systems enabled by the bit-interleaved sigma-delta-over-fiber (BISDoF) concept: multiple sigma-delta modulated baseband signals are time-interleaved into one non-return-to-zero (NRZ) signal, which is converted to the optical domain by a commercial QSFP and transmitted over fiber. The BISDoF concept improves the optical bit-rate efficiency while keeping the remote unit complexity sufficiently low. The implementation successfully deals with an essential challenge—precise frequency synchronization of different remote units. Moreover, owing to the straightforward data paths, all transceivers inherently transmit or receive with fixed timing offsets which can be easily calibrated. The error vector magnitudes of both the downlink and uplink data paths are less than 2.8% (–31 dB) when transmitting 40.96 MHz-bandwidth OFDM signals (256-QAM) centered around 3.6 GHz. (Optical path: 100 m multi-mode fibers; wireless path: electrical back-to-back.) Without providing an extra reference clock, the two remote units were observed to have the same carrier frequency; the standard deviation of the relative jitter was 9.43 ps.

A multi-stage sigma-delta modulator based on noise-coupling and digital feed-forward techniques

This paper presents a new structure for high-resolution, low-power and wideband discrete time multi-stage (DT-MASH) sigma-delta (ΣΔ) modulators. It uses multi-bit digital input feed forward path (DFF) and noise coupling (NC) techniques. With the DFF technique, the modulator does not need a power-consuming analog adder at the quantizer input, and the number of comparators of the quantizer will be reduced significantly. Also, because of the reduced swing of the modulator’s integrators, low power integrators can be used. Using a second-order NC technique with no extra active block, the order of the modulator, which uses some paths between analog stages, is increased, and its performance is improved with zero-optimization of the modulator’s noise transfer function (NTF). Behavioral simulations and extensive mathematical analyses confirm the effectiveness of the proposed structure. The effect of the non-idealities in the DFF and NC paths were considered in the behavioral simulations. To examine its performance, a MASH 2–1 modulator was designed in the circuit level with a 180-nm CMOS technology and 1.8 V power supply. The integrators use a new op-amp switching technique to reduce total power consumption. With an over-sampling ratio (OSR) of 8 for the 10 MHz signal bandwidth, the proposed structure improves the signal-to-noise and distortion ratio (SNDR) by 28 dB compared with a conventional MASH 2–1 structure at approximately the same power consumption and very low complexity.

HiLoc: Sub-Meter Level Indoor Localization Using a Single Access Point With Distributed Antennas in Wireless Sensor Networks

Indoor localization as one of the visions of the Internet of Things (IoTs) receives much attention in Wireless Sensor Networks (WSNs). Many prior indoor localization technologies concentrated on multiple Access Points (APs), so developing a system that uses a single AP with high accuracy is indispensable, especially for households or small businesses. To this end, we present HiLoc, a single AP-based indoor localization system with sub-meter accuracy. The key insight of HiLoc is to estimate the relative Time of Flight (ToF) between the target and the distributed antennas and localize the target using the convex optimization accurately. Specifically, HiLoc utilizes the combination of Orthogonal Matching Pursuit (OMP) and Maximum Likelihood (ML) to estimate relative ToF. Then, by applying the semi-definite relaxation technique, the localization process can be transformed into an SDP problem. Unlike the methods that use the iterative least-square, in which an accurate guess of the target location is required, we can find the target location accurately without any initializations. Furthermore, we design the prototype AP using Software-Defined Radio (SDR) platform with Orthogonal Frequency Division Multiplexing (OFDM) signals. Our implementation in extensive indoor environments shows that HiLoc achieves a median localization error of 0.72m at 100MHz signal bandwidth, comparable to the state-of-the-art prior systems.

Efficient Offline Outer/Inner DAC Mismatch Calibration in Wideband ΔΣ ADCs

Distortion due to feedback DAC mismatch is a key limitation in $\Delta \Sigma $ ADCs for wideband wireless communications. This article presents an efficient frequency-domain mask-based offline mismatch calibration method of both the outer DAC and the inner DACs in a $\Delta \Sigma $ ADC. The test stimulus for the calibration is a two-tone signal near the band edge. To avoid the need for high-performance signal generation, a frequency mask is applied to void the stimulus signal and its phase noise. In this way, the method is robust against distortion and jitter in the stimulus signal, which therefore could be combined from two low-quality signal generators. The two-tone band-edge signal has the additional benefit that the number of needed samples of the excitation signal is very modest because as many intermodulations as possible contribute to the calculation of the mismatch errors of the DACs. Experimental results confirming the calibration method are obtained from a prototype chip, designed for an 85MHz signal bandwidth in 28nm CMOS technology. A two-tone stimulus around 78 MHz is applied to calculate the mismatch of the outer DAC and the inner DAC with only 68K samples. With the DACs calibrated, an SFDR improvement of 28.1 dB is achieved for a single-tone input at 5 MHz, while for a two-tone input around 71 MHz, the IM3 is improved from −63.6 dBc to below the noise floor (<−94.1 dBc). This illustrates the effectiveness of the approach.

Power Scalable Beam-Oriented Digital Predistortion for Compact Hybrid Massive MIMO Transmitters

This article proposes a power scalable beam-oriented digital predistortion (PSBO-DPD) architecture suitable for linearizing PAs in compact hybrid massive multiple-input multiple-output (MIMO) transmitters, without the need to implement a dedicated observation path for each PA. Based on an assumption that all PAs are similar, the feedback configuration for only one PA is sufficient to acquire the nonlinear information of PAs in a given subarray, which are driven at different power levels due to amplitude beamforming. Therefore, the PSBO-DPD resolves the deficiency of current DPD techniques in hybrid beamforming array by estimating the output signal of each PA from the only captured output signal from one PA to construct the main beam signal of the subarray. The predistorter is identified based on the estimated main beam signal and the input signal driving the subarray. To estimate the outputs of each PA efficiently, a power scalable cascade PA model is proposed to reduce the computational complexity and associated overhead in terms of cost and energy consumption. Measurements on a 4-element antenna array with up to 100 MHz bandwidth signal are carried out to validate and bench mark the proposed PSBO-DPD against the existing DPD technique in hybrid massive MIMO transmitters.

Improved Continuous-Time Delta-Sigma Modulators With Embedded Active Filtering

Continuous-time ΔΣ modulators used in wireless transceivers need to digitize small desired signals that are accompanied by large out-of-band interferers. In such applications, it is desirable that the CTΔΣM have a low-pass signal transfer function whose bandwidth can be specified. Many architectures present themselves as potential candidates to realize such filtering-CTΔΣMs. This work investigates these threads and concludes that a CTΔΣM with an embedded Rauch filter is a compelling design choice. The theory is supported by measurement results from a filtering-CTΔΣM test chip that achieves a peak SNDR of 76.7dB in a 1MHz signal bandwidth. Measurements demonstrate improved power efficiency and out-of-band linearity when compared to prior art.

An Inverter-Based Continuous Time Sigma Delta ADC With Latency-Free DAC Calibration

This paper presents a wide bandwidth inverter-based continuous time sigma delta (CTSD) analog-to-digital converter (ADC) with a latency-free calibration to suppress the nonlinearity originating from the feedback digital-to-analog converter (DAC). The modulator in the ADC uses a fourth-order architecture with 4-bit quantization. To compensate the excess loop delay (ELD), the proportional-integrating element (PI-element) is employed in the loop filter where the problem of no real solution in conventional PI-element compensation method is solved. In addition, the two-stage inverter-based amplifiers are used in the loop filter to improve power efficiency. To suppress nonlinearity of the 4-bit DAC, a background calibration method based on modified quantizer is proposed which would not introduce additional latency thus ensuring stability of the modulator. The CTSD ADC achieves 64.6 dB SNDR and 71.2 dB SFDR over a 75 MHz signal bandwidth before calibration, and the SNDR and the SFDR can be improved to 67.3 dB and 82.3 dB respectively after calibration. The ADC consumes 38 mW from supply voltages of 1.1/1.8 V with an active area of 0.675 mm2 in 40 nm CMOS.

A Reconfigurable 0.1–10 MHz DT Passive Dynamic Zoom ADC for Cellular Receivers

This paper presents a multi-mode, dynamically zooming analog to digital converter (ADC). The architecture is based on a 5b interpolating flash ADC as the zooming unit and a passive discrete-time ΔΣ modulator as the fine conversion unit. The proposed ADC provides a dynamic zooming technique, employing an interpolating zooming front-end. The modulator covers between 0.1 MHz and 10 MHz signal bandwidth which makes it suitable for cellular applications including 4G radio systems. By reconfiguring the OSR, bias current, and component parameters, optimal power consumption can be achieved for every mode. The ADC is implemented in 0.13 μm CMOS technology and it achieves an SNDR of 83/75.7/73.2/67 dB for 0.1/1.92/5/10MHz bandwidth with 1.3/4.7/8.1/10.3mW power consumption from a 1.2 V supply.

Distortion mitigation for 100 and 250 MHz discrete supply modulation of a three-stage K-band MMIC PA

AbstractThis paper presents a high-efficiency linear GaN K-band transmitter for broadband high peak-average power ratio (PAPR) signals. A GaN MMIC 18.5–24 GHz three-stage power amplifier with over 4 W peak output power, 20 dB saturated gain, and 40% peak PAE is supply-modulated with a four-level discrete dynamic supply GaN MMIC. For 100 MHz signals with ${\rm PAPR}\gt 10\, {\rm dB}$, we demonstrate an average efficiency improvement from 14 to 20% with a simultaneous linearity improvement in noise power ratio (NPR) from 23 to 26 dB through a shaping function focused on gain linearization. For 250 MHz signal bandwidth, there is no observed degradation in NPR and the efficiency is improved by 5 percentage points. For discrete supply modulation, the switching transients between levels are experimentally investigated for wideband signals.

Echo-planar imaging of the human head with 100 mT/m gradients and high-order modeling of eddy current fields.

To demonstrate the utility of a high-performance gradient insert for ultrafast MRI of the human head. EPI was used for the first time with a readout gradient amplitude of 100 mT/m, 1200 T/m/s slew rate, and nearly 1 MHz signal bandwidth for human head scanning. To avoid artefacts due to eddy currents, the magnetic field was dynamically monitored with NMR probes at multiple points, modeled by solid harmonics up to fifth order, and included in the image reconstruction. An approximation of a negligible intra-echo effect of the eddy currents was made to accelerate the high-order reconstruction. The field monitoring-based approach was compared with a recently proposed phase error estimation from separate reconstructions of even and odd echoes. Images obtained with the gradient insert have significantly lower distortions than it is the case with the whole body 30 mT/m, 200 T/m/s gradients of the same system. However, eddy currents of high spatial order must be properly characterized and corrected for in order to avoid a persistent 2D Nyquist ghost. Multi-position monitoring proves to be a robust method to measure the eddy currents and allows higher undersampling rates than the image-based approach. The proposed approximation of the eddy currents effect allows a significant acceleration of the high-order reconstruction by a separate processing of each spatial dimension. Strong gradients with adequate switching rates are highly beneficial for the quality of EPI provided that robust measures are taken to include the contribution of eddy currents to the image encoding.

A Fully Integrated K-Band Dual Down-Conversion Receiver for Radar Applications in 90 nm CMOS

A fully integrated K-band dual down-conversion receiver for phased array radar applications in 90 nm CMOS is presented. The receiver utilizes the dual down-conversion architecture to achieve superior performance. The integrated 1.15 GHz image-rejection filter (IRF) provides enough wideband (22 MHz) image rejection ratio at 140 MHz offset before the second down-conversion by utilizing the Q-enhancing and frequency staggering techniques to compensate the component loss. The low noise amplifier realizes the single-to-differential-ended conversion at the input with a transformer and achieves good common-mode rejection. The 70 MHz intermediate frequency baseband consists of two cascaded 3rd-order band-pass active RC filters (BPFs) and one automatic gain control (AGC) loop, with the integrator frequency compensation technique to lower down the requirements on the embedded Op-Amps. Two phase-locked loop (PLL) frequency synthesizers are integrated to provide the local oscillation (LO) signals for the down-conversions, where the matching of the charge-pump is improved by adding one extra current compensation branch. The measurements of the prototype show that the receiver converts the targeted mm-wave signal to 70 MHz intermediate frequency while achieving 8.3 dB noise figure (NF), 51-95 dB variable gain range and >45 dB image rejection ratio at 140 MHz offset with >22 MHz signal bandwidth. The receiver draws 74 mA current (excluding 2 PLLs) from the 1.2 V power supplies and occupies a core area of 4.58 × 0.53mm 2 (excluding 2 PLLs).

Distributed Multi-User MIMO Transmission Using Real-Time Sigma-Delta-Over-Fiber for Next Generation Fronthaul Interface

To achieve the massive device connectivity and high data rate demanded by 5G, wireless transmission with wider signal bandwidths and higher-order multiple-input multiple-output (MIMO) is inevitable. This work demonstrates a possible function split option for the next generation fronthaul interface (NGFI). The proof-of-concept downlink architecture consists of real-time sigma-delta modulated signal over fiber (SDoF) links in combination with distributed multi-user (MU) MIMO transmission. The setup is fully implemented using off-the-shelf and in-house developed components. A single SDoF link achieves an error vector magnitude (EVM) of 3.14% for a 163.84 MHz-bandwidth 256-QAM OFDM signal (958.64 Mbps) with a carrier frequency around 3.5 GHz transmitted over 100 m OM4 multi-mode fiber at 850 nm using a commercial QSFP module. The centralized architecture of the proposed setup introduces no frequency asynchronism among remote radio units. For most cases, the 2 × 2 MU-MIMO transmission has little performance degradation compared to SISO, 0.8 dB EVM degradation for 40.96 MHz-bandwidth signals and 1.4 dB for 163.84 MHz-bandwidth on average, implying that the wireless spectral efficiency almost doubles by exploiting spatial multiplexing. A 1.4 Gbps data rate (720 Mbps per user, 163.84 MHz-bandwidth, 64-QAM) is reached with an average EVM of 6.66%. The performance shows that this approach is feasible for the high-capacity hot-spot scenario.

A Second-Order Bandpass &lt;inline-formula&gt; &lt;tex-math notation="LaTeX"&gt;$\Delta\Sigma$ &lt;/tex-math&gt; &lt;/inline-formula&gt; Time-to-Digital Converter With Negative Time-Mode Feedback

This paper presents an all-digital bandpass $\Delta\Sigma $ time-to-digital converter (BP) $\Delta \Sigma $ TDC) for IF data conversion. The proposed TDC is based on a second-order resonator implemented by a cascade of two time-mode lossless discrete integrators (LDI), and a digital-to-time converter (DTC) in a feedback loop. The DTC is based on a new topology of double-edge voltage-controlled delay unit. The proposed TDC achieves bandpass quantization noise shaping and it does not require any complex calibration circuit to compensate for timing errors. To realize the time-mode LDI-based resonator, time-latches with some digital gates are employed. Moreover, a direct feed-forward compensation is utilized in the TDC to attain high signal-to-noise and distortion ratio (SNDR) by reducing the internal time-mode swing, thus relaxing the speed and area requirements on digital circuits leading to low-voltage operation. The prototype BP $\Delta \Sigma $ TDC achieves a 39.5-dB peak SNDR over a 0.2 MHz signal bandwidth at 42.8 MS/s while consuming less than 5 mW in a 1.2 V IBM 130-nm CMOS process. The proposed TDC is highly digital and occupies a core area of only 0.048 mm2.

A Hilbert Transform Equalizer Enabling 80 MHz RF Self-Interference Cancellation for Full-Duplex Receivers

A passive, time-domain equalizer is presented that achieves a broadband self-interference cancellation (SIC) over 80 MHz of RF bandwidth for simultaneous full-duplex radios. A baseband Hilbert transform technique reduces the number of equalizer taps needed for SIC, and with frequency translations, results in an equivalent RF-domain equalization. A proof-of-concept prototype in 0.13- $\mu \text{m}$ CMOS process attains a measured 23 dB of SIC over an 80 MHz signal bandwidth at 900 MHz, and consumes 13 mW of clocking power independent of SIC equalizer settings. Its impact on the receiver noise figure is 1.4 dB. The equalizer and the receiver together consume 64.4 mW from a 1.2 V supply in an active area of 0.72 mm2.

1.15 GHz image rejection filter with 45 dB image rejection ratio and 8.4 mW DC power in 90 nm CMOS

A 1.15 GHz image rejection filter in 90 nm CMOS is presented. It consists of two band-pass filter stages and one band-stop filter stage, with the Q-enhancing and frequency stagger-tuning techniques to compensate the loss of low quality factor on-chip passive components and maintain enough bandwidth, respectively. The presented filter has been integrated in one K-band dual down-conversion super-heterodyne receiver and achieves 45 dB image rejection ratio at 140 MHz offset with >22 MHz signal bandwidth. The DC power consumption is 8.4 mW.