Metal Silicide Contact Research Articles

Athermal Solid Phase Reaction in Pt/SiO x Thin Films Induced by Electron Irradiation.

Microelectronics based on Si requires metal silicide contacts. The ability to form platinum silicide (Pt2Si) by electronic excitation instead of thermal processes would benefit the field. We studied the effects of electron irradiation on Pt2Si formation in composite films—composed of Pt and amorphous silicon oxides (a-SiOx)—by transmission electron microscopy and electron diffraction. Pt2Si formed in Pt/a-SiOx bilayer and a-SiOx/Pt/a-SiOx sandwiched films by 75 keV electron irradiation, at 298 and 90 K. The reaction is attributable to dissociation of SiOx triggered by electronic excitation. In a-SiOx/Pt/a-SiOx sandwiched films, reflections of pure Pt were not present after irradiation, i.e., Pt was completely consumed in the reaction to form Pt2Si at 298 K. However, in Pt/a-SiOx bilayer films, unreacted Pt remained under the same irradiation conditions. Thus, it can be said that the extent of the interfacial area is the predominant factor in Pt2Si formation. The morphology of Pt islands extensively changed during Pt2Si formation even at 90 K. Coalescence and growth of metallic particles (Pt and Pt–Si) are not due to thermal effects during electron irradiation but to athermal processes accompanied by silicide formation. To maintain the reaction interface between metallic particles and the dissociation product (i.e., Si atoms) by electronic excitation, a considerable concomitant morphology change occurs. Elemental analysis indicates that the decrease in Si concentration near Pt is faster than the decrease in O concentration, suggesting formation of a Si depletion zone in the amorphous silicon oxide matrix associated with formation of Pt2Si.

Reduction in number of crystal defects in a p+Si diffusion layer by germanium and boron cryogenic implantation combined with sub-melt laser spike annealing

To reduce the number of crystal defects in a p+Si diffusion layer by a low-thermal-budget annealing process, we have examined crystal recovery in the amorphous layer formed by the cryogenic implantation of germanium and boron combined with sub-melt laser spike annealing (LSA). The cryogenic implantation at −150 °C is very effective in suppressing vacancy clustering, which is advantageous for rapid crystal recovery during annealing. The crystallinity after LSA is shown to be very high and comparable to that after rapid thermal annealing (RTA) owing to the cryogenic implantation, although LSA is a low-thermal-budget annealing process that can suppress boron diffusion effectively. It is also shown that in the p+Si diffusion layer, there is high contact resistance due to the incomplete formation of a metal silicide contact, which originates from insufficient outdiffusion of surface contaminants such as fluorine. To widely utilize the marked reduction in the number of crystal defects, sufficient removal of surface contaminants will be required in the low-thermal-budget process.

An investigation of the electrical properties of the interface between pyrolytic carbon and silicon for Schottky diode applications

An investigation of the electrical properties of the interface between nano-crystalline, pyrolytic carbon, and silicon is presented. We have deposited conductive carbon films on silicon substrates by the pyrolysis of ethene and structured them into Schottky diodes in order to evaluate the electrical properties of the interface. The results show that the Schottky barrier to n-doped silicon is 0.46 eV, whereas for p-doped silicon, it is 0.66 eV. The carbon to n-type silicon barrier height is comparable to the values for metal silicide contacts in commercial devices. The results imply that no interfacial layer is formed and show the absence of Fermi-level pinning.

Selective Emitter 구조를 적용한 Ni/Cu Plating 전극 결정질 실리콘 태양전지

Green Strategic Energy Research Institute, Sejong University, Seoul 143-747, Korea(Received May 17, 2010; Revised June 15, 2010; Accepted June 21, 2010)Abstract: The technologies of Ni/Cu plating contact is attributed to the reduced series resistance caused by a better contact conductivity of Ni with Si and the subsequent electroplating of Cu on Ni. The ability to pattern narrower grid lines for reduced light shading was combined with the lower resistance of a metal silicide contact and an improved conductivity of the plated deposit. This improves the FF (fill factor) as the series resistance is reduced. This is very much requried in the case of low concentrator solar cells in which the series resistance is one of the important and dominant parameter that affect the cell performance. A Selective emitter structure with highly dopeds regions underneath the metal contacts, is widely known to be one of the most promising high-efficiency solution in solar cell processing In this paper the formation of a selective emitter, and the nickel silicide seed layer at the front side metallization of silicon cells is considered. After generating the nickel seed layer the contacts were thickened by Cu LIP (light induced plating) and by the formation of a plated Ni/Cu two step metallization on front contacts.In fabricating a Ni/Cu plating metallization cell with a selective emitter structure it has been shown that the cell efficiency can be increased by at least 0.2%.Keywords: Nickel, Copper, Plating, Ni silicide, Selective emitter, Solar cell

Advanced Source/Drain Engineering for MOSFETs: Schottky Barrier Height Tuning for Contact Resistance Reduction

Contact resistance is becoming an important limiting factor for achieving high MOSFET drive current and speed in future technology nodes. In this paper, we review the technology solutions for reducing the contact resistance between a metal silicide contact and the source/drain region. Several new approaches for decreasing the electron and hole barrier heights between the source/drain region and the silicide layer in n-FET and p-FET, respectively, will be examined. Integration of these approaches in advanced device architectures will be discussed.

Atom-Probe Tomography of Semiconductor Materials and Device Structures

AbstractThe development of laser-assisted atom-probe tomography (APT) analysis and new sample preparation approaches have led to significant advances in the characterization of semiconductor materials and device structures by APT. The high chemical sensitivity and three-dimensional spatial resolution of APT makes it uniquely capable of addressing challenges resulting from the continued shrinking of semiconductor device dimensions, the integration of new materials and interfaces, and the optimization of evolving fabrication processes. Particularly pressing concerns include the variability in device performance due to discrete impurity atom distributions, the phase and interface stability in contacts and gate dielectrics, and the validation of simulations of impurity diffusion. This overview of APT of semiconductors features research on metal-silicide contact formation and phase control, silicon field-effect transistors, and silicon and germanium nanowires. Work on silicide contacts to silicon is reviewed to demonstrate impurity characterization in small volumes and indicate how APT can facilitate defect mitigation and process optimization. Impurity contour analysis of a pFET semiconductor demonstrates the site-specificity that is achievable with current APTs and highlights complex device challenges that can be uniquely addressed. Finally, research on semiconducting nanowires and nanowire heterostructures demonstrates the potential for analysis of materials derived from bottom-up synthesis methods.

Surface morphology and the phase formation at Cr/Si system

Metal silicide technology has been attracting attention worldwide and it constitutes an active, frontier area of research. Research in this area has not only stimulated the exploration of new phenomena, but is also leading to a technological revolution. Electron beam evaporation in ultra high vacuum (UHV) environment is one of the best techniques to grow thin metal film on Si substrate. Metal silicide contact is an interesting and important part of integrated circuit. Due to selective growth and high thermal stability metal silicides are used in very large scale integrated (VLSI) and ultra large scale integrated (ULSI) applications. In this paper our interest is to show GIXRD, XRR and SPM measurement on C (2nm)/Cr (25nm)/Si (100) system in which thin films were deposited using electron beam evaporation technique at 2×10−8Torr vacuum. The capping layer of 2nm carbon is deposited to stop contamination. The C (2nm)/Cr (25nm)/Si (100) system were annealed in 10−5Torr vacuum at temperatures 300–600°C to study the formation of chromium silicide. Structural properties at the interface has been studied by grazing incidence X-ray diffraction (GIXRD), which shows formation of Cr3Si and CrSi2 as a result of interface mixing due to annealing. The morphology of the system was investigated by AFM in tapping mode. It was found that nano-rod type structures were formed with annealing at 600°C temperature.

Metal - Gan Contact Technology

ABSTRACTIn this talk, we summarize the experimental results obtained on metal-GaN interactions in our laboratory. These interactions include the epitaxial growth of metal thin films on chemically cleaned GaN surfaces, metal silicides for Schottky contacts and metallization schemes for ohmic contacts. We found that many fcc and hcp metals can grow epitaxially on (0001) GaN surfaces at room temperature without in-situ surface cleaning. Metal silicide contacts (such as PtSi) may be more suitable for high temperature applications than elemental contacts, due to the thermal stability of silicides. The intrinsic mechanisms for ohmic behavior for various metal contacts are not well understood at present. More consistent barrier height values measured experimentally can shed light on this issue. Due to the defective nature of the GaN layers, carrier transport across the metal/GaN interface can be due to a number of transport mechanisms, thus making accurate determination of the barrier height difficult. In spite of these difficulties, it seems possible to draw certain general conclusions on the electrical behavior of metal contacts on n-GaN.

High temperature characteristics of amorphous TiWSix nonalloyed ohmic contacts to GaAs

This article reports on amorphous (α) nonalloyed TiWSix ohmic contacts on n-GaAs using an intervening graded-band-gap layer of InxGa1−xAs grown by the low pressure organometallic chemical vapor deposition method. The metal silicide contacts consisted of extremely thin alternating layers of TiW and Si sequentially deposited by rf magnetron sputtering to a total thickness of 500 Å. The as-deposited contacts exhibited ohmic behavior without requiring post-deposition heat treatment, and yielded specific contact resistivity values as low as 9×10−7 Ω cm2. These contacts were shown to be stable and retained excellent surface morphology after 600 °C thermal annealing. Rutherford backscattering and Auger electron spectroscopy investigations revealed no apparent interdiffusion at the metal/semiconductor interface under the above annealing conditions.

Interfacial Reactions of Nickel and Cobalt thin Films on Silicon

The interactions of metal thin films with silicon has been of great interest for its practical applications as means of forming metal silicide contacts in microelectronic industry. Nickel and cobalt thin films on silicon share many important similarities. Firstly, both Ni and Co are transition metals. Secondly, both Ni and Co atoms are found to be dominant moving species during thin film reactions. Thirdly, the formation of silicides follows the sequence of Ni2 (Co2 )Si, Ni(Co)Si and Ni(Co)Si2 with increasing annealing temperatures. Fourthly, both Nisi2 and CoSi2 have a CaF2 structure with small lattice mismatch (< 1.1 %) with silicon and are known to grow epitaxially on low index planes of Si. In this study, we report the results of our study on the factors influencing the formation and growth of nickel and cobalt silicides on silicon.