Metal Semiconductor Field Effect Transistor Structure Research Articles

β -Ga2O3 MESFETs with insulating Mg-doped buffer grown by plasma-assisted molecular beam epitaxy

In this work, we develop in situ Mg doping techniques in plasma-assisted molecular beam epitaxy (PAMBE) of β-Ga2O3 to compensate Si dopants at the substrate epilayer growth interface and eliminate parasitic leakage paths. Both abrupt and uniform Mg doping profiles over a wide range of concentrations were achieved in β-Ga2O3 epilayers grown by PAMBE. Capacitance–voltage characteristics of Si and Mg co-doped samples confirmed the compensating effect of the Mg dopants. Mg delta-doping was then integrated into a β-Ga2O3 metal-semiconductor field effect transistor structure and shown to be effective in eliminating source leakage. The results presented here show that Mg doping is a promising way to engineer insulating buffer layers for β-Ga2O3 lateral devices grown by PAMBE.

Enhancement-mode normally-off β-Ga2O3:Si metal-semiconductor field-effect deep-ultraviolet phototransistor

In this work, a solar-blind ultraviolet (UV) photodetector based on a three-terminal enhancement-mode (E-mode) Si-doped β-Ga2O3 (β-Ga2O3:Si) metal-semiconductor field-effect transistor structure is demonstrated, whose threshold voltage (V th) and subthreshold swing are 4.04 V and 1.4 V dec−1, respectively. A 400 nm thick β-Ga2O3:Si thin film is prepared on sapphire substrate by using metal-organic chemical vapor deposition method. Controlling the channel currents by the Schottky gate voltage in the dark and under illuminations, the photodetector shows dark current (I dark) as low as 13.4 pA, photo-to-dark current ratio of 4.85 × 104 and linear dynamic range of 29.6 dB, illuminated by 254 nm UV light of 245 μW cm−2. As the UV light is turned on and off, the output current rise and decay time (τ r and τ d) are 420 ms and 350 ms. Moreover, at drain voltage (V ds) of 5 V and gate voltage (V gs) of 0 V, the responsivity (R), specific detectivity (D*) and external quantum efficiency are achieved as 74 A W−1, 2.15 1014 cm Hz1/2 W−1 (Jones) and 3.6 104%, respectively.

Improvement of a Novel SOI- MESFET with an Embedded GaN Layer for High-Frequency Operations

In this paper, we propose a novel Silicon on Insulator (SOI) Metal Semiconductor Field Effect Transistor (MESFET) with an embedded GaN layer (GL-SOI-MESFET) for modifying the electric field distribution. The main idea of this work is based on using a high breakdown field material (GaN), for amending the electric field and potential distribution near the drain region, and as a result, the breakdown voltage of the proposed structure will be higher than a conventional structure (C-SOI-MESFET). The breakdown voltage (VBR) of the GL-SOI-MESFET at the Ids = 55 mA/mm and Vgs = − 1 V has been achieved ~21 V whereas the VBR in the C-SOI-MESFET is 16 V. The proposed structure shows the improvement of DC and RF characteristics versus the C-SOI-MESFET. For obtaining the best results to improve the structure performance, dimensions of the GaN layer have been optimized. Also, by amending potential distribution and changing the depletion region between the gate and drain sides, the gate-drain capacitance reduces. The effects like the electric field, the potential distribution, breakdown voltage, the kink effect, the self-heating effect, power gains, and parasitic capacitances are investigated and the proposed structure results have superior DC and radio frequency (RF) performances compared with the conventional MESFET structure.

A novel symmetrical 4H–SiC MESFET: an effective way to improve the breakdown voltage

In this paper, a novel symmetrical structure (SS) of 4H---SiC metal semiconductor field effect transistor (MESFET) as an effective way to improve the breakdown voltage is presented. The key idea in this work is to improve the breakdown voltage, maximum output power density, and frequency parameters of the device using a symmetrical structure with recessed gate. The SS-MESFET modifies the electric field in the drift layer significantly. The influence of the SS-MESFET on the saturation current, breakdown voltage $$(\hbox {V}_{\mathrm{BR}})$$(VBR), and small-signal characteristics of the SS-MESFET are studied by numerical device simulation. Using two-dimensional device simulation, we demonstrate that the breakdown voltage $$(\hbox {V}_{\mathrm{BR}})$$(VBR) improved by factors 2.5 and 3.3 in comparison with an asymmetrical conventional MESFET structure (AC-MESFET) and a symmetrical conventional MESFET structure (SC-MESFET), respectively. Also, the maximum output power density $$(\hbox {P}_{\mathrm{max}})$$(Pmax) improved about by 93 and 250 % in comparison with the AC-MESFET and SC-MESFET structures, respectively. So, the SS-MESFET shows the superior maximum available gain (MAG), unilateral power gain (U), and current gain $$(\hbox {h}_{12})$$(h12) which is presenting the proposed structure is more suitable device for high power microwave applications.

An improved analytical model of 4H-SiC MESFET incorporating bulk and interface trapping effects

An improved analytical model for the current—voltage (I–V) characteristics of the 4H-SiC metal semiconductor field effect transistor (MESFET) on a high purity semi-insulating (HPSI) substrate with trapping and thermal effects is presented. The 4H-SiC MESFET structure includes a stack of HPSI substrates and a uniformly doped channel layer. The trapping effects include both the effect of multiple deep-level traps in the substrate and surface traps between the gate to source/drain. The self-heating effects are also incorporated to obtain the accurate and realistic nature of the analytical model. The importance of the proposed model is emphasised through the inclusion of the recent and exact nature of the traps in the 4H-SiC HPSI substrate responsible for substrate compensation. The analytical model is used to exhibit DC I–V characteristics of the device with and without trapping and thermal effects. From the results, the current degradation is observed due to the surface and substrate trapping effects and the negative conductance introduced by the self-heating effect at a high drain voltage. The calculated results are compared with reported experimental and two-dimensional simulations (Silvaco®-TCAD). The proposed model also illustrates the effectiveness of the gate—source distance scaling effect compared to the gate—drain scaling effect in optimizing 4H-SiC MESFET performance. Results demonstrate that the proposed I–V model of 4H-SiC MESFET is suitable for realizing SiC based monolithic circuits (MMICs) on HPSI substrates.

Simulation analysis of a novel dual-trench structure for a high power silicon-on-insulator metal–semiconductor field effect transistor

In this paper, a silicon-on-insulator (SOI) metal–semiconductor field-effect transistor (MESFET) by a novel dual-trench technique is presented. In the proposed technique, the dual-trench is created in the buried oxide and filled with p-type and n-type doped Si. The p-type trench beneath the source increases breakdown voltage (VBR). Also, the n-type trench beneath the gate improves the drain current (ID). We call this new structure as Dual-Trench SOI MESFET (DT-MESFET). DC and radio frequency (RF) characteristics of the proposed structure are analyzed by 2-D numerical simulation and compared with conventional SOI MESFET (C-MESFET) characteristics. The extracted results show that the dual-trench technique has excellent effect on ID, VBR, and maximum output power density (Pmax) of the device. The parameters, VBR, ID, and Pmax of the DT-MESFET structure are improved by 55.55%, 50%, and 300% compared with those of the C-MESFET structure, respectively. Also, the dual-trench technique leads to the enhancement of maximum oscillation frequency and maximum available gain. Therefore, the novel SOI MESFET structure has superior electrical characteristics as compared to the similar device based on the conventional structure.

A novel SOI MESFET by $$\uppi $$ π -shaped gate for improving the driving current

This paper introduces a novel silicon-on-insulator (SOI) metal---semiconductor field-effect transistor (MESFET) with $$\uppi $$ ? -shaped gate with triple workfunction ( $$\uppi $$ ? -SOI MESFET) to improve the DC and radio frequency characteristics. The DC and radio frequency characteristics of the proposed structure are analyzed by 2-D ATLAS international simulator and compared with a conventional SOI MESFET (C-SOI MESFET). The simulated results show that the proposed SOI MESFET has excellent effect on the breakdown voltage and the driving current. The breakdown voltage of the $$\uppi $$ ? -SOI MESFET structure gets 54 % enhancement compared with that of the C-SOI MESFET structure and also the driving current of the $$\uppi $$ ? -SOI MESFET structure gets 66.66 % enhancement compared with that of the C-SOI MESFET structure. Other main characteristics such as maximum output power density, maximum oscillation frequency and maximum available gain have been evaluated and improved in the proposed structure.

A carbon nanotube metal semiconductor field effect transistor-based biosensor for detection of amyloid-beta in human serum

We have developed a carbon nanotube (CNT) film-based biosensor with a metal semiconductor field effect transistor structure (MESFET). A gold top gate was deposited on the middle of the CNT channel and probe antibodies were immobilized on the gold top gate with an antibody-binding protein, protein G or Escherichia coli outer membrane (OM) with autodisplayed Z-domains of protein A. These CNT-MESFET biosensors exhibited a higher sensitivity than the CNT-FET biosensor with probe antibodies immobilized using a chemical linker, since the orientation of immobilized antibodies was controlled by the antibody-binding proteins. In addition, nonspecific binding was effectively inhibited by E. coli OM. Using the CNT-MESFET biosensors with E. coli OM containing Z domain, we detected amyloid-β (Aβ) in human serum, one of the biomarkers for early diagnosis of Alzheimer's disease. Aβ at the level of 1pg/mL in human serum could be measured in real-time and without labeling, which was lower than a limit of detection for plasma Aβ using an enzyme-linked immune sorbent assay. These results suggested that our CNT-MESFET biosensors might be applicable for an early diagnosis of Alzheimer's disease.

High-power SiC MESFET using a dual p-buffer layer for an S-band power amplifier

A silicon carbide (SiC) based metal semiconductor field effect transistor (MESFET) is fabricated by using a standard SiC MESFET structure with the application of a dual p-buffer layer and a multi-recessed gate to the process for an S-band power amplifier. The lower doped upper-buffer layer serves to maintain the channel current, while the higher doped lower-buffer layer is used to provide excellent electron confinement in the channel layer. A 20-mm gate periphery SiC MESFET biased at a drain voltage of 85 V demonstrates a pulsed wave saturated output power of 94 W, a linear gain of 11.7 dB, and a maximum power added efficiency of 24.3% at 3.4 GHz. These results are improved compared with those of the conventional single p-buffer MESFET fabricated in this work using the same process. A radio-frequency power output greater than 4.7 W/mm is achieved, showing the potential as a high-voltage operation device for high-power solid-state amplifier applications.

A Novel High-Breakdown-Voltage SOI MESFET by Modified Charge Distribution

In this paper, a novel silicon-on-insulator (SOI) metal-semiconductor field-effect transistor (MESFET) with modified charge distribution is presented. Changing charge distribution leads to lower electric field crowding and increased breakdown voltage ( <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">BR</sub> ). For modifying charge distribution, a metal region (MR) is utilized in buried oxide of the SOI MESFET. In order to achieve the best results, the MR location and dimensions are optimized carefully. DC and radio frequency characteristics of the SOI MESFET with MR (MR-SOI MESFET) are analyzed by 2-D numerical simulation and compared with conventional SOI MESFET (C-SOI MESFET) characteristics. The simulated results show that the MR has excellent effect on the <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">BR</sub> of the device. The <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">BR</sub> of the MR-SOI MESFET structure improves by 116% compared with that of the C-SOI MESFET structure. Although drain current of the proposed structure reduces slightly, 126% improvement in maximum output power density of the device is achieved due to high enhancement of the <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">BR</sub> . Also, the MR leads to the enhancement of maximum oscillation frequency and maximum available gain of the MR-SOI MESFET structure. As a result, the MR-SOI MESFET structure has superior electrical performances in comparison with the similar device based on the conventional structure.

A novel double-recessed 4H-SiC MESFET with partly undoped space region

In this paper, a novel double-recessed 4H-SiC metal semiconductor field effect transistor (MESFET) with partly undoped space region (DRUS-MESFET) is introduced. The key idea in this work is to improve the DC and RF characteristics of the device by introducing an undoped space region. Using two-dimensional and two-carrier device simulation, we demonstrate that breakdown voltage ( V BR) increases from 109 V in conventional double recessed MESFET (DR-MESFET) structure to 144.5 V in the DRUS-MESFET structure due to the modified channel electric field distribution of the proposed structure. The maximum output power density of the DRUS-MESFET structure is about 25.4% larger than that of the DR-MESFET structure. Furthermore, lower gate–drain capacitance ( C GD), higher cut-off frequency ( f T), larger maximum available gain (MAG), and higher maximum oscillation frequency ( f max) are achieved for the DRUS-MESFET structure. The results show that the f max and f T of the proposed structure improve 95.6% and 13.07% respectively, compared with that of the DR-MESFET structure. Also, the MAG of the DRUS-MESET is 4.5 dB higher than that of the DR-MESFET structure at 40 GHz. The results show that the DRUS-MESFET structure has superior electrical characteristics and performances in comparison with the DR-MESFET structure.

Electrical characterization and hydrogen gas sensing properties of a n-ZnO∕p-SiC Pt-gate metal semiconductor field effect transistor

A new hydrogen gas sensitive n-ZnO∕p-SiC Pt-gate metal semiconductor field effect transistor (MESFET) is reported. The observed current-voltage curves for the source to drain region indicate that this MESFET operates in enhancement mode. A change in gate potential, due to different ambient atmospheres caused a change in the width of the depletion region, hence modulating the current in the n channel (ZnO layer). The H2 gas sensing mechanism of the presented MESFET structure is discussed using energy band diagrams.

Multiwafer gas source molecular beam epitaxial system for production technology

High throughput epitaxial wafer production is demonstrated by using a newly designed multiwafer gas source molecular beam epitaxy apparatus. The actual application data show excellent results of uniformity, cost performance, and material performance through practical mass production operation. Electron mobility as high as 124 000 cm2/V s is obtained at 77 K for a 7-μm-thick GaAs layer with a carrier concentration of 7.7×1013 cm−3. A typical surface defect density of 25 cm−2 is achieved for continuously grown 1.7-μm-thick metal–semiconductor field effect transistor (MESFET) structures. The uniformity of sheet resistance in n-GaAs and AlAs mole fractions in AlGaAs is less than 2.0% (1.5% and 0.27%, respectively) over a 27 cm diameter area. A quantitative throughput number for a typical growth of a MESFET structure is four 4 in. or seven 3 in. diameter wafers per 2.5 h in a continuous process flow.

WSix refractory metallization for GaAs metal–semiconductor field-effect transistors

WSix thin films on GaAs substrates have been investigated for potential use as refractory gates for self-aligned metal–semiconductor field-effect transistor (MESFET) devices. Films with Si/W ratio in the range of 0.19 to 1.76 have been dc magnetron cosputtered. The deposition parameters were optimized to produce adherent films with low stress and minimal impurity content. In order to serve as a refractory gate, the WSix film should perform as a diffusion barrier. The WSi0.45 films satisfied this requirement by having the highest crystallization temperature of 875 °C. Such films remained amorphous following the high-temperature dopant activation annealing (800 °C), thus reducing Ga and As outdiffusion and preventing pit formation in GaAs under the gate. I–V and C–V measurements were used to characterize contact electrical properties such as barrier height, ideality factor, and carrier concentration. A simulated threshold voltage shift for MESFET structure was obtained by modeling diode results. The WSi0.45 films were characterized by the most stable Schottky contact to GaAs (φB =0.75 eV, n=1.1) and showed minimal shift in carrier concentration and threshold voltage after annealing at 800 °C. In addition, the effect of impurities on contact properties was investigated. The presence of Zn at the WSix/ GaAs interface caused drastic reduction in carrier concentration and increased Schottky barrier height up to 0.9 eV.