Metal Oxide Semiconductor System Research Articles

Application of ellipsometric and interference methods in MOS structures investigations

Changes in some electrical and photoelectric parameters in the plane of aluminum gate, particularly in the effective contact potential difference (ECPD or ϕMS factor) have been observed in MOS System Studies Department of Institute of Electron Technology for the first time. It has been found that the MS distribution over the gate area has a characteristic domelike shape, with the highest values ate the center of the gate, lower at the gate edges and still lower at gate corners. In order to find out why these values were changed in such way, we have investigated optical properties of the dielectric in the neighborhood of metal gate. Hence, in this work, interferometry and spectroscopic ellipsometry as well as scattered Raman radiation analysis have been used in the investigation of metal-oxide-semiconductor (MOS) structures. The above mentioned methods turned out to be very useful for the possible explanation of changes in photoelectric characteristics of MOS structures with aluminum gate.

Physics-Based Analytical Model of Quantum-Mechanical Electron Wave Function Penetration into Thin Dielectric Films and Capacitance Evaluation

We propose an analytical expression of the electron distribution function inside silicon and SiO2 films under the surface-accumulation condition, to simulate the capacitance of a metal–oxide–semiconductor system. We assume a three-dimensional electron gas system and discuss the penetration of the electron wave function into SiO2 or high-k material films. It is demonstrated that the penetration of the wave function into the insulator film slightly influences the capacitance-voltage characteristics. It is also demonstrated that the penetration of the wave function into high-k materials is deeper than that into SiO2 film for identical equivalent oxide thickness (EOT).

Modeling of charge quantization and wave function penetration effects in a metal–oxide–semiconductor system with ultrathin gate oxide

We investigated the charge quantization and wave function penetration effects in a metal–oxide–semiconductor structure using an in-house developed quantum mechanical (QM) capacitance–voltage (C–V) simulator (denoted as NUSQM), which solves the Schrödinger and Poisson equations self-consistently. The C–V results obtained from the NUSQM simulator were compared with those obtained from other QM simulators in the literature (i.e., U.C. Berkeley, U.T. Quant, NEMO, and North Carolina State University). The results in the present work are generally in good agreement with the other simulators in the inversion region while some discrepancies exist among the different simulators in the accumulation region. It was found that the wave function penetration has a non-negligible effect on the gate capacitance and resulting C–V curves when the oxide thickness decreases to 1 nm and below.

Slow trap response of zirconium dioxide thin films on silicon

In this work, we explore the electrical properties of a metal–oxide–semiconductor system that incorporates a high-k zirconia dielectric with an equivalent oxide thickness of 3 nm deposited by metalorganic chemical vapor deposition. In general, the thin films examined exhibit excellent electrical properties. However, dynamic I–V measurements unveil the presence of trapping sites with response times up to 3 s. By applying a recently proposed model, this slow trap response can be consistently explained by traps located at the inner interface of a two-layer dielectric consisting of the high-k material itself and a transition layer in contact with the semiconductor. Trap energies are found to be distributed around two distinct levels.

Impact of atomic-layer-deposited TiN on the gate oxide quality of W/TiN/SiO2/Si metal–oxide–semiconductor structures

We demonstrate the impact of atomic-layer-deposited TiN gate on the characteristics of W/TiN/SiO2/p-Si metal–oxide–semiconductor (MOS) systems. Damage-free gate oxide quality was attained with atomic-layer-deposition (ALD)–TiN as manifested by an excellent interface trap density (Dit) as low as ∼4×1010 eV−1 cm−2 near the Si midgap. ALD–TiN improved the Dit level of MOS systems on both thin SiO2 and high-permittivity (high-k) gate dielectrics. The leakage current of a MOS capacitor gated with ALD–TiN is remarkably lower than that with sputter-deposited TiN and poly-Si gate at the similar capacitance equivalent thickness (CET). Less chlorine content in ALD–TiN films appears to be pivotal in minimizing the CET increase against postmetal anneal and improving gate oxide reliability, paving a way for the direct metal gate process.

Photonic high-frequency capacitance-voltage characterization of interface states in metal-oxide-semiconductor capacitors

A new characterization method based on the photonic high-frequency capacitance-voltage (HF C-V) response of metal-oxide semiconductor (MOS) capacitors is reported for the analysis of interface states in MOS systems. An optical source with a photon energy less than the silicon band-gap (h/spl nu/ = 0.799 eV < E/sub g/ = 1.11 eV) is employed for the photonic characterization of interface states (Bit) distributed in the photoresponsive energy band (E/sub c/ h/spl nu/ < E/sub it/ < E/sub c/) in NMOS capacitors with a polysilicon gate. Assuming a uniform distribution of the trap levels, the density of interface states (D/sub it/) was observed to be D/sub it/ 1-5 /spl times/ 10/sup 11/ eV/sup -1/ cm/sup -2/ in the photoresponsive energy band.

Erratum: “Effective electron mobility in Si inversion layers in metal–oxide–semiconductor systems with a high-κ insulator: The role of remote phonon scattering” [J. Appl. Phys. 90, 4587 (2001)

Erratum: “Effective electron mobility in Si inversion layers in metal–oxide–semiconductor systems with a high-κ insulator: The role of remote phonon scattering” [J. Appl. Phys. <b>90</b>, 4587 (2001)

Effective electron mobility in Si inversion layers in metal–oxide–semiconductor systems with a high-κ insulator: The role of remote phonon scattering

The high dielectric constant of insulators currently investigated as alternatives to SiO2 in metal–oxide–semiconductor structures is due to their large ionic polarizability. This is usually accompanied by the presence of soft optical phonons. We show that the long-range dipole field associated with the interface excitations resulting from these modes and from their coupling with surface plasmons, while small in the case of SiO2, for most high-κ materials causes a reduction of the effective electron mobility in the inversion layer of the Si substrate. We study the dispersion of the interfacial coupled phonon-plasmon modes, their electron-scattering strength, and their effect on the electron mobility for Si-gate structures employing films of SiO2, Al2O3, AlN, ZrO2, HfO2, and ZrSiO4 for “SiO2-equivalent” thicknesses ranging from 5 to 0.5 nm.

Characteristics of n+ polycrystalline-Si/Al2O3/Si metal–oxide– semiconductor structures prepared by atomic layer chemical vapor deposition using Al(CH3)3 and H2O vapor

We report interface and dielectric reliability characteristics of n+ polycrystalline-silicon (poly-Si)/Al2O3/Si metal–oxide–semiconductor (MOS) capacitors. Al2O3 films were prepared by atomic layer chemical vapor deposition using Al(CH3)3 and H2O vapor. Interface state density (Dit) and dielectric reliability properties of n+ poly-Si/Al2O3/Si MOS structures were examined by capacitance–voltage, conductance, current–voltage, and time-dependent dielectric breakdown measurements. The Dit of the n+ poly-Si/Al2O3/Si MOS system near the Si midgap is approximately 8×1010 eV−1 cm−2 as determined by the conductance method. Frequency dispersion as small as ∼20 mV and hysteresis of ∼15 mV were attained under the electric field of ±8 MV/cm. The gate leakage current of ∼36 Å effective thickness Al2O3 dielectric measured at the gate voltage of −2.5 V is ∼−5 nA/cm2, which is approximately three orders of magnitude lower than that of a controlled oxide (SiO2). Time-dependent dielectric breakdown data of Al2O3/Si MOS capacitors under the constant current/voltage stress reveal excellent charge-to-breakdown characteristics over controlled oxide. Reliable gate oxide integrity of Al2O3 gate dielectric is manifested by the excellent distribution of gate oxide breakdown voltage on 128 million MOS capacitors having isolation edges. Extracted time constant and capture cross section of the Al2O3/Si junction are discussed.

Electrical and structural properties of solid phase crystallized polycrystalline silicon and their correlation to single-electron effects

Single-electron transistors have been fabricated in solid phase crystallized polycrystalline silicon films deposited on SiO2 layers grown on silicon substrates. The single-electron transistors consist of lateral side-gated nanowires. A Coulomb staircase is observed at 4.2 K, which is fully modulated by the side-gate voltage. Two-period conductance oscillations are observed in nanowires fabricated on 10-nm-thick buried oxide layers, while single-period oscillations are observed in nanowires fabricated on 40-nm-thick buried oxide layers. The two-period oscillations are attributed to the formation of a charge layer in the silicon substrate. The single-electron effects are also studied as a function of the nanowire dimensions and annealing or oxidation treatments. The effects are correlated to the structure of the polysilicon film, characterized using transmission electron microscopy, Raman spectroscopy, and electron spin resonance analysis. These measurements demonstrate the significance of single-electron charging effects on electron transport in nanometer-scale complementary metal-oxide semiconductor systems.

Ion transport phenomena in oxide layer on the silicon surface and electron–ion exchange effects at the SiO2/Si interface

The results of ion depolarization experiments for SiO2 insulating layers on Si under isothermal and thermostimulated conditions have been analyzed. Additionally, the ion currents under the continuous change of gate voltage (dynamic current–voltage characteristics) have been investigated. It is shown that, depending on the type of experiment, an insulating layer shows itself either as an ion trap system with the wide distribution of lifetimes (energies of trap activation are distributed in an interval of 0.75–1.5 eV), or as a medium with free ions, which have a mobility μ (423 K)=2.7×10−8 cm2/V s and an activation energy of mobility Eμ=0.80±0.05 eV. These values correspond to those found for Na+ ions. The model resolving this apparent contradiction has been offered. Each ion and isolator matrix surrounding it are expected to generate a localized electronic state, but ion+electron neutral associates (NAs) are formed by filling these states owing to electron tunnel transitions from the semiconductor. NAs play the role of ion traps. The wide distribution of ion lifetimes on such traps is connected with spread of an electron tunnel length at the associate decay. The increase of NA ionization degree at the quasistationary electrical field change provides a smooth transition from a set of a few mobile NAs to an ensemble of free ions. The theory developed on the basis of model given and taking into account both NAs diffusion and their formation and decay processes allows the experimental data to be described qualitatively and quantitatively. Undamped circulation of particles in an oxide layer of a metal–oxide–semiconductor system under a stationary polarization electrical field is predicted and found: NAs formed as a result of ion neutralization at the semiconductor surface diffuse into the insulator volume, where they decay thermally to ions and electrons; the latter leave for a gate almost instantly compared to ion transport times; the ions formed again come back to the insulator–semiconductor interface under the electrical field action. The NA diffusion coefficient D(423 K)≈8.6×10−18 cm2 s−1 is a minimum on 8 orders of magnitude less than the free ion diffusion coefficient at the temperature 423 K.

Effects of nitridation and annealing on interface properties of thermally oxidized SiO2/SiC metal–oxide–semiconductor system

The effects of N2O nitridation and subsequent annealing in different conditions on thermally oxidized n-type 6H–silicon carbide (SiC) metal–oxide–semiconductor (MOS) interface properties were investigated. Influence of high-field stress on the MOS system was also studied. The nitrided device annealed in dry or wet O2 is found to have lower interface-state density compared to the device annealed in N2 because the reoxidation can reduce nitridation-induced interface damage. Furthermore, significantly less shift of flatband voltage during high-field stress for all nitrided devices indicates much better oxide reliability by replacing strained Si–O bonds with stronger Si–N bonds during nitridation. This is further supported by the fact that annealing of the nitrided device in dry or wet oxygen slightly reduces the robustness of the oxide. In summary, the O2-annealing conditions have to be optimized to deliver a proper tradoff between interface quality and reliability.

Investigation of existing defects and defect generation in device-grade SiO2 by ballistic electron emission spectroscopy

Degradation processes initiated by defect generation in device-grade SiO2 were studied by locally injecting hot electrons from a scanning tunneling microscope tip into Pd/SiO2/p-Si(100) metal–oxide semiconductor (MOS) structures. An analysis of the emerging collector current in the Si substrate, a technique known as ballistic electron emission microscopy, provides electron transport information, from which the oxide defect generation process was studied. The charging of the defects resulted in shifts of threshold energies for electron transport across the oxide. A novel sheet charge model was developed to assess the in-depth distribution and charge densities in the oxide from field-induced threshold shifts obtained from experiment. An as-fabricated MOS system with an oxide thickness of 71 Å was investigated and found to contain existing electron traps of charge densities in the range (0.7–2.8)×1013 e/cm2 that are distributed within a 30 Å region adjacent to the metal/oxide interface. Further stressing was performed at zero oxide bias with increasing tip voltages of up to −10 V. New electron traps characterized by charge densities of (1.9–3.6)×1013 e/cm2 and located within 40 Å of the SiO2/Si interface were generated when the kinetic energy of the electrons injected into the SiO2 conduction band exceeded 1.9 eV. This energy threshold is in very good agreement with the hydrogen-release energy that is frequently invoked to explain oxide degradation.

Positron beam analysis of semiconductor materials using a two-detector Doppler broadening coincidence system

Doppler-broadening measurements can be improved by using a second Ge-detector for the coincidence detection of the second annihilation photon. The coincidence condition in combination with an energy relation results in a reduction of the background by a factor of 100 compared to a single detector system. This background reduction opens up the possibility of performing accurate measurements of the high momentum part of Doppler-broadened annihilation spectra. We have used this technique for the analysis of a metal oxide semiconductor system and electron-irradiated, As- and Sb-doped silicon.

Charge Carrier Injection into the Buried Oxide of Wafer‐Bonded Silicon‐on‐Insulator Materials

The buried oxide of wafer‐bonded silicon‐on‐insulator (SOI) materials was degraded by means of charge carrier injection into the oxide. Both Fowler‐Nordheim injections using oxide fields above 7 MV/cm and ultraviolet (UV) photoinjections were made. The injections were made using metal‐oxide‐semiconductor (MOS) capacitors formed after a complete removal of the silicon film. As a result of photoinjection the oxides of capacitors with bonded interfaces were charged resulting in a 0.3 V shift in the flatband voltage. For this group of capacitors Fowler‐Nordheim injection resulted in a strong positive charging of the oxide as well as in an increase of interface states. Capacitors with bonded interfaces were found to be less degraded as a result of the charge injection as compared to capacitors with bonded interfaces. Secondary ion mass spectroscopy (SIMS) revealed a pronounced hydrogen peak at the bonded interface. The results from the electrical and the SIMS investigations indicate that a bonded interface is a highly defective region affecting the performance of the MOS system.

Pump-probe charge integrating technique: A study of trap emission kinetics in silicon dioxide

A new method for the study of charge emission from electrically active traps is described. This technique uses a sequence of electrostatic pulses in a pump-probe sequencing scheme, to examine the detrapping kinetics of states in the Si/SiO2 metal oxide semiconductor system. We show that with the pump-probe technique, the initial time regime of the trap emission dynamics is accessed. The results observed on oxidized lightly doped p-Si(111) substrates show trap interaction at high injection bias, and detrapping kinetics are discussed in the context of an occupation dependent trap interaction model.

Characterization of the interfacial failure of metal thin films on oxidized silicon using fracto-emission

The fracto-emission behavior during the adhesive failure of metal thin films from oxidized silicon surfaces has been compared for gold, silver and copper films. In general, the electron emission during failure can be characterized by a sharp emission peak followed by an extended emission tail. The prompt emission intensity is thought to be related to microdischarges across the gap formed during failure, suggesting a relationship to the relative work functions of the metal and the Si substrate. This metal–oxide–semiconductor system produces a naturally charged capacitor whose charge is partially determined by the relative work functions of the metals and the Si substrate. We present results which compare the electron emission from the failure of Au, Ag, and Cu thin films on the Si surface and find a correlation with the relative work functions opposite to the expected behavior.

Density of states in a two-dimensional electron gas: Impurity bands and band tails

We calculate the density of states of a two-dimensional electron gas in the presence of charged impurities within Klauder's best multiple-scattering approach. The silicon metal-oxide-semiconductor (MOS) system with impurities at the interface is studied in detail. The finite extension of the electron wave function into the bulk is included as well as various dependences of the density of states on the electron, the depletion, and the impurity densities. The transition from an impurity band at low impurity concentration to a band tail at high impurity concentration is found to take place at a certain impurity concentration. If the screening parameter of the electron gas is decreased, the impurity band shifts to lower energy. For low impurity density we find excited impurity bands. Our theory at least qualitatively explains conductivity and infrared-absorption experiments on impurity bands in sodium-doped MOS systems and deep band tails in the gap observed for high doping levels in these systems.

Electron-beam programming and testing of complementary metal-oxide semiconductor systems

This paper describes the application of a scanning electron beam lithography system (SEBL) to the programming and testing of digital CMOS systems via the direct injection of charge into the integrated circuits. E‐beam programmable interconnect structures, using floating‐gate FETs, implement customization and fault avoidance techniques. E‐beam controlled stimulus/response testing circuits, using substrate diodes, provide access to internal circuit nodes and thereby permit efficient testing procedures for large systems. Two system‐level applications are presented—a digital multiplier and a crosspoint switch. In both cases, redundant circuit components and programmable interconnect are used to achieve fault tolerance and yield enhancement. An analysis of a wafer‐scale crosspoint switch design indicates that e‐beam restructuring techniques could be used to implement an 80×75 element array on a 4‐in. wafer with 99% yield. The e‐beam programming and testing circuits are shown to be compatible with commercial CMOS foundry services. The precision, speed, and automation of the SEBL system make these techniques practical for large‐scale digital systems.

Dependence of radiation-induced interface traps on gate electrode material in metal/SiO2/Si devices

The density of radiation-induced interface traps in a metal-oxide-semiconductor (MOS) device has been found to depend on the electrode material used to form the gate. For a given oxide process, this dependence correlates well with the gate-induced interfacial stress distribution in the MOS system. The gate-induced bond strain gradient model that we proposed previously may be readily used to explain the results.