Switching in power semiconductors with emerging materials such as silicon carbide (SiC) leads to undesired overvoltages and oscillations that limit switching frequency, largely due to impedance in the current commutation loop. Minimizing this parasitic impedance in printed circuit boards (PCB) requires precise characterization. To this end, this work presents a new measurement method based on obtaining S-parameters with a vector network analyzer (VNA) and on using a shielded flexible probe with mobile test terminals. The flexible probe uses a metal shielding plane perpendicular to the PCB to prevent the main measurement errors resulting from the variation in the magnetic flux responsible for loop inductance during the VNA frequency sweep. The proposed curve-fitting procedure consists of measuring the characteristic impedance and propagation time of the traces, considering they form ideal transmission lines. These values are used for a nonlinear least squares adjustment for the actual line (with losses). Finally, an experimental assembly with microstrip transmission lines was developed to validate the proposed method experimentally. The experimental results were compared with those obtained by using a rigid test fixture as a reference, those calculated analytically and those obtained from partial element equivalent circuit (PEEC) simulation. The curve-fitting method yields better results than the analytical and the simulation methods and they exhibit (up to 350 MHz) precisions of 1.37% in the characteristic impedance measurement and of 0.81% in the propagation time.