Measured Phase Noise Research Articles

A Spurious and Oscillator Pulling Free CMOS Quadrature LO-Generator for Cellular NB-IoT

A reconfigurable LO-generator (LOG) using an integer divider and a mixed-mode fractional divide-by-2.5 (Div2.5) is presented to generate a spurious and oscillator pulling free output spectrum without additional digital calibration for cellular narrowband Internet of Things (NB-IoT). The proposed LOG includes a fractional divider to mitigate the pulling effect between the oscillator and the power amplifier. The designed fractional Div2.5 consists of a digital Div2.5 core, a duty cycle corrector (DCC), and an I/Q generator (I/Q-GEN). An adaptive bias circuit (ADB) is applied to compensate for process, voltage, and temperature (PVT) variations on delay circuits of the DCC and the I/Q-GEN by adjusting the supply voltage. The designed LOG is fabricated in the 28-nm CMOS process while consuming 40 mW, including ADPLL, digitally controlled oscillator (DCO), local oscillator (LO) distribution buffers, and dividers at 2 GHz. The measured phase noise of the Div2.5 LOG generating 2-GHz carrier frequency is −146.3 dBc/Hz at a 10-MHz offset. The measured fractional spurious tones are below −90 dBc without oscillator pulling effects for the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1.6\sim 2.1$ </tex-math></inline-formula> -GHz output frequency.

Low-Voltage Dual-Band CMOS Voltage-Controlled Oscillator for Ka-Band and V-Band Applications

A low-voltage dual-band CMOS voltage-controlled oscillator (VCO) is fabricated in a 90-nm CMOS process. The performance of the proposed VCO is improved by winding a multifunction inductor with transformer feedback and parasitic capacitance-splitting techniques. The proposed VCO adopts a push–push node to obtain a second-harmonic signal strengthened by using the injection amplifier and the bandpass filter. The measured tuning ranges of the fundamental signal and second-harmonic signal are from 27.5 to 30.04 and 55 to 60.08 GHz, respectively. The measured phase noise of the fundamental signal of 28.26 GHz is −95.62 and −111.5 dBc/Hz at 1- and 10-MHz offsets, respectively. The measured phase noise of the second-harmonic signal of 56.52 GHz is −87.83 and −107.9 dBc/Hz at 1- and 10-MHz offsets, respectively. The core power dissipation is 7.08 mW from a 0.6-V supply. The figure-of-merits (FOMs) and FOMs with tuning range (FOM <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> s) at 1- and 10-MHz offsets are −176.1, −172, −175, and −170.9 dBc/Hz, respectively, from the fundamental signal of 28.26 GHz. The FOMs and FOM <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> s at 1- and 10-MHz offsets are −174.3, −174.4, −173.2, and −173.3 dBc/Hz, respectively, from the second-harmonic signal of 56.52 GHz.

Ultra-Low Phase Noise Measurement of Microwave Sources Using Carrier Suppression Enabled by a Photonic Delay Line

We propose and demonstrate a photonic delay line based carrier suppression interferometer system for measuring the phase noise of microwave sources. We show both theoretically and experimentally for the first time that carrier suppression is capable of suppressing the effects of the residual phase noise of the microwave amplifiers and the relative intensity noise of light in the system by up to 70 dB, and therefore effectively eliminates the contributions of these noise sources to the noise floor of the phase noise measurement system. Using a 2-km photonic delay line, we achieved phase noise measurement floors of −126 dBc/Hz at 1 kHz and −152 dBc/Hz at 10 kHz around a 10 GHz carrier, respectively, which are 15 and 20 dB lower than those of a frequency discriminator based phase noise measurement system using the same length of fiber delay and the same optical and microwave components. The noise floor of −152 dBc/Hz at 10 kHz is also 8 dB and 17 dB lower than those of a Keysight E5052B phase noise measurement system with 100-times cross-correlation and without cross-correlation, respectively. Even lower phase noise floors are expected for such a carrier suppression system if microwave phase shifters with lower residual phase noise or a longer photonics delay line are used.

A 670-GHz 4 × 2 Oscillator–Radiator Array Achieving 7.4-dBm EIRP in 40-nm CMOS

A 670-GHz terahertz source array is implemented in 40-nm bulk CMOS technology. To increase the frequency and power of the source, a compact and 1-D scalable oscillator–radiator topology that works on the third harmonic is proposed. In order to avoid the gate transistor node from loading the tank at the output frequency, a filtering feedback network is used to feed through the fundamental signal while filtering the third harmonic. The source consists of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$4\times 2$ </tex-math></inline-formula> oscillator cells with different common- and differential-mode coupling mechanisms that are built into the slotline resonant tanks. These slotlines build up an <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$E$ </tex-math></inline-formula> -field pattern that radiates the signal to the far-field. The chip is assembled on a hyperhemispherical lens that suppresses substrate modes and further increases the directivity of the source. The full array and pads have a die size of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.75\times 1$ </tex-math></inline-formula> .15 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The source can be tuned in the range of 660.8–676.6 GHz. It has a maximum measured EIRP of 7.4 dBm and −16.1 dBm radiated output power while consuming only 99.7 mW. The source also has a measured phase noise at 1- and 10-MHz offsets of −69 and −93 dBc/Hz, respectively.

Short-term stability of Cs microcell-stabilized lasers using dual-frequency sub-Doppler spectroscopy

The combination of atomic spectroscopy, integrated photonics, and microelectromechanical systems leads the way to the demonstration of microcell-based optical atomic clocks. Here, we report the short-term stability budget of table-top Cs microcell-stabilized lasers based on dual-frequency sub-Doppler spectroscopy (DFSDS). The dependence of the sub-Doppler resonance properties on key experimental parameters is studied. The detection noise budget and absolute phase noise measurements are in good agreement with the measured short-term frequency stability of the laser beatnote, at the level of 1.1 × 10 − 12 τ − 1 / 2 until 100 s, currently limited by the intermodulation effect from a distributed-feedback laser setup. The fractional frequency stability of the laser beatnote at 1 s is about 100 times greater than that of commercial microwave chip-scale atomic clocks and validates interest in the DFSDS approach for the development of high-performance microcell-based optical standards.

Low‐power dual‐band voltage‐controlled oscillator using a fourth‐order resonant technique

AbstractA low‐power dual‐band voltage‐controlled oscillator (VCO) using a fourth‐order resonant technique implemented in 0.18‐μm CMOS process is presented in this letter. By utilizing a fourth‐order LC‐type resonant network and a current‐reused technique, the proposed VCO operates in the dual‐band mode and improves the overall performance. The tuning ranges of band 1 and band 2 are from 3.39 to 3.68 GHz and from 7.2 to 7.57 GHz controlled by a controlled‐voltage VC, respectively. The measured phase noises at 1 MHz frequency offset are −117.39 dBc/Hz and −113.58 dBc/Hz for output frequencies of 3.68 and 7.21 GHz, respectively. Besides, the figures‐of‐merit (FOM) at 3.68 and 7.21 GHz output frequencies are −182.5 and −184.5 dBc/Hz, respectively. The proposed VCO core consumes 4.2 mW from a 1.2‐V supply.

SiGe Push–Push VCO for Low-Power C-Band FMCW High-Resolution Radar Applications

In this letter, we present a low-complexity push–push voltage-controlled oscillator (VCO) that achieves over 17% highly linear MHz/V tunable bandwidth. Unlike traditional VCOs, the proposed design does not require dedicated voltage-sensitive reactance components such as varactors or other transistors. The frequency is controlled with the bias voltage of the SiGe transistors which are placed in push–push configuration. The VCO is implemented using discrete components, and occupies 81 mm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{2}$ </tex-math></inline-formula> on PCB. The measured phase noise @1 MHz is −103 dBc/Hz, the average power consumption is 18 mW, the RF output power is −1 dBm, and the supply voltage is 3.3 V. The tuning range is 5.15–6.15 GHz, and the figure of merit with tuning (FoMT) at center frequency is −170. The large tunable bandwidth is obtained without using voltages greater than the supply voltage. The linearity and tuning bandwidth are evaluated by implementing the design in a low-power C-band frequency modulated continuous wave (FMCW) imaging radar.

A New Current-Shaping Technique Based on a Feedback Injection Mechanism to Reduce VCO Phase Noise.

Inductor-capacitor voltage controlled oscillators (LC-VCOs) are the most common type of oscillator used in sensors systems, such as transceivers for wireless sensor networks (WSNs), VCO-based reading circuits, VCO-based radar sensors, etc. This work presents a technique to reduce the LC-VCOs phase noise using a new current-shaping method based on a feedback injection mechanism with only two additional transistors. This technique consists of keeping the negative resistance seen from LC tank constant throughout the oscillation cycle, achieving a significant phase noise reduction with a very low area increase. To test this method an LC-VCO was designed, fabricated and measured on a wafer using 90 nm CMOS technology with 1.2 V supply voltage. The oscillator outputs were buffered using source followers to provide additional isolation from load variations and to boost the output power. The tank was tuned to 1.8 GHz, comprising two 1.15 nH with 1.5 turns inductors with a quality factor (Q) of 14, a 3.27 pF metal-oxide-metal capacitor, and two varactors. The measured phase noise was −112 dBc/Hz at 1 MHz offset. Including the pads, the chip area is 750 × 850 m.

Measurement of Laser Phase Noise for Ultra-Long Period of 0.8 Seconds With 800-ps Temporal Resolution Using Optical Coherent Detection With FPGA-Implemented Data Acquisition

In this study, we demonstrate laser phase noise measurement with a 0.8-s period and an 800-ps temporal resolution. An optical carrier is received by heterodyne detection, and the detected electrical signals are acquired using field programmable gate array circuits with 1.25-GSample/s analog-to-digital converters and 1-GByte memory. The laser phase noise is visualized using a field spectrogram and a very wide FM noise spectrum from near the DC, which is constructed using our proposed phase-compensating interleaved fast Fourier transformation. We compare the phase noise characteristics of an external cavity laser with those of a distributed feedback semiconductor laser.

Spectral Breathing and Its Mitigation in Digital Fractional-N PLLs

Although digital phase-locked loops (PLLs) offer several advantages over their analog counterparts, they suffer from a major disadvantage that is rarely mentioned in published articles. The disadvantage, known as spectral breathing, is caused by component mismatches among the frequency control elements within a PLL’s digitally controlled oscillator (DCO). The mismatches introduce DCO frequency modulation nonlinearity which fluctuates and, therefore, causes erratic variations in the PLL’s measured phase noise spectrum as the DCO’s free-running frequency drifts. The phenomenon is called spectral breathing because the measured phase noise spectrum tends to slowly swell and contract over time as if taking breaths of air. During these breaths, the PLL’s phase noise often becomes severely degraded. This article presents an experimental demonstration of the spectral breathing phenomenon and its solution in a digital fractional- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$N$ </tex-math></inline-formula> PLL. The demonstrated solution is a multi-rate dynamic element matching technique and a mismatch-noise cancellation technique that together eliminate spectral breathing.

Phase Noise Reduction Technique for ISM Band LC Oscillator Using Tail Current

This paper presents low phase noise, precise frequency tuning range LC Voltage controlled Oscillator (VCO) circuit of Phase lock loop, to support - IEEE 802.11a/b/g, Bluetooth, Zigbee and IEEE 802.15.4., operating on 2.4GHz ISM band (Industrial, Scientific, Medical). The presented circuit is implemented in Cadence virtuoso environment and using GPDK090 Library of 90nm CMOS Technology. The presented VCO is tuned at 2.4GHz frequency with tuning range of 80MHz. The measured Phase noise is -126.3dBc/Hz at 1MHz offset frequency. The total power consumption of the presented VCO is 4.7mw at 1V power supply.

A Phase Noise Measurement System with Frequency Drift Compensation

Commercial equipment provides phase noise measurement solution for voltage-controlled oscillator (VCO), but it also needs to connect additional tuning voltage for VCO frequency stabilization. If the frequency-drifting VCO cannot be tuned directly, the measurement would be difficult. In this article, we present a prototype of a phase noise measurement system, without any connection for frequency stabilization. The innovation of this work is to compensate the frequency drift by introducing a delayed path. The frequency drift of the signal under test is calculated in advance, and then accurately compensates the delayed signal. The results are compared with commercial equipment, and it shows better performance when measuring frequency-drifting signal directly.

40 GHz VCO and Frequency Divider in 28 nm FD-SOI CMOS Technology for Automotive Radar Sensors

This paper presents a 40 GHz voltage-controlled oscillator (VCO) and frequency divider chain fabricated in STMicroelectronics 28 nm ultrathin body and box (UTBB) fully depleted silicon-on-insulator (FD-SOI) complementary metal-oxide–semiconductor (CMOS) process with eight metal layers back-end-of-line (BEOL) option. VCOs architecture is based on an LC-tank with p-type metal-oxide–semiconductor (PMOS) cross-coupled transistors. VCOs exhibit a tuning range (TR) of 3.5 GHz by exploiting two continuous frequency tuning bands selectable via a single control bit. The measured phase noise (PN) at 38 GHz carrier frequency is −94.3 and −118 dBc/Hz at 1 and 10 MHz frequency offset, respectively. The high-frequency dividers, from 40 to 5 GHz, are made using three static CMOS current-mode logic (CML) Master-Slave D-type Flip-Flop stages. The whole divider factor is 2048. A CMOS toggle flip-flop architecture working at 5 GHz was adopted for low frequency dividers. The power dissipation of the VCO core and frequency divider chain are 18 and 27.8 mW from 1.8 and 1 V supply voltages, respectively. Circuit functionality and performance were proved at three junction temperatures (i.e., −40, 25, and 125 °C) using a thermal chamber.

New Approach to Laser Characterization Using Delayed Self-Heterodyne Interferometry

A new technique to measure phase noise properties of highly coherent lasers based on delayed self-heterodyne interferometer (DSHI) is suggested where the Allan variance of the beat note frequency is obtained via digital signal processing and then used to determine laser linewidth and phase noise properties. This method is capable of determining both white frequency noise and flicker-noise contributions and has been used to characterize various types of lasers. A simple numerical model generalizing previous analytical results has been developed and verified. The corresponding requirements imposed on the DSHI optical delay are consistent with numerical modeling results. The measurement results are in agreement with our previous experiments based on direct heterodyning of the same lasers. The technique is particularly suitable for real-time monitoring of the laser phase noise over long periods of time, which is useful for testing and engineering of highly coherent lasers.

All-fiber transient phase noise characterization of polarization maintaining Yb-doped fiber amplifiers

We demonstrated an all-fiber phase noise measurement technique to detect transient phase variation of polarization maintaining Yb-doped fiber amplifier based on active phase locking of an optical heterodyne detection system. The root mean square, power spectral density, and drift velocity in the phase noise were analyzed for both core-pumped single clad fiber amplifier and clad-pumped double-clad fiber amplifier. The phase noise was further analyzed in terms of the seed laser power, amplifier output power, and fiber optic component configurations. The phase drift velocity measurements at various amplifier output powers indicated the optical phase were closely related to the temperature variations.

Low phase noise microwave oscillator with greater than 60 dB second‐harmonic suppression

This study presents a microwave oscillator in which an innovative hybrid microstrip and substrate integrated waveguide filter is proposed for phase noise reduction. By virtue of equivalent circuit, the specific topology of this filter is clearly revealed and verified by both the simulation and the experiment. It can realize a third-order elliptic bandpass response with two transmission zeros near the passband. Specific phase response can be formed, in which a high group delay can be achieved within a narrow frequency range around the centre frequency. This feature makes the filter performance very flexible for its application in microwave oscillator, and then reduces its phase noise. For demonstration, an oscillator example at 9.0 GHz was deigned, fabricated and measured. The measured phase noise at 100 kHz away from the oscillation frequency is as low as −120.06 dBc/Hz. Furthermore, the proposed oscillator is featured by greater than 60 dB second-harmonic suppression and at least the third harmonic is suppressed.

Hybrid Cross Coupled Differential Pair and Colpitts Quadrature Digitally Controlled Oscillator Architecture

Growing importance of wireless communication systems forces reduction of power consumption of the designed integrated circuits. The paper focuses on minimization of power consumption in a digitally controlled oscillator (DCO) that can be employed as oscillator in GPS/Galileo receiver. The new hybrid architecture of DCO combines good phase noise performance of a Colpitts oscillator and relaxed startup conditions of a cross-coupled differential pair oscillator. The proposed new DCO generates a quadrature signal in a current reused frequency divider. Such solution allows of the dissipated power to be reduced. The DCO has been implemented in 110 nm CMOS technology. It generates output signal in frequency range from 1.52 GHz to 1.6 GHz and consumes 1.1 mW from 1.5 V supply voltage. The measured phase noise equals −116 dBc/Hz at 1 MHz offset from 1.575 GHz output signal.

Low-Phase-Noise High-Efficiency Power Oscillator With Digitally Controlled Output Power

This letter proposes a low-phase-noise high-efficiency power oscillator with digitally controlled output power and frequency. The transformer-based matching network resonator is implemented to balance the quality factor and matching efficiency. The active core and the transformer are jointly optimized to achieve the required output power while achieving the low phase noise and high power efficiency. Besides, the digitally controlled cross-coupled pair array is utilized to tune the output power. To verify the mechanism mentioned above, the power oscillator is fabricated using conventional 40-nm CMOS technology with an active area of 0.19 mm2. The proposed power oscillator exhibits a 21.7% tuning range from 2.30 to 2.86 GHz. The maximum output power is 4.5 dBm with a peak system efficiency of 25.1%. Meanwhile, the measured phase noise at a 3-MHz offset is −140.36 dBc/Hz at 2.79 GHz. The corresponding figure of merit (FoM) is 189.2 dBc/Hz, and FoMT is 196 dBc/Hz.

Multi-Mode Lasers for Self-Forced Opto-Electronic Oscillators in Compact Frequency Synthesizers

Advanced telecommunication, imaging, and remote sensing systems require reliable ultra-high stability local oscillators. Particularly, coherent detection of digital data signals relies on a low aperture jitter of local oscillators in addition to high signal to noise ratio to achieve a very low bit-error-rate (BER). Frequency stabilized local oscillators are required with phase noise of smaller than −120 dBc/Hz at 10 kHz offset carrier and low aperture jitters of below 50 fs for RF sources of 10 GHz. Self-forced opto-electronic oscillation techniques of self- injection locking (SIL) combined with self-phase locking (SPLL) employ low loss long optical delays for frequency stabilizations through comparison of instantaneous signals and delayed versions. A compact design of multi-mode laser (MML) is presented here by employing self-forced oscillation combined with self-mode locking of an MML. Proof of concept of this novel approach is reported using a custom designed InGaAsP/InP chip using Smart Photonics foundry service, where multi-quantum well semiconductor optical amplifiers (SOA), carrier injection based phase modulator (PM), front and back (a common) distributed Bragg reflectors (DBR), and external electro-absorption modulators (EAM) are designed and physically modeled based on the foundry process design kit (PDK). A compact realization of self-mode locked MML with 5 modes to a fixed inter-modal oscillation frequency is presented, where the beat notes of the inter-modal oscillation are generated over X-band to form a frequency stabilized synthesizer. The PM bias control of two MLL lasers with common DBR is used to tune this opto-electronic oscillator from 11 GHz to 13 GHz with a frequency resolution of 110 kHz. Self-forced oscillation techniques of SILPLL combined with self-mode-locking (SML) has provided frequency synthesis with measured phase noise at 10 kHz offset (and aperture jitter) improved from −36 dBc/Hz (58ps) for the free-running MML to −92 dBc/Hz (68 fs) using SILPLL and SML of only 5 correlated modes. Analytical modeling has predicted that increasing the number of self-mode-locking modes from 5 to 13 will result in 18 dB improvement in phase noise. Performance comparison of this opto-electronic frequency synthesis method is made against various commercially available X-band frequency synthesizers that use full electrical solutions.

A 2.1 GHz, 210 μW, —189 dBc/Hz DCO with Ultra Low Power DCC Scheme

This article presents a low power digital controlled oscillator (DCO) with an ultra low power duty cycle correction (DCC) scheme. The DCO with the complementary cross-coupled topology uses the controllable tail resistor to improve the tail current efficiency. A robust duty cycle correction (DCC) scheme is introduced to replace self-biased inverters to save power further. The proposed DCO is implemented in a Semiconductor Manufacturing International Corporation (SMIC) 40 nm CMOS process. The measured phase noise at room temperature is −115 dBc/Hz at 1 MHz offset with a dissipation of 210 μμW at an oscillating frequency of 2.12 GHz, and the resulin figure-of-merit is s −189 dBc/Hz.