Multiple-Graphene-Layer (MGL) on Si/3C-SiC (100) substrate is proposed for designing of a vertically doped p++–n−–n–n++ device/switch array for Terahertz communication systems. In addition to the superior mechanical properties in Graphene, conducive–electrical and electronic properties, especially, high carrier mobility in MGL has made this a promising material for different novel applications in THz domain. A quantum-modified classical drift–diffusion (QMCLDD) mathematical model, incorporating quantum size effects, arising due to Multiple-Graphene-Layer, is developed by the authors for analysing the THz-characteristics of exotic-pin p++–n−–n–n++ devices and switches. The validity of the model is further established by comparing the simulation results with those of the experimental observations under similar electrical/thermal/structural operating conditions. The comprehensive study reveals that the switching behaviour of the device improves considerably due to the incorporation of MGL structure in the central i-region of the device. The device has shown considerably faster reverse recovery time (~ 0.5 ns), low forward RF series resistances (0.29Ω) and low power dissipation (0.45 dB). Central i-region width, doping concentration and mesa diameter of the device are optimized by studying the punch-through effects on the electric field profiles under large signal operation. It is observed that compared to the High-Punch-Through Device (HPTD) and Non-Punch-Through Device (NPTD), Low-Punch-Through Device (LPTD) is showing better high-frequency performances under similar operating conditions. A tradeoff between device width and doping concentration is further established for ultra-fast switching operation in the THz-regime. A comparative analysis of Insertion loss (IL) and Isolation (ISO) in Single-Pole-Single-Throw (SPST), Single-Pole-Double-Throw (SPDT) and Single-Pole-Multi-Throw (SPMT) THz-switches (with series–shunt and Shunt type arrays) is reported in the paper. The study clearly reveals the suitability of LPTD variant for the development of SPST switches in terms of lowest IL (0.015 dB) and SPMT shunt switches in terms of highest ISO (88.0 dB) at around 4.0 THz. Moreover, the authors have made quasi 2D-thermal analysis of the Device-Under-Test (DUT). The results will be extremely useful for developing ultrafast solid-state switches. To the best of authors’ knowledge this is the first ever report on vertically grown MGL-exotic pin (p++–n−–n–n++) device on Si/3C-SiC (100) substrate, as a THz ultrafast switch.