Design Of Matching Circuit Research Articles

Wideband, Non-Foster Impedance Matching of Electrically Small Transmitting Antennas

Electrically small antennas (ESAs) can be passively matched only over very narrow bandwidths and the resulting antennas have low gains. These are the major limiting factors for ESAs used in transmit applications, especially at high-frequency (HF) and lower Very HF frequency bands. This paper discusses the challenges of transmit ESA matching circuit design and the design process of a new non-Foster transmit matching architecture for electrically small monopole antennas that achieves wide bandwidth, high transmission efficiency (transducer power gain), and stability at the same time. The proposed circuit is composed of a current buffer (for high isolation), a transformer (for real-part matching), and a negative impedance converter (for imaginary-part matching). The measured −6 dB (−10 dB) $|S_{11}|$ fractional bandwidth of the proposed non-Foster transmitting system is 110% (39%), while the maximum bandwidth that can be achieved is 0.076% (0.047%) when matched with the conventional passive matching. The transmission efficiency of the system is improved by as much as 34.4 dB compared to the same antenna without the proposed non-Foster matching circuit, and it retains an enhanced efficiency over the entire frequency band of operation (26–89 MHz). The system remains stable within this frequency band. The measurement results of the compact and broadband transmitting antenna prototype verify the design concept.

The Design of the Acoustic Wave Meter Transmitting Circuit

It is very important to design a good transmitter for acoustic wave guage, the performance of the transmitter directly decides whether the equipment can work properly or not, and the effective data can be got. The transmitter circuit structure of acoustic wave guage is introduced in this paper, including driving circuit design, power amplification circuit design and the transducer matching circuit design, and calculation of the transmitter output power. Finally, the actual measurement data is used to prove that the ultrasonic transmitter design is reasonable and practical.

Slow-Wave Propagation Properties of Substrate Integrated Waveguide Based on Anisotropic Artificial Material

In this paper, an inductor-loaded slow-wave substrate integrated waveguide (SIW) is presented and studied. The proposed structure features a number of unique propagation properties. First of all, the inductance value imposed along the transverse direction will affect the phase velocity and cutoff frequency of the waveguide simultaneously. Second, the inductance value in the longitudinal propagating direction will only affect the phase velocity but make no difference on the cutoff frequency. Based on the aforementioned characteristics, the size of structure could be controlled by separately tuning the loaded inductor along the transverse direction and longitudinal propagating direction. More importantly, it is released on the interrelationship between the phase velocity and cutoff frequency in the proposed guiding-wave structure. The feature will be beneficial to the design of leaky-wave antenna and matching circuits for SIW circuits. Finally, experimental results demonstrate that with the increasing of loaded inductance, a reduction of 35% in cutoff frequency is achieved compared with the conventional SIW counterpart. The phase velocity is also reduced by 35% with the increasing of the loaded inductor, which contributes to a miniaturized longitudinal dimension for a given electrical length.

Preliminary design of an impedance matching circuit for a high power rectangular RF driven ion source

Within the framework for the development of a radio frequency driven positive ion source for fusion applications, KAERI is currently constructing a new high power large area radio frequency ion source. An impedance matching circuit maximizing the power transfer to a plasma in the ion source, while taking into account the technical feasibility, is preliminarily designed at a conceptual level. In order to estimate the plasma load impedance and design parameters, an integrated model composed of the hydrogen plasma global model, the two-dimensional electromagnetic model, the relative plasma dielectric constant calculation module, and the impedance matching circuit module is developed for the ion source with a rectangular tube geometry. By employing this design model, the design parameters dependent on RF input powers of up to 50kW are investigated and the preliminary design is assessed.

A Novel Heuristic Passive and Active Matching Circuit Design Method for Wireless Power Transfer to Moving Objects

In this paper, a novel matching circuit design method utilizing a genetic algorithm (GA) and the measured S-parameters of randomly moved coil configurations is discussed. Through the detailed comparison of different matching circuit topologies, the superiority of active matching circuits is clearly demonstrated, and potentially there is 21.4% improvement in the wireless power transfer efficiency by using a four-cell active matching circuit, which can create 16 different impedance values. Also, the matching circuit design simulation can be further simplified by choosing a much smaller subset of representative impedance values for the utilized time-changing coil configuration through the employment of $k$ -means clustering and use only these values for the derivation of the optimal matching circuit. This heuristic approach could drastically reduce the time for the matching circuit design simulation, especially for matching circuit topologies with a larger number of cells.

Design of impedance matching circuits for RF energy harvesting systems

This paper presents a systematic design methodology for impedance matching circuits of an RF energy harvester to maximize the harvested energy for a range of input power levels with known distribution. Design of input matching networks for RF rectifier differs from those for traditional RF circuits such as low-noise amplifier because the transistors in the RF rectifiers operate in different regions. In this work, it is shown that the input impedance of the rectifier estimated based on small signal simulation of transistors at the peak of input signal in the rectifier when the transistors are biased with stable DC operating voltage provides the largest harvested energy from a fixed input power. For variable input power levels, a matching network selection strategy is proposed to maximize expected harvested energy given the probability density distribution of input power levels. As an experimental sample, an RF energy harvester circuit is designed to maximize the harvested energy in the 902–928MHz band employing an off-chip impedance matching circuit designed using the proposed methodology. The proposed RF energy harvester exhibits a measured maximum power conversion efficiency (PCE) of 32% at −15dBm (32μW) and delivers an output DC voltage of 3.2V to a 1MΩ load.

Non-Foster Matching Circuit Design via Tunable Inductor for VLF Receive Loop Antennas

This paper presents a non-Foster matching circuit (NFC) for very low frequency (VLF) receive loop antennas. A 1 ⁎ 1 m VLF receive loop antenna was designed with a CMOS switch-based tunable inductor built into the NFC. The NFC can be applied to different VLF loop antennas by adjusting the number and inductance of the cells in the tunable inductor. A loop antenna was matched to the designed NFC with −10 dB S11 fractional bandwidth, marking a 383% improvement as well as enhanced transducer gain (S21) compared to most bands in passive matching (over 15–30 kHz). The noise and received signal-to-noise ratio (SNR) of the matching network were assessed to find that, with a low noise floor level (4 dB) receiver, the SNR of the passive loaded antenna performs better than the non-Foster loaded antenna in VLF.

Range-Adaptive Wireless Power Transfer Using Multiloop and Tunable Matching Techniques

In this paper, a range-adaptive wireless power transfer (WPT) system is proposed to achieve high efficiency over a wide range of distances by using tunable impedance matching techniques. A multiloop topology is employed to greatly reduce the variation in the input impedance of the WPT system with respect to the distance, where one of the four loops with a different size is selected, depending on the distance. It enables the design of a simple tunable matching circuit using a single variable capacitor. An algorithm is written to find the optimum loop and capacitance in the matching network, based on the measured input return loss using a directional coupler and rectifiers. The fabricated WPT system shows a range-adaptive operation with high efficiency over a wide range of distances. It attains 48% efficiency at a distance of 100 cm with a maximum efficiency of 92% at a distance of 10 cm.

W‐band power amplifier using broadband impedance‐transforming coupled line couplers

ABSTRACTIn this letter, a compact and broadband impedance‐transforming 90° hybrid is proposed, where two coupled lines with different characteristic impedances are cascaded to transform 50 to 25 Ω. The designed 50–25 Ω transforming coupler on a GaAs substrate shows a measured insertion loss of 1.1 dB with a return loss of 29.0 dB at 77 GHz. The insertion loss is lower than 2.0 dB in the range from 30 to 97 GHz. The proposed impedance‐transforming couplers are used in the design of a W‐band balanced power amplifier (PA) with a port impedance of 25 Ω, which allows the compact and broadband design of matching circuits in the PA. The PA fabricated by a 0.15‐μm GaAs pHEMT process shows a small‐signal gain of 13.3 dB at 79.5 GHz with a 3‐dB bandwidth of 21.4% (from 72 to 89 GHz). The measured output power is as high as 16.7 dBm at 75 GHz. © 2015 Wiley Periodicals, Inc. Microwave Opt Technol Lett 57:803–806, 2015

Co-design of a wideband double-balanced active mixer and transformer-based baluns for 77 GHz radar applications

This paper presents a 130-nm BiCMOS active mixer dedicated to 77GHz automotive radar applications. The architecture is based on a double-balanced Gilbert cell with integrated transformer-based baluns. Interconnections between devices, capacitor accesses and Tee-junctions are modeled using EM software in order to improve the simulation accuracy. Focusing on wideband operation, the transformer-based baluns are considered as part of the input matching network. Sizing of the transformer is detailed along with its amplitude and phase balance performances. The design of the input matching circuit integrating the transformer is presented, providing a 12-GHz bandwidth. Measured noise figure, conversion gain and compression point of the mixer are displayed and compared to the state of the art.

Analysis and Realization of Critical Points on Hardware Design of FPGA

FPGA is one kind of important devices that can realize many functions. As the development of communication technology and computer science, more and more technologies are invented and more and more hardware design technologies are sifted out. Therefore, the hardware design based on ASIC can be not fit on the new theories realization. As a new device, FPGA has many advantages including strength function, shorter design circle, less money, more flexible and more intelligent design tools. More and More hardware designs of FPGA are pay more attentions. Therefore, it is significant to make analysis on hardware design of FPGA. The hardware design for FPGA will be related to the FPGA device. In the market Altera and Xilinx FPGAs are used frequently by engineers. Therefore, in this dissertation will be make analysis and realization the critical points in hardware design based on Xilinx FPGA. In this dissertation, the critical point of Hardware Design of FPGA will be described. It will include power source, impedance matching and clock circuit design. There are many hardware design tools used for hardware design including Altium Designer, Protel, Cadence and others. Compared with other design tools, Cadence will have more advantages. Therefore, in this dissertation, Cadence will be used as the design tool for hardware design analysis and realization. With the help of Cadence, one hardware design and signal transmission simulation will be made analysis. With the development of the micro-electronics technology and computer science, the hardware design about FPGA will be taken more and more attentions.

Memory Effect를 최소화한 C-대역 내부 정합 GaAs 전력증폭기

본 논문에서는 C-대역에서 입출력 정합 회로가 패키지에 내장된 10 W급 내부 정합 증폭기 설계 및 제작을 하였다. 전력증폭기 설계에 사용한 트랜지스터로 GaAs pHEMT bare-chip을 사용하였다. 트랜지스터 패드 위치와 커패시터 크기를 고려한 와이어 본딩 해석으로 정확도 높은 설계를 하였다. 패키지와 정합 회로를 함께 EM simulation하여 패키지가 정합 회로에 미치는 영향을 해석하였다. 2-tone 측정 시 memory effect로 인해 발생되는 IMD3의 비대칭성을 줄이기 위한 memory effect 감쇄 바이어스 회로를 제안 및 설계하였다. 측정 결과, 7.1~7.8 GHz 대역에서 <TEX>$P_{1dB}$</TEX>는 39.8~40.4 dBm, 전력 이득은 9.7~10.4 dB, 효율은 33.4~38.0 %을 얻었고, 제안된 memory effect 감쇄 바이어스 회로로 IMD3(Upper)와 IMD3(Lower)차는 0.76 dB 이하를 얻었다. In this paper, a C-band 10 W power amplifier with internally matched input and output matching circuit is designed and fabricated. The used power transistor for the power amplifier is GaAs pHEMT bare-chip. The wire bonding analysis considering the size of the capacitor and the position of transistor pad improves the accurate design. The matching circuit design with the package effect using EM simulation is performed. To reduce the unsymmetry of IMD3 in 2-tone measurement due to the memory effect, the bias circuit minimizing the memory effect is proposed and employed. The measured <TEX>$P_{1dB}$</TEX>, power gain, and power added efficiency are 39.8~40.4 dBm, 9.7~10.4 dB, and 33.4~38.0 %, respectively. Adopting the proposed bias circuit, the difference between the upper and lower IMD3 is less than 0.76 dB.

Design of Microstrip Lowpass-Bandpass Diplexer

The matching circuit design of a lowpass-bandpass diplexer may be a challenge in conventional designs because a wideband (from zero frequency to approximately the cutoff frequency of the lowpass filter) open condition is required to achieve in bandpass channel circuit. This paper proposes a new lowpass-bandpass diplexer that involves using a simple matching design that can easily meet the required matching condition in each channel circuit. The measured results are in good agreement with the simulated responses. For the lowpass channel, the measured in-band insertion loss and cutoff frequency are less than 0.25 dB and approximately 1.5 GHz, respectively. For the bandpass channel, the measured minimal insertion loss, center frequency, and 3 dB fractional bandwidth are approximately 2.42 dB, 2.4 GHz, and 7.6%, respectively. The measured isolation between the two operating bands is better than 35 dB.

High Accuracy Modeling Method of UTC-PD Photodiode

The high accuracy modeling is a prerequisite to study UTC-PD matching circuit design and power combining. This paper presents the high accuracy modeling method of UTC-PD photodiode. The measured frequency response curve of photoelectric conversion was used as a benchmark, and the model of the equivalent circuit was modified consistently in order to make the frequency response curve of the model fit the measured frequency response curve. This method addressed effectively the modeling issues of UTC-PD photodiode.

Topological Synthesis of Tree Shaped Structures Based on a Building Blocks Hypothesis

In this paper a new approach to evolutionary controlled creation of electronic circuit connection topology is proposed. Microwave circuits consisting of a tree like connection of ideal transmission lines are considered. Assuming that a reasonable number of transmission lines in a tree network ranges from 10 to 100, the number of connection combinations is immense. From the engineering practice comes the hypothesis that any device can be decomposed into some functional building blocks consisting of one to dozen transmission lines. The variety of linking combinations in a tree with a limited depth is confined to hundreds or thousands of shapes. Therefore we can decrease the dimensionality of research space, applying evolution to building blocks only. Evolutionary algorithm (EA) which processes simultaneously the population of λ functional blocks and population of μ circuits is proposed. A μ, λ selection scheme with tournament together with specific encoding of solutions, and custom operators is implemented. The μ, λ, α EA was tested on an example of the design of a microwave transistor matching circuit.

Approximate synthesis formulas for microstrip line with aperture in ground plane

Approximate closed-form expressions for the propagation characteristics of a microstrip line with a symmetrical aperture in its ground plane are reported in this article. Well-known expressions for the characteristic impedance of a regular microstrip line have been modified to incorporate the effect of this aperture. The accuracy of these expressions for various values of substrate thickness, permittivity and line width has been studied in detail by fullwave simulations. This has been further verified by measurements. These expressions are easier to compute and find immense use in the design of broadband filters, tight couplers, power dividers, transformers, delay lines, and matching circuits. A broadband filter with aperture in ground plane is demonstrated in this article. (c) 2011 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2012.

Using LDMOS Transistor in Class-F Power Amplifier For WCDMA Applications

The fundamental operating principle of a Class F power amplifier and the factors aiding or affecting Class F performance were explicated previously. A Class F power amplifier design which satisfies WCDMA specifications is explained in this paper. The Class F amplifier was designed by employing Motorola’s LDMOS (Laterally Diffused Metal Oxide Semiconductor) transistor models and we simulated its performance by means of ADS. A variety of procedures were applied in the process of designing Class F amplifier, namely, DC simulation, bias point selection, source-pull and load-pull characterization, input and output matching circuit design and the design of suitable harmonic traps, which are explained here.

Design of transmission line filters and matching circuits using genetic algorithms

AbstractA method for designing microwave filters and impedance matching circuits using transmission lines is presented. Transmission line filters with shunt‐connected open circuit stubs and continuously varying transmission line matching circuits are described in detail. The proposed method is based on genetic algorithms and can effectively be applied to various filter and matching circuit design problems without increasing theoretical and computational complexity. Design examples are provided, and the proposed method is demonstrated to be effective in designing transmission line filters and matching circuits. Copyright © 2007 Institute of Electrical Engineers of Japan. Published by John Wiley &amp; Sons, Inc.

Design and Verification of On-Chip Impedance-Matching Circuit Using Transmission-Line Theory for 2.4 GHz-Band Wireless Receiver Front-End

SUMMARY Recently, spiral inductors have widely been used instead of resistors in the design of matching circuits to enhance the thermal noise performance of a wireless transceiver. However, such elements usually have low quality factor (Q) and may encounter the self-resonance in microwave-frequency band which permits its use in higher frequencies, and on the other hand, they occupy the large on-chip space. This paper presents a new design theory for the impedance-matching circuits for a single-chip SiGe BiCMOS receiver front-end for 2.4 GHz-band wireless LAN (IEEE 802.11b). The presented matching circuits are composed of conductor-backed coplanar waveguide (CPW) meander-line resonators and impedance (K) inverter. The prototype front-end receiver is designed, fabricated and tested. A few of the measured results to verify the design theory

Design of HTS coplanar waveguide matching circuit for low noise CMOS-HTS receiver

For realizing a single chip HTS integrated microwave receiver, a superconducting slot antenna and a Si-CMOS low noise amplifier (LNA) combined with a broad band matching circuit composed of coplanar waveguide (CPW) meanderline resonators has been designed and tested. By applying the filter technique and using admittance inverters (J inverters), we propose a new design method of CPW broadband impedance matching circuit connected to low and high impedance loads such as HTS antenna and CMOS device. Based on the design method, we designed a Chebyshev type impedance matching circuit connecting with slot antenna and CMOS-LNA at 10 GHz center frequency. More over, in order to increase the antenna directivity, we designed 2-dimensional antenna array by folding the slot antenna.