Magnetic Random Access Memory Research Articles

Experimental demonstration of magnetic tunnel junction-based computational random-access memory

The conventional computing paradigm struggles to fulfill the rapidly growing demands from emerging applications, especially those for machine intelligence because much of the power and energy is consumed by constant data transfers between logic and memory modules. A new paradigm, called “computational random-access memory (CRAM),” has emerged to address this fundamental limitation. CRAM performs logic operations directly using the memory cells themselves, without having the data ever leave the memory. The energy and performance benefits of CRAM for both conventional and emerging applications have been well established by prior numerical studies. However, there is a lack of experimental demonstration and study of CRAM to evaluate its computational accuracy, which is a realistic and application-critical metric for its technological feasibility and competitiveness. In this work, a CRAM array based on magnetic tunnel junctions (MTJs) is experimentally demonstrated. First, basic memory operations, as well as 2-, 3-, and 5-input logic operations, are studied. Then, a 1-bit full adder with two different designs is demonstrated. Based on the experimental results, a suite of models has been developed to characterize the accuracy of CRAM computation. Scalar addition, multiplication, and matrix multiplication, which are essential building blocks for many conventional and machine intelligence applications, are evaluated and show promising accuracy performance. With the confirmation of MTJ-based CRAM’s accuracy, there is a strong case that this technology will have a significant impact on power- and energy-demanding applications of machine intelligence.

Mixed etching-oxidation process to enhance the performance of spin-transfer torque MRAM for high-performance computing

Spin-transfer torque magnetic random access memory (MRAM) devices have considerable potential for high-performance computing applications; however, progress in this field has been hindered by difficulties in etching the magnetic tunnel junction (MTJ). One notable issue is electrical shorting caused by the accumulation of etching by-products on MTJ surfaces. Attempts to resolve these issues led to the development of step-MTJs, in which etching does not proceed beyond the MgO barrier; however, the resulting devices suffer from poor scalability and unpredictable shunting paths due to asymmetric electrode structures. This paper outlines the fabrication of pillar-shaped MTJs via a four-step etching process involving reactive-ion etching, ion-beam etching, oxygen exposure, and ion-trimming. The respective steps can be cross-tuned to optimize the shape of the pillars, prevent sidewall redeposition, and remove undesired shunting paths in order to enhance MTJ performance. In experiments, the proposed pillar-MTJs outperformed step-MTJs in key metrics, including tunneling magnetoresistance, coercivity, and switching efficiency. The proposed pillar-MTJs also enable the fabrication of MRAM cells with smaller cell sizes than spin–orbit torque devices and require no external field differing from voltage-controlled magnetic anisotropy devices.

Efficient calculation of magnetocrystalline anisotropy energy using symmetry-adapted Wannier functions

Magnetocrystalline anisotropy, a crucial factor in magnetic properties and applications like magnetoresistive random-access memory, often requires extensive k-point mesh in first-principles calculations. In this study, we develop a Wannier orbital tight-binding model incorporating crystal and spin symmetries and utilize time-reversal symmetry to divide magnetization components. This model enables efficient computation of magnetocrystalline anisotropy. Applying this method to L10 FePt and FeNi, we calculate the dependence of the anisotropic energy on k-point mesh size, chemical potential, spin-orbit interaction, and magnetization direction. The results validate the practicality of the models to the energy order of 100[μeV/f.u.] for these systems.

Reconfigurable spintronic logic gate utilizing precessional magnetization switching

In traditional von Neumann computing architecture, the efficiency of the system is often hindered by the data transmission bottleneck between the processor and memory. A prevalent approach to mitigate this limitation is the use of non-volatile memory for in-memory computing, with spin–orbit torque (SOT) magnetic random-access memory (MRAM) being a leading area of research. In this study, we numerically demonstrate that a precise combination of damping-like and field-like spin–orbit torques can facilitate precessional magnetization switching. This mechanism enables the binary memristivity of magnetic tunnel junctions (MTJs) through the modulation of the amplitude and width of input current pulses. Building on this foundation, we have developed a scheme for a reconfigurable spintronic logic gate capable of directly implementing Boolean functions such as AND, OR, and XOR. This work is anticipated to leverage the sub-nanosecond dynamics of SOT-MRAM cells, potentially catalyzing further experimental developments in spintronic devices for in-memory computing.

A quantum sensing metrology for magnetic memories

Magnetic random access memory (MRAM) is a leading emergent memory technology that is poised to replace current non-volatile memory technologies such as eFlash. However, controlling and improving distributions of device properties becomes a key enabler of new applications at this stage of technology development. Here, we introduce a non-contact metrology technique deploying scanning NV magnetometry (SNVM) to investigate MRAM performance at the individual bit level. We demonstrate magnetic reversal characterization in individual, <60 nm-sized bits, to extract key magnetic properties, thermal stability, and switching statistics, and thereby gauge bit-to-bit uniformity. We showcase the performance of our method by benchmarking two distinct bit etching processes immediately after pattern formation. In contrast to ensemble averaging methods such as perpendicular magneto-optical Kerr effect, we show that it is possible to identify out of distribution (tail-bits) bits that seem associated to the edges of the array, enabling failure analysis of tail bits. Our findings highlight the potential of nanoscale quantum sensing of MRAM devices for early-stage screening in the processing line, paving the way for future incorporation of this nanoscale characterization tool in the semiconductor industry.

Existence of long-range magnetic order in Heisenberg spin nanoribbons with edge modification

Long-range magnetic order appears on a side decorated Heisenberg spin nanoribbon at nonzero temperature, although no spontaneous magnetization exists in a one- or two-dimensional isotropic Heisenberg model at any nonzero temperature according to the Mermin–Wagner theorem. By use of the spin Green’s function method, we calculated the magnetizations of Heisenberg nanoribbons decorated by side spins with single-ion anisotropy and found that the system exhibits a nonzero transition temperature, whether the decorated edge spins of the system link together or separate from each other. When the width of the nanoribbon achieves infinite limit, the transition temperatures of the system tend to the same finite constant eventually whether one edge or both edges are decorated by side spins in the nanoribbon. The results reveal that the magnetism of a low-dimensional spin system is different from that of a three-dimensional spin system. When the single-ion anisotropy of edge spins in a Heisenberg spin nanoribbon can be modulated by an electric field experimentally, various useful long-range magnetic orders of the system can be obtained. This work can provide a detailed theoretical basis for designing and fabricating next-generation low-dimensional magnetic random-access memory.

Micromagnetic modeling of double spin-torque magnetic tunnel junction devices

Emerging nonvolatile magnetoresistive random access memory exhibits high endurance and long data retention compared to flash memory. Additionally, devices with double spin torque magnetic tunnel junctions (dsMTJ) featuring two magnetic reference layers demonstrate enhanced torques, fast switching, and reduced switching currents. To accurately model these devices, we adopt a coupled spin and charge transport approach allowing to describe spin-transfer torques in metallic spin valves and magnetic tunnel junctions on equal footing. Our findings indicate the critical influence of metallic non-magnetic spacers (NMS) properties separating the free layer from the second reference layer on the switching speed improvement in dsMTJ devices.

Large Field-like Spin-Orbit Torque and Enhanced Magnetization Switching Efficiency Utilizing Amorphous Mo.

Spin-orbit torque magnetic random access memory (SOT-MRAM) has great promise in high write speed and low power consumption. Mo can play a vital role in constructing a CoFeB/MgO-based MRAM cell because of its ability to enhance the perpendicular magnetic anisotropy (PMA), thermal tolerance, and tunneling magnetoresistance. However, Mo is often considered as a less favorable candidate among SOT materials because of its weak spin-orbit coupling. In this study, we experimentally investigate the SOT efficiencies in Mo/CoFeB/MgO heterostructures over a wide range of Mo thicknesses and temperature. Decent damping-like SOT efficiency |ξDL| = 0.015 ± 0.001 and field-like SOT efficiency |ξFL| = 0.050 ± 0.001 are found in amorphous Mo. The ξFL/ξDL ratio is greater than 3. Furthermore, efficient current-induced magnetization switching is demonstrated with the critical current density comparable with heavy metal Ir and W. Our work reveals new understanding and possibilities for Mo as both an SOT source component and PMA buffer layer in the implementation of SOT-MRAMs.

Exploration and optimization of novel replacement and prefetching strategies for inefficiencies of advanced MRAM-based hybrid cache systems

Abstract With the emergence of cutting-edge hardware systems such as cloud computing, edge computing, and on-chip neural network accelerators, how to design advanced memory strategies to substitute the traditional ones for maximizing the potential performance of non-volatile memory (NVM) under the existing hardware conditions, has become an urgent research issue for both academia and industrial communities. It is promising and innovative to improve computer systems in the layer of data exchanging with the emerging advanced semiconductor devices. In the paper, to address the inefficiencies of write-intensive, high power consumption, low hit rate and so on, which exist in hybrid Magnetic Random Access Memory (MRAM) cache systems, three novel cache replacement strategies and two cache prefetching strategies are put forward. The proposed triple novel replacement strategies, including historical frequency and time judgments, duplicate data-aware deletion, and dynamic relevance factors computing, can be utilized to compensate for the shortcomings of the traditional Least Recently Used (LRU) replacement strategy, respectively. In the two novel prefetching strategies, region distribution parameters and Listnet ranking network are imported into the caching process, respectively, to achieve optimized hitting performance. The simulation results demonstrate that the proposed replacement strategies can achieve up to 61.76%, 84.91%, 56.49%, and 53.21% optimization of write count, hit rate, dynamic power, and IPC compared to the conventional one. The proposed prefetching strategy can achieve up to 91.27%, 49.25% hit rate and IPC optimization. Meanwhile, the synthetic evaluation of the replacement and prefetching strategies are elaborated in the paper, including multi-core characteristics, information entropy, interplays and the performance constraints between replacement and prefetching mechanism, which would facilitate more credible ideas for future memory inefficiencies management and strategy design.

Progress in Spin Logic Devices Based on Domain-Wall Motion.

Spintronics, utilizing both the charge and spin of electrons, benefits from the nonvolatility, low switching energy, and collective behavior of magnetization. These properties allow the development of magnetoresistive random access memories, with magnetic tunnel junctions (MTJs) playing a central role. Various spin logic concepts are also extensively explored. Among these, spin logic devices based on the motion of magnetic domain walls (DWs) enable the implementation of compact and energy-efficient logic circuits. In these devices, DW motion within a magnetic track enables spin information processing, while MTJs at the input and output serve as electrical writing and reading elements. DW logic holds promise for simplifying logic circuit complexity by performing multiple functions within a single device. Nevertheless, the demonstration of DW logic circuits with electrical writing and reading at the nanoscale is still needed to unveil their practical application potential. In this review, we discuss material advancements for high-speed DW motion, progress in DW logic devices, groundbreaking demonstrations of current-driven DW logic, and its potential for practical applications. Additionally, we discuss alternative approaches for current-free information propagation, along with challenges and prospects for the development of DW logic.

Spin-Orbit Torque Vector Quantification in Nanoscale Magnetic Tunnel Junctions.

Spin-orbit torques (SOT) allow ultrafast, energy-efficient toggling of magnetization state by an in-plane charge current for applications such as magnetic random-access memory (SOT-MRAM). Tailoring the SOT vector comprising of antidamping (TAD) and fieldlike (TFL) torques could lead to faster, more reliable, and low-power SOT-MRAM. Here, we establish a method to quantify the longitudinal (TAD) and transverse (TFL) components of the SOT vector and its efficiency χAD and χFL, respectively, in nanoscale three-terminal SOT magnetic tunnel junctions (SOT-MTJ). Modulation of nucleation or switching field (BSF) for magnetization reversal by SOT effective fields (BSOT) leads to the modification of SOT-MTJ hysteresis loop behavior from which χAD and χFL are quantified. Surprisingly, in nanoscale W/CoFeB SOT-MTJ, we find χFL to be (i) twice as large as χAD and (ii) 6 times as large as χFL in micrometer-sized W/CoFeB Hall-bar devices. Our quantification is supported by micromagnetic and macrospin simulations which reproduce experimental SOT-MTJ Stoner-Wohlfarth astroid behavior only for χFL > χAD. Additionally, from the threshold current for current-induced magnetization switching with a transverse magnetic field, we show that in SOT-MTJ, TFL plays a more prominent role in magnetization dynamics than TAD. Due to SOT-MRAM geometry and nanodimensionality, the potential role of nonlocal spin Hall spin current accumulated adjacent to the SOT-MTJ in the mediation of TFL and χFL amplification merits to be explored.

Highly Reliable Magnetic Memory-Based Physical Unclonable Functions.

Magnetic random-access memory (MRAM), which stores information through control of the magnetization direction, offers promising features as a viable nonvolatile memory alternative, including high endurance and successful large-scale commercialization. Recently, MRAM applications have extended beyond traditional memories, finding utility in emerging computing architectures such as in-memory computing and probabilistic bits. In this work, we report highly reliable MRAM-based security devices, known as physical unclonable functions (PUFs), achieved by exploiting nanoscale perpendicular magnetic tunnel junctions (MTJs). By intentionally randomizing the magnetization direction of the antiferromagnetically coupled reference layer of the MTJs, we successfully create an MRAM-PUF. The proposed PUF shows ideal uniformity and uniqueness and, in particular, maintains performance over a wide temperature range from -40 to +150 °C. Moreover, rigorous testing with more than 1584 challenge-response pairs of 64 bits each confirms resilience against machine learning attacks. These results, combined with the merits of commercialized MRAM technology, would facilitate the implementation of MRAM-PUFs.

Magnetization switching driven by spin current in a T-type ferromagnetic trilayer

The T-type CoFeB/spacer/CoFeB structure is a promising candidate for the development of perpendicular spin–orbit torque (SOT) magnetic random-access memory and other SOT devices. It consists of an in-plane magnetized layer, a perpendicularly magnetized layer, and a non-magnetic metal spacer that induces interlayer exchange coupling. By engineering the W spacer, this system achieves field-free SOT switching with a nearly 100% switching ratio. Furthermore, it realizes a high exchange coupling field of 255 Oe using a relatively thinner spacer thickness, enhancing the reliability and energy efficiency of SOT switching. Measurement of current switching probability suggests that this perpendicular magnetic anisotropy system may enable the implementation of probability-adjustable true random number generators in future applications. The T-type structures with strong interlayer coupling exhibit great potential for spintronic device applications.

Manufacturability Evaluation of Magnetic Tunnel Junction-Based Computational Random Access Memory

Manufacturability Evaluation of Magnetic Tunnel Junction-Based Computational Random Access Memory

The fabrication of spin transfer torque-based magnetoresistive random access memory cell with ultra-low switching power

We conducted research on the integration technology of a spin transfer torque-based magnetoresistive random access memory (STT-MRAM) cell (one transistor, one magnetic tunnel junction – 1T-1MTJ) on an 8-inch process platform. By combining a 0.5 μm CMOS front end of line process and STT-MTJ back end of line process, a 1T-1MTJ device with an MTJ of approximately 80 nm is realized. The Resistance(R)-magnetic field(H) measurement reveals a coercive force of approximately 450 Oe for the MTJ. Nevertheless, the 1T-1MTJ device exhibits a critical switching current of 4.7 μA (from high to low resistance state) and 17.9 μA (from low to high resistance state), accompanied by corresponding critical switching voltages of 0.05 V and 0.16 V, respectively, which is extremely low in an STT-MRAM with dual CoFeB/MgO interface free layer. Our findings demonstrate the potential for application in ultra-low-power portable mobile devices and embedded systems.

Current-Induced Magnetization Switching Behavior in Perpendicular Magnetized L10-MnAl/B2-CoGa Bilayer

Rare-earth-free Mn-based binary alloy L10-MnAl with bulk perpendicular magnetic anisotropy (PMA) holds promise for high-performance magnetic random access memory (MRAM) devices driven by spin-orbit torque (SOT). However, the lattice-mismatch issue makes it challenging to place conventional spin current sources, such as heavy metals, between L10-MnAl layers and substrates. In this work, we propose a solution by using the B2-CoGa alloy as the spin current source. The lattice-matching enables high-quality epitaxial growth of 2-nm-thick L10-MnAl on B2-CoGa, and the L10-MnAl exhibits a large PMA constant of 1.04 × 106 J/m3. Subsequently, the considerable spin Hall effect in B2-CoGa enables the achievement of SOT-induced deterministic magnetization switching. Moreover, we quantitatively determine the SOT efficiency in the bilayer. Furthermore, we design an L10-MnAl/B2-CoGa/Co2MnGa structure to achieve field-free magnetic switching. Our results provide valuable insights for achieving high-performance SOT-MRAM devices based on L10-MnAl alloy.

Memory-compatible perpendicular magnetic tunnel junctions under bi-directional strobe write pulses: A method for generating true random number bits at high speed

We propose an operation method of generating true random number bits with a perpendicular magnetic tunnel junction (pMTJ) already in use as a memory element in spin-transfer-torque driven magnetic random access memory technology. This method uses a set of regularly spaced (or intentionally irregularly spaced), minimum width, and bi-directional fast strobe-write pulses, with read operations after each write. The resulting bit-stream’s statistical properties are analyzed, and a few digital logic operation following the read is described that could significantly improve the resulting bit-streams variance and stability, insulating those from the raw variations of pMTJs.

Advanced Modeling and Simulation of Multilayer Spin-Transfer Torque Magnetoresistive Random Access Memory with Interface Exchange Coupling.

In advancing the study of magnetization dynamics in STT-MRAM devices, we employ the spin drift-diffusion model to address the back-hopping effect. This issue manifests as unwanted switching either in the composite free layer or in the reference layer in synthetic antiferromagnets-a challenge that becomes more pronounced with device miniaturization. Although this miniaturization aims to enhance memory density, it inadvertently compromises data integrity. Parallel to this examination, our investigation of the interface exchange coupling within multilayer structures unveils critical insights into the efficacy and dependability of spintronic devices. We particularly scrutinize how exchange coupling, mediated by non-magnetic layers, influences the magnetic interplay between adjacent ferromagnetic layers, thereby affecting their magnetic stability and domain wall movements. This investigation is crucial for understanding the switching behavior in multi-layered structures. Our integrated methodology, which uses both charge and spin currents, demonstrates a comprehensive understanding of MRAM dynamics. It emphasizes the strategic optimization of exchange coupling to improve the performance of multi-layered spintronic devices. Such enhancements are anticipated to encourage improvements in data retention and the write/read speeds of memory devices. This research, thus, marks a significant leap forward in the refinement of high-capacity, high-performance memory technologies.

Toward Energy-efficient STT-MRAM-based Near Memory Computing Architecture for Embedded Systems

Convolutional Neural Networks (CNNs) have significantly impacted embedded system applications across various domains. However, this exacerbates the real-time processing and hardware resource-constrained challenges of embedded systems. To tackle these issues, we propose spin-transfer torque magnetic random-access memory (STT-MRAM)-based near memory computing (NMC) design for embedded systems. We optimize this design from three aspects: Fast-pipelined STT-MRAM readout scheme provides higher memory bandwidth for NMC design, enhancing real-time processing capability with a non-trivial area overhead. Direct index compression format in conjunction with digital sparse matrix-vector multiplication (SpMV) accelerator supports various matrices of practical applications that alleviate computing resource requirements. Custom NMC instructions and stream converter for NMC systems dynamically adjust available hardware resources for better utilization. Experimental results demonstrate that the memory bandwidth of STT-MRAM achieves 26.7 GB/s. Energy consumption and latency improvement of digital SpMV accelerator are up to 64× and 1,120× across sparsity matrices spanning from 10% to 99.8%. Single-precision and double-precision elements transmission increased up to 8× and 9.6×, respectively. Furthermore, our design achieves a throughput of up to 15.9× over state-of-the-art designs.

Field-Free Spin-Orbit Torque Magnetization Switching in a Perpendicularly Magnetized Semiconductor (Ga,Mn)As Single Layer.

Current-induced spin-orbit torque (SOT) in a perpendicularly magnetized single layer has a strong potential to switch the magnetization using an extremely low current density, which is generally 2-3 orders of magnitude smaller than that required for conventional metal bilayer systems. However, an in-plane external magnetic field has to be applied to break the symmetry and achieve deterministic switching. To further enhance the high-density integration and accelerate the practical application of highly efficient SOT magnetic random-access memory (SOT-MRAM) devices, field-free SOT magnetization switching in a ferromagnetic single layer is strongly needed. In a spin-orbit ferromagnet (a ferromagnet with strong spin-orbit interaction) with crystal inversion asymmetry and a multi-domain structure, the internal Dzyaloshinskii-Moriya effective fields are considered to induce field-free switching. Here, combined with strong spin-orbit coupling and a tilted anisotropy axis induced by a nonuniform Mn distribution and a possible magnetocrystalline anisotropy resulting from a slight substrate tilting, we successfully achieve magnetization switching in a spin-orbit ferromagnet (Ga,Mn)As single layer by utilizing SOT without applying any external magnetic field. Our findings help to deeply elucidate the SOT switching mechanism and can advance the development of a highly efficient MRAM with better scalability.