Macaroni Channel Research Articles

Modeling of Threshold Voltage Shift by Neighboring Transistors for Macaroni Channel MOSFETs in Series

Modeling of Threshold Voltage Shift by Neighboring Transistors for Macaroni Channel MOSFETs in Series

Hetero-dielectric macaroni channel cylindrical gate all around field effect transistor (HD-MC CGAA FET) for reduced gate leakage analog applications

Hetero-dielectric macaroni channel cylindrical gate all around field effect transistor (HD-MC CGAA FET) for reduced gate leakage analog applications

An inner gate as enabler for vertical pitch scaling in macaroni channel gate-all-around 3-D NAND flash memory

Scaling the vertical cell pitch to increase bit density in 3-D NAND flash memories degrades both the cell transistor characteristics and the memory operation. Here, we therefore investigate an inner gate to mitigate the scaling impact in macaroni channel devices. We evaluate several scenarios with varying complexity using calibrated TCAD simulations: from keeping the inner gate voltage grounded to coupling it to the read gate. We find a trade-off between improved cell transfer characteristics and program voltage determined by the inner gate to read gate coupling ratio.

A Potential Model of Triple Macaroni Channel MOSFETs in Subthreshold Region

Macaroni channel structure is used popularly in 3-D NAND flash memory where the memory cells are connected in series. A model of inner potential in the subthreshold regime for the whole string of three transistors is presented and verified with the TCAD simulations. By using this model, the operation of the string and the interaction between transistors are investigated. Relative position dependence between transistors is also investigated. The obtained model can be used to predict the interference effect and be helpful in the design of the 3-D NAND flash memory cell.

Impact of Mechanical Stress on 3-D NAND Flash Current Conduction

This work experimentally investigates current conduction in 3-D NAND under up to 7 GPa of externally applied compressive mechanical stress. The impact of channel crystallinity and geometry is studied by comparing four types of Si channels: polycrystalline full channel, single-crystal full channel, polycrystalline macaroni channel, and single-crystal macaroni channel. In the studied channel types, the mechanical stress was found to cause reversible degradation of <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> (up to one order of magnitude) and <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> (up to seven orders of magnitude). Using TCAD simulations, <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON </sub> and <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> deterioration are attributed to carrier mobility and Si bandgap decreases under mechanical stress, respectively. The simulations also suggest that both effects depend on the channel morphology, which results in a different extent of stress impact on the four studied types of Si channels.

Models of Threshold Voltage and Subthreshold Slope for Macaroni Channel MOSFET

Models of threshold voltage and subthreshold slope (SS) for macaroni channel MOSFET are built for the first time based on the potential model in our previous work. These models clearly illustrate the variations of threshold voltage and subthreshold slope caused by short-channel-effects when changing gate length, silicon thickness, oxide thickness, channel doping concentration, and drain-to-source bias. The good agreements between simulations and models verified the validity of those models.

Correction to “Characteristic Length of Macaroni Channel MOSFET” [Nov 19 1720-1723

Correction to “Characteristic Length of Macaroni Channel MOSFET” [Nov 19 1720-1723

Characteristic Length of Macaroni Channel MOSFET

A model of characteristic length for a macaroni MOSFET is introduced for the first time by deriving the two-dimensional Poisson’s equation. By using the model of characteristic length describing the potential distribution, we presented the advantage of the thinner silicon channel structure in the sub-threshold region. The models of inner potential and surface potential are compared to the results from simulations and an agreement are observed. The models are useful for deriving sub-threshold characteristics and also for device design.

Effects of the Grain Boundary and Interface Traps on the Electrical Characteristics of 3D NAND Flash Memory Devices.

Three-dimensional (3D) NAND flash memory devices having a poly-silicon channel with grain boundaries, the cylindrical macaroni channel being outside the inter-oxide filler layer and inside the tunneling oxide layer, were evaluated. The effects of the grain size, grain boundary trap density, and interface trap density at the interfaces between the channel and the oxide layers on the electrical characteristics of 3D NAND flash memory devices were investigated. The electron density of the channel was changed depending on the grain boundary trap density and the position of the grain boundary trap in the channel. The grain boundary traps increased the potential barrier and decreased the electron density of the channel. The threshold voltage increased with increasing grain boundary trap density and interface trap density.