The ferroelectric field-effect transistor (FEFET) is an emerging nonvolatile memory technology that can offer ultra-scalability, fast operation, and reduced power consumption. However, a limited understanding of FEFET physics poses challenges for optimum device design. In this article, we provide physical insights into the operation of FinFET-based FEFETs (FEFinFETs) using a phase-field framework built on time-dependent Landau–Ginzburg (TDGL) thermodynamic theory. We exploit the source–drain fringing field to stabilize a monodomain configuration in the OFF state of short channel FEFinFETs. Based on recent experiments, we first analyze the switching dynamics of FEFinFETs with low remnant polarization ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${P}_{r}$ </tex-math></inline-formula> ) and high coercive field ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${E}_{c}$ </tex-math></inline-formula> ) hafnium zirconium oxide (HZO) FE. We find that the switching in these FEFinFETs occurs via domain nucleation and growth from the gate metal edges at the source–drain spacers. We also show that a non-zero drain bias can be used for dynamically modulating the memory window (MW) of FEFinFET to lower its power consumption. Furthermore, we find the spacer permittivity to be a crucial design parameter to control the MW and show that a lower spacer permittivity can significantly increase the MW. Finally, we show that the commonly held idea that a large <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${P}_{r}$ </tex-math></inline-formula> leads to a large MW is not always valid. For a large <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${P}_{r}$ </tex-math></inline-formula> , the formation of multiple domains in the FE layer can lead to a significant reduction in the MW. In addition, these devices can suffer from low write endurance due to exposure of the interfacial oxide layer to high electric fields.