Low-voltage Integrated Circuit Research Articles

Learning on Proposal and Optimization of Stumpy Influence CMOS Transconductance Operational Amplifier

Portable systems, such as wireless communication systems, laptops, smart phones, consumer electronics, and implanted medical devices, are in high demand in the rapidly expanding consumer market. When it comes to extending the running duration of these portable devices, low-power and low-voltage integrated circuits are used almost universally to achieve this. The design of an analogue integrated circuit with somewhat excellent processing characteristics, when compared to its digital equivalent, is a difficult undertaking, especially when it comes to applications requiring low voltage and low power. The use of a digitally driven CMOS technology for the design of an analogue circuit equivalent has increased the difficulty of the difficulties in today's environment. Because of this, the design of ultra-low power analogue circuits has become the bottleneck in the contemporary Complementary Metal Oxide Semiconductor (CMOS) technology. This thesis analyses some of the frequently utilised low power design strategies, which are specifically suited for analogue circuits and are being widely adopted. In today's electronic age, it is necessary to build competitive analogue integrated circuits in order to stay up with the high performance digital integrated circuits that are now available. Since its invention, the amplifier has played a critical role in the design of the vast majority of analogue integrated circuits. Despite this, the performance of the amplifier is what distinguishes the majority of analogue circuits such as converters, filters, and tracking circuits.

A Customized Integrated Circuit for Active EMI Filter With High Reliability and Scalability

This article proposes an active electromagnetic interference (EMI) filter (AEF) realized by a customized integrated circuit (IC) to reduce conducted emission noises. A fully transformer-isolated feedforward current-sense current-compensation structure is selected as a base topology of the AEF. To achieve the high reliability of the proposed AEF by using low-voltage IC devices, the injection transformer is added to protect IC devices from high-voltage hazards. The operation of the proposed AEF is theoretically demonstrated, and practical design guidelines for the IC part and nearby components are developed. The designed IC was fabricated by a 0.18 μm bipolar-CMOS-DMOS process. The fabricated IC is implemented in a compact printed circuit board for application to a three-phase inverter motor system. The performance, stability, and surge immunity of the AEF are experimentally demonstrated. A designed 1stage AEF achieves better noise-attenuation performance than 2stage passive EMI filters (PEFs) over 6 dB at 150 kHz without critical resonance peak at the high-frequency range. Weak points of the conventional PEFs in both low and high frequencies are effectively improved by using the proposed 1stage AEF. In addition, the surge immunity of the designed IC within the AEF is validated under numerous 5 kV surge tests.

Robust and Latch-Up-Immune LVTSCR Device with an Embedded PMOSFET for ESD Protection in a 28-nm CMOS Process

Low-voltage-triggered silicon-controlled rectifier (LVTSCR) is expected to provide an electrostatic discharge (ESD) protection for a low-voltage integrated circuit. However, it is normally vulnerable to the latch-up effect due to its extremely low holding voltage. In this paper, a novel LVTSCR embedded with an extra p-type MOSFET called EP-LVTSCR has been proposed and verified in a 28-nm CMOS technology. The proposed device possesses a lower trigger voltage of ~ 6.2 V and a significantly higher holding voltage of ~ 5.5 V with only 23% degradation of the failure current under the transmission line pulse test. It is also shown that the EP-LVTSCR operates with a lower turn-on resistance of ~ 1.8 Ω as well as a reliable leakage current of ~ 1.8 nA measured at 3.63 V, making it suitable for ESD protections in 2.5 V/3.3 V CMOS processes. Moreover, the triggering mechanism and conduction characteristics of the proposed device were explored and demonstrated with TCAD simulation.

Design techniques for low-voltage analog integrated circuits

Abstract In this paper, a review and analysis of different design techniques for (ultra) low-voltage integrated circuits (IC) are performed. This analysis shows that the most suitable design methods for low-voltage analog IC design in a standard CMOS process include techniques using bulk-driven MOS transistors, dynamic threshold MOS transistors and MOS transistors operating in weak or moderate inversion regions. The main advantage of such techniques is that there is no need for any modification of standard CMOS structure or process. Basic circuit building blocks like differential amplifiers or current mirrors designed using these approaches are able to operate with the power supply voltage of 600 mV (or even lower), which is the key feature towards integrated systems for modern portable applications.

Novel technique for lateral high‐voltage totem‐pole power devices

A novel technique and related structure for a high-voltage integrated circuit (IC) with totem-pole high-voltage devices are proposed. In this technique, a low control voltage with respect to the tub is used to drive the high-side device in the totem pole through a low-voltage tub circuit, as well as through very small low-side device to drive a low-voltage ground circuit, which in turn drives the low-side device in the totem pole. Therefore, the high-voltage level-shifting circuit can be replaced by the tub circuit which takes only a very small area and has no parasitic effects in comparison with that in the conventional totem-pole high-voltage IC. The structure of low-voltage power supplies for low-voltage ICs is also proposed. The results of numerical simulation verify the applicability of the proposed structure.

Flexible and low-voltage integrated circuits constructed from high-performance nanocrystal transistors

Colloidal semiconductor nanocrystals are emerging as a new class of solution-processable materials for low-cost, flexible, thin-film electronics. Although these colloidal inks have been shown to form single, thin-film field-effect transistors with impressive characteristics, the use of multiple high-performance nanocrystal field-effect transistors in large-area integrated circuits has not been shown. This is needed to understand and demonstrate the applicability of these discrete nanocrystal field-effect transistors for advanced electronic technologies. Here we report solution-deposited nanocrystal integrated circuits, showing nanocrystal integrated circuit inverters, amplifiers and ring oscillators, constructed from high-performance, low-voltage, low-hysteresis CdSe nanocrystal field-effect transistors with electron mobilities of up to 22 cm(2) V(-1) s(-1), current modulation >10(6) and subthreshold swing of 0.28 V dec(-1). We fabricated the nanocrystal field-effect transistors and nanocrystal integrated circuits from colloidal inks on flexible plastic substrates and scaled the devices to operate at low voltages. We demonstrate that colloidal nanocrystal field-effect transistors can be used as building blocks to construct complex integrated circuits, promising a viable material for low-cost, flexible, large-area electronics.

A Low-Voltage Current-Mode Wheatstone Bridge using CMOS Transistors

This paper presents a new circuit arrangement for a current-mode Wheatstone bridge that is suitable for low-voltage integrated circuits implementation. Compared to the other proposed circuits, this circuit features severe reduction of the elements number, low supply voltage (1V) and low power consumption (<350uW). In addition, the circuit has favorable nonlinearity error (<0.35%), operate with multiple sensors and works by single supply voltage. The circuit employs MOSFET transistors, so it can be used for standard CMOS fabrication. Simulation results by HSPICE show high performance of the circuit and confirm the validity of the proposed design technique. Keywords—Wheatstone bridge, current-mode, low-voltage, MOS.

Dual Low-Voltage IC Design for High-Voltage Floating Gate Drives

An integrated circuit (IC) design for low and high side gate drive in high-voltage applications is presented based on use of two identical low-voltage ICs that provide a low cost alternative to existing high-voltage IC floating gate drivers. The approach uses a single external coupling capacitor between the two ICs with on-chip circuitry to provide charge pump power supply and on/off signaling. Design details are given for each of the core blocks of a custom IC prototype fabricated in a 20-V 0.8- mum CMOS process. Experimental results are presented demonstrating successful drive of a 200-V half-bridge with an electronic ballast and 32-W linear fluorescent lamp load.

An Improved Bidirectional SCR Structure for Low-Triggering ESD Protection Applications

An improved dual-polarity silicon-controlled rectifier (SCR) device has been proposed and realized in a 0.6-mum bipolar complementary metal-oxide-semiconductor process. The device can be used to protect electrostatic discharge (ESD) in both the positive and negative directions on pins with a voltage range that goes below ground. Comparing with the conventional bidirectional SCR structures, the new device is more suitable for low-voltage integrated circuit ESD protection applications because it possesses a smaller trigger voltage, a smaller leakage current, and a larger holding voltage.

A 4-/spl mu/a quiescent-current dual-mode digitally controlled buck converter IC for cellular phone applications

This paper describes a dual-mode digitally controlled buck converter IC for cellular phone applications. An architecture employing internal power management is introduced to ensure voltage compatibility between a single-cell lithium-ion battery voltage and a low-voltage integrated circuit technology. Special purpose analog and digital interface elements are developed. These include a ring-oscillator-based A/D converter (ring-ADC), which is nearly entirely synthesizable, is robust against switching noise, and has flexible resolution control, and a very low power ring-oscillator-multiplexer-based digital pulse-width modulation (PWM) generation module (ring-MUX DPWM). The chip, which includes an output power stage rated for 400 mA, occupies an active area 2 mm/sup 2/ in 0.25-/spl mu/m CMOS. Very high efficiencies are achieved over a load range of 0.1-400 mA. Measured quiescent current in PFM mode is 4 /spl mu/A.

Accurate active-feedback CMOS cascode current mirror with improved output swing

An improved active-feedback CMOS cascode current mirror is introduced which has a very accurate current reflection ratio, while achieving the same output impedance as that of an equivalent conventional active-feedback cascode current mirror (CAFCCM) and a wider and optimal output dynamic range. The design can be made with even lower power consumption than CAFCCM and similar chip area. The technique can also be implemented in bipolar and BiCMOS integrated circuit design. The new structure does not need an additional constant current source as CAFCCM does. With these features, the circuit is suitable for use in high precision analogue integrated circuit design; especially in design of currentmode and low-voltage integrated circuits.