Low-temperature Si Buffer Research Articles

Reduction of dislocation density in mismatched SiGe/Si using a low-temperature Si buffer layer

The reduction of the dislocation density in relaxed SiGe/Si heterostructures using a low-temperature Si(LT-Si) buffer has been investigated. We have shown that a 0.1 μm LT-Si buffer reduces the threading dislocation density in mismatched Si0.85Ge0.15/Si epitaxial layers as low as ∼104 cm−2. Samples were grown by both gas-source molecular beam epitaxy and ultrahigh vacuum chemical vapor deposition.

Characterization of mismatched SiGe grown on low temperature Si buffer layers by molecular beam epitaxy

Several types of buffer layer structures, including superlattice and step-graded layers, have been employed to reduce the threading dislocation in SiGe epitaxial layers. A new technique, using a 0.1 μm thick Si buffer grown at 450°C by molecular beam epitaxy, provides the best results. For a 0.5 μm thick Si 0.85 Ge 0.15 layer, the dislocation density is ≤ 10 5 cm -2 . Hall measurements indicate an improvement in the hole mobility of a 1 μm thick Boron doped Si 0.7 Ge 0.33 layer. A SiGe/Si heterojunction bipolar transistor has been fabricated exploiting the low temperature Si buffer. Transmission electron microscopy of the structure does not indicate any evidence of threading dislocations.

Low-temperature buffer layer for growth of a low-dislocation-density SiGe layer on Si by molecular-beam epitaxy

A method using a low-temperature Si (LT-Si) buffer layer is developed to grow a SiGe epilayer with low density of dislocations on a Si substrate by molecular-beam epitaxy. In this method, a LT-Si layer is used to release the stress of the SiGe layer. The samples have been investigated by x-ray double-crystal diffraction and transmission electron microscopy. The results indicate that the LT-Si is effective to release the stress and suppress threading dislocations.