Low-temperature poly-Si TFTs Research Articles

Suppressing Drain-Induced Barrier Lowering and Kink Effect in Low-Temperature Poly-Si TFTs Using a Partitioned Light Shield

Anomalous drain-induced barrier lowering (DIBL) is observed in n-type low-temperature polycrystalline silicon thin-film transistors (LTPS TFTs) with a full light shield (LS) structure. Drain current versus gate voltage curves exhibit a threshold voltage (V_TH) shift and hump effect as the drain bias increases, and demonstrate the unsaturated output property. Because of the inherent grain boundary and grain protrusion of LTPS TFTs, considerable impact ionization occurs, thus generating electron–hole pairs when operated at high current, leading to a floating body effect, that confers the occurrence of the kink effect. However, the unsaturated current characteristic is induced by the LS because of its coupling potential of the LS. Therefore, partitioned LS structures are proposed to further improve the DIBL and weak the kink effect.

低温poly-Si TFT-LCDドライバ用オフセットキャンセラー

低温poly-Si TFT-LCDドライバ用オフセットキャンセラー

High-performance poly-Si thin film transistors with highly biaxially oriented poly-Si thin films using double line beam continuous-wave laser lateral crystallization

Highly biaxially oriented poly-Si thin films were formed by double-line beam continuous-wave laser lateral crystallization (DLB-CLC). The crystallinities of the DLB-CLC poly-Si thin films were (110), (111), and (211) for the laser scan, transverse, and surface directions, respectively, and an energetically stable Σ3 grain boundary was observed to be dominant. All silicon grains were elongated in the laser scan direction and one-dimensionally very large silicon grains with lengths of more than 100 µm were fabricated. Using these biaxially oriented polycrystalline silicon (poly-Si) films, low-temperature poly-Si TFTs (LTPS-TFTs) were fabricated at low temperatures (≦550 °C) by a metal gate self-aligned process. As a result, a TFT with a high electron field effect mobility of μFE = 450 cm2 V−1 s−1 in a linear region was realized.

Degradation of p-Channel Low Temperature Poly-Si TFTs with Positive Source Pulse Stress

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Degradation of n-channel low temperature poly-Si TFTs dynamically stressed in OFF region with positive drain bias

The degradation characteristics of n-channel low temperature poly-Si thin film transistors (LTPS TFTs), which are alternately stressed in OFF region with drain positively biased and source grounded, are investigated. In this research, rectangular pulse signals, dynamically changing from −18 to 0 V with varied parameters such as rising time, falling time, and frequency, are applied to the gate terminal, and the drain is simultaneously biased at +5 V to stress the LTPS TFTs and examined the deterioration. It is observed that the degradation strongly depends on the frequency and rising time rather than the falling time of AC signals. As the gate voltage transitionally changes in the rising period, the accumulated holes should be swept out and flow into the source terminal, resulting from the drain with positively biased and the floating body structure of TFTs. A degradation model of the parasitic BJT, based on the flowing direction of a sampling current I d, is proposed to explain the degradation mechanism of LTPS TFTs, and demonstrated by two electrical measurements, C–V curves and saturated forward and reverse I d– V g transfer curves.

38.1: A Novel 2‐Stage Analog Amplifier with Self‐Compensated Current Loads using Low Temperature Poly‐Si (LTPS) TFTs for Flat Panel Displays

AbstractA novel 2‐stage analog amplifier with self‐compensated p‐type current loads for LTPS TFT‐LCDs is proposed. The proposed 2‐stage analog buffer has three phases for compensation. The first and second compensation phases are self‐compensation for the p‐type TFT active loads and third compensation phase is typical auto‐zeroing compensation for a 2‐stage buffer. This method can suppress the offset voltage generated by the mismatch of the current loads and input differential pair. We fabricated the proposed buffer using LTPS TFTs and measured its electrical characteristics. The measured maximum offset voltage is 10mV for the full output voltage to range.

Variation and mismatch effects of the low-temperature poly-Si TFTs on the circuit for the X-ray active matrix sensor

The application of the capability of low-temperature poly-Si TFT circuits for high resolution X-ray active matrix sensor is explored. The integration of poly-Si TFT circuits on the glass enables an easy connection for the sensor array with fine pixel pitch. A novel charge sensitive amplifier circuit employing poly-Si TFTs is proposed for the readout system of the active matrix sensor. It can considerably increase the circuit’s immunity to the unavoidable threshold voltage variations of the poly-Si TFTs. The V TH mismatch effect of the TFTs, which results in the offset voltage of the charge amplifier, can also be suppressed by the proposed circuit. However, the noise arisen from the V TH mismatch can be even larger than that from the V TH variation after compensation. It reflects that, for higher bit digital X-ray image sensors, the mismatch effect of the devices must be properly taken into consideration.

Area laser crystallized LTPS TFTs with implanted contacts for active matrix OLED displays

We have developed a four mask low temperature poly-Si (LTPS) TFT process for p- and n-channel devices. Our PECVD deposited amorphous silicon is recrystallized to polycrystalline silicon with single area excimer laser crystallization while formation of drain and source is carried out with self aligned ion beam implantation. We have investigated implantation parameters, suitability of various metallizations as well as laser activation and annealing procedures. To prove the potential capability of our devices, which are suitable for conventional and inverted OLEDs alike, we have produced several functional active matrix backplanes implementing different pixel circuits. Our active matrix backplane process has been customized to drive small molecules as well as polymers, regardless if top or bottom emitting.

Device Performance and Reliability of Fully Developed SOI Transistors and Low-Temperature Poly-Si TFTs

The device performance and reliability of the SOI TFTs and the LTPS-TFTs were compared. Changing channel material from single-crystal Si to ELA poly-Si reduces mobility by 75%, and changing gate oxide material from thermal oxide to CVD oxide enhances current degradation due to hot carrier stress by almost ten times. To improve performance, selectively enlarging laser crystallization (SELAX) process which realizes poly-Si films with large grain and smooth surface has been developed. The mobility of SELAX-TFTs is twice of conventional LTPS-TFTs. To fabricate high quality interfacial layer at the interface between the gate oxide layers and the channel layers, cyclic deposition with O2 plasma treatment (C-DOP) process has been also developed. The lifetime of hot carrier degradation was extended by tenth using the C-DOP process.

MONOS memory in sequential laterally solidified low-temperature poly-Si TFTs

A metal-oxide-nitride-oxide-polysilicon (MONOS) memory device fabricated by sequential lateral solidified (SLS) low-temperature polycrystalline silicon (poly-Si) technology on a glass substrate was investigated. The Si protrusions at grain boundaries (GBs) as a result of the SLS process can be well controlled and located along the width direction of the transistor. Protrusions at the GBs are utilized as emitting source to achieve a MONOS memory device with low operation voltage (/spl les/ 20 V), fast program/erase time, and wide V/sub th/ window by field-enhanced channel hot electron injection for programming and field-enhanced band-to-band tunneling-induced hot hole injection for erase. This is the first study to demonstrate a nonvolatile memory device in low-temperature poly-Si thin-film transistor (LTPS TFT) technology, which can be integrated with TFT-liquid crystal display, to reduce power consumption for mobile applications.

21.2: A Low-Voltage P-type Poly-Si Integrated Driving Circuits for Active Matrix Display

A low power poly-Si gate and data driver circuits employing p-type low temperature poly-Si (LTPS) TFTs are proposed and verified by simulation and measurement. We have designed a 5V driven p-type level-shifter and it achieves a wide range output of ∼8∼10V. A new p-type latch employing complementary clock compensation is proposed and the latch stores the low voltage (5V) data bits (D and D') without an output voltage loss. A simple and new source-follower type poly-Si analog buffer with fast charging is also designed and measured. P-type poly-Si fully integrated circuits on glass substrates may provide cost benefits and improve panel reliability.

Field-sequential smectic LCD with twin-gate-TFT pixel amplifiers

A field-sequential color (FSC) smectic LCD using low-temperature poly-Si TFTs has been developed. An active-load, twin-gate TFT pixel amplifier is used to drive a V-shaped-switching smectic LC without voltage fluctuation. In our 1.3-in. diagonal, VGA, prototype, the pixel pitch is 41 μm, and the aperture ratio is 55%. The backlight consists of five banks of 3-color LEDs. The optical response time for a color field frequency of 180 Hz is 300 μs. This LCD can display high-quality motion-picture images. We also discuss the color purity and the optical efficiency of various FSC LCDs.

Hot-carrier-induced degradation of threshold voltage in p -channel low-temperature poly-Si TFTs

Threshold voltage shifts showed different behaviour under strong and weak current saturation stress owing to different degradation mechanisms. Under strong saturation stress, ΔVt showed a tendency to saturate with the stress time, whereas under weak saturation stress, the device degradation continued to increase in the case of the longer stress time. In the case of the longer term stress, the degradation under weak saturation stress could be more serious than that under strong saturation stress.

P‐3: Improving Reliability of Low‐Temperature Poly‐Si TFTs by Nitrous Oxide Plasma Treatment

AbstractThe interface of poly‐Si thin film and gate oxide of poly‐Si TFTs were treated by N2O to reduce trap state density. The poly‐Si TFTs with and without treatment were characterized and compared. Electrical stress and thermal stability tests were also carried out for these TFTs. Results showed that the performance of poly‐Si TFTs with nitrous oxide treatment was improved significantly.

Electrical characteristics of polycrystalline silicon thin film transistors using the Cu-field aided lateral crystallization process

Polycrystalline silicon thin film transistors (poly-Si TFTs) were fabricated on glass substrate by using a concept of Cu-field aided lateral crystallization (Cu-FALC). The crystallization of a-Si was significantly enhanced when an electric field of 30 V/cm was applied to selectively Cu-deposited amorphous silicon (a-Si) film during thermal annealing at 500 °C for 3 h. These FALC TFTs using Cu exhibited a low off-state leakage current of 6.2 ×10−12 A at Vg=−10 V and a maximum on/off current ratio of 3.1×105. The field-effect mobility and the threshold voltage of the fabricated poly-Si TFT were about 22.0 cm2/V s and 3.9 V, respectively. Therefore, the possibility of high-performance and low-temperature (<500 °C) poly-Si TFTs was demonstrated by using Cu-FALC technology.

27.5: Late News Paper: A 130‐ppi, Full‐Color Polymer OLED Display Fabricated Using an Ink‐jet Process

AbstractWe have succeeded in developing the highest resolution full‐color polymer OLED display to date. A newly developed, original ink‐jet patterning system for OLEDs combined with an optimized ink material and OLED fabrication process have achieved a uniform polymer thin film on a special substrate. The OLEDs, driven by low temperature poly‐Si TFTs, offer 6‐bit full‐color for each color. Consequently, they enabled us to produce a display having uniform emission over a 2.1‐inch diagonal display area, excellent color reproduction quality, and a sharp, clear image.

Low‐temperature poly‐Si TFT transferred onto plastic substrates by using surface free technology by laser ablation/annealing (SUFTLA®)

Abstract—A novel technology that makes it possible to transfer electronic devices from an original substrate to another substrate is introduced. Because laser irradiation is utilized during the transfer process, this technology was named SUFTLA® (surface free technology by laser ablation/annealing). Low‐temperature poly‐Si TFTs first manufactured on a quartz substrate were transferred onto a PES substrate without any damage or characteristic degradation. A trial TFT‐LCD device with peripheral integrated driver circuits was also transferred onto the PES substrate and their operation was observed under typical conditions. These results indicate that the SUFTLA technology is one of the leading candidates for fine‐patterned high‐performance electronic‐device manufacturing on flexible substrate.

マルチDAC内蔵5"SVGA低温ポリシリコンTFT-LCD

マルチDAC内蔵5"SVGA低温ポリシリコンTFT-LCD

Performance of high‐efficiency AMOLED displays

Abstract— In this paper, the performance of active‐matrix‐driven small‐molecule OLED displays incorporating high‐efficiency electrophosphorescent dopants were analyzed. These enable triplet excitons to contribute to light emission and have led to pixel efficiencies of over 40 lm/W. By considering a conventional two TFT per pixel addressing scheme, we show how this OLED design enables the fabrication of very‐low‐power‐consumption displays (lower than AMLCDs). We simulate display performance and perform a trade‐off analysis comparing the power consumption of displays driven by both amorphous‐silicon and low‐temperature poly‐Si TFTs.

Characteristics of low-temperature poly-Si TFTs on Al/glass substrates

The low-temperature poly-Si TFTs described here were fabricated on the Al/glass substrates by anodic oxidation of Al. An Al layer on glass substrates can be used to control threshold voltage, improve stabilities, and suppress the temperature rise due to self-heating. The Al layer on glass, thus assuring the improved reliability of displays, using this type of TFT, effectively suppressed the self-heating effect of poly-Si TFTs on glass. The threshold voltage of a TFT with an Al layer was more stable than that without an Al layer. These results were supported by numerical analysis.