Low-temperature Fabrication Method Research Articles

Flexible Perovskite Solar Cells: A Futuristic IoTs Powering Solar Cell Technology, Short Review.

The perovskite solar cells (PSCs) technology translated on flexible substrates is in high demand as an alternative powering solution to the Internet of Things (IOTs). An efficiency of ∼26.1% on rigid and ∼25.09% on flexible substrates has been achieved for the PSCs. Further, it is also reported that F-PSC modules have a surface area of ∼900 cm2, with a PCE of ∼16.43%. This performance is a world record for an F-PSC device more significant than ∼100 cm2. The process optimization, and use of new transport materials, interface, and compositional engineering, as well as passivation, have helped in achieving such kind of performance of F-PSCs. Hence, the review focuses mainly on the progress of F-PSCs and the low-temperature fabrication methods for perovskite films concerning their full coverage, morphological uniformity, and better crystallinity. The transmittance, band gap matching, carrier mobility, and ease of low-temperature processing are the key figures of merit of interface layers. Electrode material's flexible and transparent nature has enhanced the device's mechanical stability. Stability, flexibility, and scalable F-PSC fabrication challenges are also addressed. Finally, an outlook on F-PSC applications for their commercialization based on cost will also be discussed in detail.

UV/Ozone-Treated and Sol-Gel-Processed Y2O3 Insulators Prepared Using Gelation-Delaying Precursors.

In this study, a Y2O3 insulator was fabricated via the sol-gel process and the effect of precursors and annealing processes on its electrical performance was studied. Yttrium(III) acetate hydrate, yttrium(III) nitrate tetrahydrate, yttrium isopropoxide oxide, and yttrium(III) tris (isopropoxide) were used as precursors, and UV/ozone treatment and high-temperature annealing were performed to obtain Y2O3 films from the precursors. The structure and surface morphologies of the films were characterized via grazing-incidence X-ray diffraction and scanning probe microscopy. Chemical component analysis was performed via X-ray spectroscopy. Electrical insulator characteristics were analyzed based on current density versus electrical field data and frequency-dependent dielectric constants. The Y2O3 films fabricated using the acetate precursor and subjected to the UV/ozone treatment showed a uniform and flat surface morphology with the lowest number of oxygen vacancy defects and unwanted byproducts. The corresponding fabricated capacitors showed the lowest current density (Jg) value of 10-8 A/cm2 at 1 MV/cm and a stable dielectric constant in a frequency range of 20 Hz-100 KHz. At 20 Hz, the dielectric constant was 12.28, which decreased to 10.5 at 105 Hz. The results indicate that high-quality, high-k insulators can be fabricated for flexible electronics using suitable precursors and the suggested low-temperature fabrication methods.

Perovskite materials for photovoltaics: a review

Photovoltaic is among the most propitious renewable energy sources for meeting global energy demands. Owing to their simple solution synthesis procedure, lightweight, wearable, power conversion efficiency, flyable, ready to deploy for extremist lightweight space, and reduced cost of constituent materials, perovskite solar cells have gotten huge interest in the past years. Because of the high-quality perovskite film attained by low-temperature fabrication methods, as well as the development of appropriate interface and electrode materials, the effectiveness of perovskite solar cells (PSCs) has topped 25% efficiency in recent years. Furthermore, perovskite solar cells' stabilization has gotten a lot of well-deserved recognition. The future of various carbon, tin, and polymer materials-based perovskite solar cells has even been explored, as well as their industrial expansion possibility are also discussed. This review paper summarizes important accomplishments to date, highlights the unique properties of these perovskites that have led to their fast upsurge, and highlights the problems that must be overcome for perovskite solar cells to be developed and commercialized successfully.

Deposition of high-quality Ge film on Si by PECVD using GeCl4/H2 for fabricating near-infrared photodiodes

Direct deposition of high-quality Ge film on Si substrate suitable for fabricating Ge/Si photodiodes was achieved by using plasma-enhanced chemical vapor deposition (PECVD) with GeCl4/H2 as precursors. A tensile-strained, impurity-free, monocrystalline Ge film with a surface roughness of < 1 nm and a threading-dislocation density on the order of 104 cm−2 could be grown at a rate of ca. 80 nm/min at a substrate temperature of 450 °C directly without the need of any kind of buffer layer or post-annealing. When applied to fabricate near-infrared (NIR) photodiodes, a low dark current density and a reasonably good responsivity for the employed photodiode architecture were attained, revealing the potential of this low-temperature fabrication method in monolithic integration of optoelectronic components with Si-based electronic circuits. The success of this technique may be attributed to an atomic-layer-deposition-like process for both nucleation and growth.

Low-Temperature Growth of ZnO Nanowires from Gravure-Printed ZnO Nanoparticle Seed Layers for Flexible Piezoelectric Devices.

Zinc oxide (ZnO) nanowires (NWs) are excellent candidates for the fabrication of energy harvesters, mechanical sensors, and piezotronic and piezophototronic devices. In order to integrate ZnO NWs into flexible devices, low-temperature fabrication methods are required that do not damage the plastic substrate. To date, the deposition of patterned ceramic thin films on flexible substrates is a difficult task to perform under vacuum-free conditions. Printing methods to deposit functional thin films offer many advantages, such as a low cost, low temperature, high throughput, and patterning at the same stage of deposition. Among printing techniques, gravure-based techniques are among the most attractive due to their ability to produce high quality results at high speeds and perform deposition over a large area. In this paper, we explore gravure printing as a cost-effective high-quality method to deposit thin ZnO seed layers on flexible polymer substrates. For the first time, we show that by following a chemical bath deposition (CBD) process, ZnO nanowires may be grown over gravure-printed ZnO nanoparticle seed layers. Piezo-response force microscopy (PFM) reveals the presence of a homogeneous distribution of Zn-polar domains in the NWs, and, by use of the data, the piezoelectric coefficient is estimated to be close to 4 pm/V. The overall results demonstrate that gravure printing is an appropriate method to deposit seed layers at a low temperature and to undertake the direct fabrication of flexible piezoelectric transducers that are based on ZnO nanowires. This work opens the possibility of manufacturing completely vacuum-free solution-based flexible piezoelectric devices.

Impedance analysis of charge transfer upon nickel doping in Tio2-based flexible dye-sensitized solar cell

Flexible dye-sensitized solar cells (FDSSCs) have promoted interest in plastic industries as they are lightweight, flexible, and mechanically robust to accelerate production and reduce cost. However, the plastic substrates have temperature limitations in producing the TiO2 photoanode and degrade the performance of FDSSC. The main reason for this degradation is the low charge transfer in the photoanode layer. Although there is plenty of research on low-temperature fabrication methods, they indirectly increase the operational cost. Therefore, a new approach is necessary for charge transfer improvement without affecting the temperature in a low-cost platform. In this study, we present a photoanode that improves the charge transfer by doping nickel (Ni) in the TiO2 layer. A low amount of Ni doping (15%) exhibited Rct >> Rt, indicating a high charge transport and low electron recombination rate (120.84 s−1). On the other hand, higher amount Ni doping (>> 45%) has Rct << Rt which deteriorates the performance of the cell by causing severe agglomeration issues, indicating a high electron recombination rate (369.75 s−1). Moreover, the high charge transfer in (TiO2)85-Ni15-based FDSSC facilitates the electron lifetime of the cell up to 8.28 ms. Therefore, an optimum doping of Ni in TiO2-based FDSSC is studied in this work.

Facile and low-temperature strategy to prepare hollow ZIF-8/CNT polyhedrons as high-performance lithium-sulfur cathodes

Great efforts have been devoted to developing novel cathodes to alleviate the shuttle effect of lithium polysulfides (LiPSs). The limited intrinsic conductivity of metal–organic frameworks (MOFs) compels their utilization as the templates to prepare carbonaceous Li-S battery cathodes after high-temperature treatments. The facile and low-temperature fabrication methods of MOF-derived cathodes are largely unexplored. Herein, the hybrid of hollow zeolitic imidazolate framework-8 (ZIF-8) polyhedron functionalized with carbon nanotube (HZIF/CNT) cathode is fabricated via facile tannic acid (TA) etching and low-temperature treatment. The conductive HZIF/CNT structure with ordered hollow ZIF-8 morphology, rich heteroatoms functionalities, and hydrophilic surface endow strong adsorption of LiPSs, boosted LiPSs conversion kinetics, and regulated Li2S deposition. As a result, S@HZIF/CNT cathode delivers a superior initial capacity of 1371 mAh g−1 at 0.1C and excellent rate retention at 3.0C (696 mAh g−1). The remarkable cycling stability is evaluated for 500cycles at 0.5C with a 0.073% capacity decay per cycle. Moreover, the cathode with a high sulfur loading of 3.41 mg cm−2 delivers an initial capacity of 696.4 mAh g−1 at 1.0C and stable cycling performance over 200cycles. This work opens a facile and low-energy route to design advanced sulfur cathodes for high-performance Li-S batteries.

Low-Temperature Fabrication of Three-Dimensional Ceramic Substrate by Molding Inorganic Aluminosilicate Paste

In this work, an easy and low-temperature fabrication method of three-dimensional (3D) ceramic substrate was proposed. A 3DPC ceramic substrate was fabricated by molding alkali-activated aluminosilicate cement (AAAC) to form up a dam (cavity) on direct plated copper (DPC) ceramic substrate at low temperature. The effects of viscosity and curing temperature of cement paste on the properties of the 3DPC were investigated. The prepared 3DPC ceramic substrate achieved precise dimensions and structure, especially the manufacturing accuracy error was less than 2.5%. By optimizing process parameters, the shear strength between dam and DPC substrate reached up to 9.5 MPa. Moreover, thermal cycle and heat resistance tests confirmed that 3DPC exhibits excellent thermal reliability. All experimental results demonstrated that 3DPC ceramic substrate could satisfy with three dimension packaging and integration.

Low-temperature fabrication of SiOx-TiO2 core-shell nanowires for photocatalytic application

A new low-temperature fabrication method of SiOx-TiO2 core-shell nanowires (NWs) for photocatalytic application was suggested. In the present work, the gas-jet electron beam plasma chemical vapor deposition method was used to synthesize arrays of oriented bundles (microropes) of silicon oxide NWs. Tin nanoparticles were used as catalyst for the NW growth via the “vapor-liquid-solid” mechanism at a temperature of 335 °C. A conformal nanocrystalline TiO2 coating was then deposited by atomic layer deposition using TiCl4 and H2O at 300 °C. Anatase phase formation was confirmed by Raman spectroscopy and X-ray diffraction. The photocatalytic characteristics of the fabricated arrays were demonstrated by the example of the photo-oxidation reaction of acetone vapor. Options for further development and advantages of the method such as low temperature, scalability and good compatibility of the fabrication stages are discussed.

Low-temperature fabrication of nanographene on a copper substrate using pentacene

We developed a low-temperature fabrication method for nanographene on a copper (Cu) substrate. This process is called hot-mesh deposition (HMD) and uses pentacene, H2, and a tungsten (W) mesh. In HMD, pentacene and H2 molecules decompose on a heated W mesh placed between a pentacene source in a molybdenum boat and a Cu substrate. A clean surface was obtained using atomic hydrogen treatment prior to nanocarbon film formation. The nanocarbon films consisted of nanographenes, which formed on the cleaned Cu substrate. The peaks due to the D and D' bands of nanographene were observed in the Raman spectrum. It was found that nanographene could be produced by HMD even at temperatures as low as 250 °C. It is considered that the key factors for the low-temperature formation of nanographene are a clean Cu surface, and the reaction of pentacene with the 6,13-dihydropentacene generated on the heated W mesh.

Planar perovskite FAxMA1-xPbI3 solar cell by two-step deposition method in air ambient

Perovskite material presents prospective application potential in the third generation solar cell for their broad spectral absorption, small exciton binding energy and long exciton diffusion length. In this paper, low temperature and stable mixed-cation perovskite FAxMA1-xPbI3 solar cells fabrication method in air ambient was reported. The inverted planar ITO/PEDOT:PSS/FAxMA1-xPbI3/PCBM/Ag structure was fabricated in air ambient, which shows better performance than either FAPbI3 or MAPbI3 devices, and FA0.4MA0.6PbI3 demonstrates the highest PCE of 9.7% among the FAxMA1-xPbI3 solar cell devices. In order to decrease the potential barrier between the PCBM and Ag electrode, a layer of Bphen was inserted between PCBM and Ag electrode, the PCE of ITO/PEDOT:PSS/FAxMA1-xPbI3/PCBM/Bphen/Ag perovskite solar cell was increased to 10.86%. We simulated and calculated the absorption and band energy of perovskite materials to verify the accuracy of experimental results. Our result provides a progress towards fabricating perovskite solar cells in the air ambient.

Detailed Investigation of Evaporated Perovskite Absorbers with High Crystal Quality on Different Substrates.

Dual-source vapor-phase deposition enables low-temperature fabrication of high-performance planar structure perovskite (CH3NH3PbI3) solar cells (PSCs), applicable in tandem devices or for industrial production with high homogeneity. Herein, we report low-temperature fabrication of high-efficiency PSCs by dual-source vapor-phase deposition and significance of TiO2 surface modification with [6,6]-phenyl C61 butyric acid methyl ester (PCBM) on cell performance. Co-evaporation of PbI2 and CH3NH3I, as confirmed by X-ray diffraction and high-resolution transmission electron microscopy analyses, results in CH3NH3PbI3 layers with a well-crystallized tetragonal phase formed on both TiO2 and TiO2/PCBM electron-transport layers (ETLs). The devices with PCBM interlayer between TiO2 and CH3NH3PbI3 showed remarkably higher performance than those with TiO2 only, which was attributed to enhance charge extraction and reduced recombination at the TiO2/PCBM/CH3NH3PbI3 interface. The devices composed of evaporated CH3NH3PbI3 on top of the TiO2/PCBM and [2,2',7,7'-tetrakis( N, N-di- p-methoxyphenyl-amine)-9,9'-spirobifluorene] (Spiro-OMeTAD) as hole-transport material demonstrated power conversion efficiencies of 17.1% (reverse scan) and 13.4% (forward scan) with stabilized efficiency of over 16%, which is, to the best of our knowledge, the highest efficiency reported for evaporated perovskite solar cells using low-temperature fabrication method involving compact TiO2 layer as ETL. Furthermore, we show that this process can be used to deposit a CH3NH3PbI3 layer on top of a textured silicon substrate, which is the first step for preparing perovskite-silicon tandem devices with enhanced antireflection and light-trapping properties.

Durability and performance of CGO barriers and LSCF cathode deposited by spray-pyrolysis

Ce0.9Gd0.1O1.95 (CGO) protective layers are prepared by two different methods to prevent the reaction between the Zr0.84Y0.16O1.92 (YSZ) electrolyte and the La0.6Sr0.4Co0.2Fe0.8O3-δ (LSCF) cathode. In the first method, the CGO layers are deposited by an airbrushing technique from an ink containing CGO particles without and with cobalt as sintering aids. The second strategy consists in preparing both a dense CGO barrier layer and a porous LSCF cathode by spray-pyrolysis deposition, in order to further reduce the fabrication temperature and minimize the reaction between the cell components. The samples prepared by spray-pyrolysis exhibit better performance and durability than those obtained by conventional sintering methods. The results suggest that the interfacial reactivity between YSZ and LSCF as well as the Sr-enrichment at the cathode surface can be avoided by using low-temperature fabrication methods and by operating at temperatures lower than 650 °C.

Enhanced gas barrier properties of graphene-TiO2 nanocomposites on plastic substrates assisted by UV photoreduction of graphene oxide

Reduced graphene oxide (rGO) sheets have received great attention as a key element for thin barrier films that block the permeation of water vapor and other gases. However, it remains a challenge to prepare the rGO-based barrier films on plastic substrates through a chemically benign and low temperature fabrication route. Toxic chemicals or high temperature thermal treatments that are widely used for preparing rGO need to be avoided because they can damage the underlying plastic substrates. In this study, we report the fabrication of rGO/TiO2 composite films via an eco-friendly and low temperature ultraviolet (UV) photoreduction process and demonstrate their enhanced gas barrier properties by measuring water vapor transmission rates (WVTRs). When photocatalytic TiO2 nanoparticles are employed, UV exposure reduces the GO/TiO2 composite solution to form rGO/TiO2, which is subsequently deposited on plastic substrates. The rGO/TiO2 composites become resistant to water absorption because the UV photoreduction of GO/TiO2 effectively removes most polar groups on the GO sheets. We confirmed that rGO/TiO2 composites were successfully deposited onto the plastic substrate through a solution process and the barrier films led to a substantial reduction in WVTRs of the substrate. Our strategy for preparing graphene-based thin barrier films by using a UV photoreduction process enables the fabrication of solution-processed graphene-based encapsulation layers on plastic substrates with an eco-friendly and low temperature fabrication method.

Novel Trench Isolation Technology for Suspended MEMS Structures

This study presents a parylene-based trench isolation (PBTI) method using standard silicon wafer to obtain a suspended MEMS structure. The silicon-based suspended structures were electrically isolated using supported parylene beams. The parylene beams provide electrical isolation between the suspended structure and substrate, and prevent anchor movement during actuation and wire-bonding. The proposed process is a simple low-temperature, dry-etching and reliable fabrication method for structure creation and electrical isolation and does not require wet-release, LPCVD, plasma-enhanced chemical vapor deposition (PECVD), ion implantation, sputtering process, or sandwiched oxide/polysilicon/metal isolation. The parylene beams were created by performing multiple steps of parylene deposition and removal inside a silicon mold. The trench etching, polymer deposition for sidewall protection, floor polymer removal, structure release, and polymer stripping steps were completed by modifying the etching or passivation steps of the Bosch process. These steps can be integrated into a single-run ICP process controlled by macro commands; the ICP etcher can automatically complete suspended structure creation in a single run. A test device with a thickness of 50 m and a maximum trench aspect ratio of 10 was created to demonstrate process feasibility. The proposed process can be used for sensors and actuators, requiring a considerable device thickness to enhance sensitivity and performance. The test device is a comb-drive like device used to check the electrical isolation for sensor and actuator. Design, simulation, and fabrication considerations are discussed.

A simple, low-temperature fabrication method of highly (100)-oriented (Na0.85K0.15)0.5Bi0.5TiO3 thin films with outstanding electric properties

Abstract In this paper, we propose a simple but effective method to prepare high-quality (100)-oriented (Na0.85K0.15)0.5Bi0.5TiO3 (NKBT) thin films with outstanding electric properties by a sol-gel spin-on technique. By introducing a LaNiO3 seed layer between the substrate and thin film, we simultaneously achieved crystallization at temperatures as low as 450 °C and controlled orientation. X-ray diffraction and X-ray reflectometry indicated that the NKBT/LNO thin film annealed at 500 °C was highly (100)-oriented, and had clear interfaces without diffusion, effectively reducing the dielectric constant and leakage current. Additionally, due to its high (100) orientation and clear interface, the NKBT thin film annealed at 500 °C had high displacement and a high pyroelectric coefficient, giving it a higher pyroelectric figure of merit than those of previously reported films. This study provides a new and simple method for preparing highly oriented lead-free thin films at low temperatures, and it extends the possible applications of these films to integration with silicon substrates.

Performance improvement of solution-processed CdS/CdTe solar cells with a thin compact TiO2 buffer layer

The device performance of CdS/CdTe solar cells largely depends on not only the back ohmic contact, but also the conformality of CdS window layer coating. In order to reduce the light absorption loss in CdS, the CdS thickness is usually less than 100nm. However, pinholes in CdS and non-conformal coverage of CdS on transparent conducting oxide layer will cause shunting thus leading to device performance degradation and failure. In this paper, low-temperature and low-cost fabrication methods, i.e., chemical bath deposition and electrochemical deposition, were used to deposit CdS and CdTe, respectively. It was found that the yield of device was around 20% due to shunting. In order to alleviate this problem, a compact layer of TiO2 was inserted between the fluorine-doped tin oxide and CdS as a buffer layer. The thickness effect of TiO2 was studied and showed that devices with thin (20nm thickness) TiO2 performed better than the counterparts with thick layers. It was discovered that device yield improved to 80% and stability in air substantially improved with TiO2 layer.

A facile method for fabricating Au-nanoparticles-decorated ZnO nanorods with greatly enhanced near-band-edge emission

Doping with noble metal nanoparticles (NPs) has been proved to be an effective method to tune the photoluminescence (PL) properties of semiconductor materials. Since high processing temperatures make it difficult to avoid metal oxidation, low-temperature synthesis of metal NPs is preferred. Taking ZnO nanorods on fused silica substrates as a model system, a facile low-temperature fabrication method was adopted to deposit Au metal NPs coated ZnO nanorods in this work. The synthesis consisted of two steps: First, ZnO nanorods were grown on the fused silica substrates by a seed-assisted chemical solution method. Then, Au NPs were deposited on the surfaces of ZnO nanorods by an in situ photochemical metal-deposition. A homogeneous distribution of Au NPs with an average diameter around 30nm has been obtained on the well-aligned ZnO nanorods. The near-band-edge (NBE) UV emission of the ZnO nanorods is enhanced by up to seven times, accompanied with a decrease in the deep-level (DL) emission intensity. The mechanism of the PL enhancement is discussed with respect to the surface plasmon resonance (SPR) effect and the band bending at Au/ZnO interface.

The surface-plasmon-resonance and band bending effects on the photoluminescence enhancement of Ag-decorated ZnO nanorods

Doping with noble metal nanoparticles (NPs) is an effective method to tune the photoluminescence (PL) properties of semiconductor materials. The mechanism is widely attributed to the localized surface-plasmon-resonance (SPR) effect of the metal NPs, while the contribution of potential barrier at the interface between metal and semiconductor is less discussed. Taking ZnO nanorods on fused silica substrates as a model system, we present a facile low-temperature fabrication method to derive Ag metal NPs coated ZnO nanorods. Great enhancement of the near-band-edge (NBE) ultraviolet emission of the ZnO nanorods was achieved by the surface decoration with Ag NPs, accompanied with a decrement of deep-level (DL) emission intensity. Since, the Ag NPs are active even at ambient conditions, spontaneous changes in PL properties have been observed with aging time. The influence of oxidation state of Ag on the contacting potential and subsequently on the PL properties of ZnO nanorods were studied by employing a subsequent thermal annealing process. The role of contacting behavior and the varied potential barrier are comprehensively discussed. It was demonstrated that both the SPR effect and band bending effect can enhance the NBE emission and suppress the DL emission. In the Ag-decorated ZnO nanorods, the SPR effect is the main reason for PL enhancement of the metallic silver, while the potential barrier enhancement is the main reason for the oxidized silver.

Conducting-Interlayer SiOx Memory Devices on Rigid and Flexible Substrates

SiOx memory devices that offer significant improvement in switching performance were fabricated at room temperature with conducting interlayers such as Pd, Ti, carbon, or multilayer graphene. In particular, the Pd-interlayer SiOx memory devices exhibited improvements in lowering the electroforming voltages and threshold voltages as the number of inserted Pd layers was increased, as compared to a pure SiOx memory structure. In addition, we demonstrated that the Pd-interlayer SiOx junction fabricated on a flexible substrate maintained low electroforming voltage and mechanically stable switching properties. From these observations, a possible switching mechanism is discussed based on the formation of individual conducting paths at the weakest edge regions of each SiOx film, where the normalized bond-breaking probability of SiOx is influenced by the voltage and the thickness of SiOx. This fabrication approach offers a useful structural platform for next-generation memory applications for enhancement of the switching properties while maintaining a low-temperature fabrication method that is even amenable with flexible substrates.