Low Temperature Reflow Research Articles

BME-Assisted Fabrication of Porous Copper Films with Adjustable Porosity and Ligament Width for Microelectronic Interconnects

Monolithic porous Cu films are synthesized through the use of bicontinuous microemulsion (BME) to serve as a flexible template. The BME system is made up of a series of interconnected linked water and hydrocarbon phases. This one-of-a-kind structure enables precision Cu electrodeposition only in the aqueous phase, avoiding undesirable electrodeposition in the oil phase. We can fine-tune the porosity and ligament width of the resultant copper film by altering the oil phase proportion in the soft template. This Sn-plated porous Cu is capable of both low-temperature reflow and high-temperature service. The flexible template approach shows great potential for creating porous Cu with changeable porosity, allowing for more control over compositions. This approach has potential applications in advanced packaging technologies.

Properties of Mixing SAC Solder Alloys with Bismuth-Containing Solder Alloys for a Low Reflow Temperature Process

The subject of extensive research has been the establishing of lower temperature soldering of electronic assemblies that are similar to the once common yet still preferred eutectic Tin-Lead (SnPb) soldering processes that are below 217˚C. This research measured and compared the mixing mechanisms of paste and ball dissolution. Mixed soldered assemblies will have different dissolution results that are dependent on the peak reflow temperature. The hypothesis for this experiment was to determine the relationship of various times above the melting point of low temperature solders containing Bismuth. The results measured are from solder joints of both SAC305 and Bismuth containing solders formed at lower process temperatures compared to the standard high temperatures which peak at 230˚C-260˚C. The Bismuth containing solders evaluated start with the highest to lowest weight percentage of Bismuth, the eutectic 58Bismuth/42Tin (58Bi/42Sn), 57Bi/42Sn/1Ag and a propriety alloy that has a lower Bismuth content along with various micro alloys, defined as 40-58Bi/Sn/X (X representing proprietary micro alloys or doping). The assembly was with an 18mil 96.5Tin/3.0Silver/0.5Copper (SAC305) solder ball mixed with each solder paste. These solder alloys were exposed to three different peak temperatures 180˚C, 195˚C, 205˚C. Another reflow profile attribute of focus was times above 138˚C - the melting point of the eutectic Sn58Bi alloy, this term used throughout the study is referred to Time Above Melting (TAM). The ball and paste assembly used the times above melting of 120sec and 240sec to represent process extremes and verify their significance on improving mixing level results. The average mixing % levels were recorded and compared for each solder joint combination to test the theory that the solder paste solidifies during the time above melting (TAM) within the reflow oven. [1] This experiment effectively demonstrates that the reflow profile parameter for time above melting has limited effectiveness in additionally mixing the paste with the BGA solder ball. Optimization of mixing percentages will need to be achieved by optimizing the paste and ball volumes.

Soft-template-assisted bottom-up fabrication of tunable porosity monolithic copper film for interconnection in microelectronics

Background: Third-generation devices offer superior attributes, necessitating advanced packaging materials for harsh operating environments. Incorporating 3D porous architectures to increase the reaction area further enhances the reaction rate, making transient liquid phase bonding an ideal interconnection process. Methods: Fabrication of monolithic porous Cu films using a bicontinuous microemulsion (BME) as a dynamic soft template is reported. The BME phase consists of interconnected three-dimensional networks of aqueous and oil phases, separated by surfactants and cosurfactants. This unique structure enables the selective electrodeposition of Cu exclusively within the aqueous region, preventing any unwanted reactions in the oil phase. Tunable porosity in the monolithic Cu film is achieved by adjusting the water to oil phase ratio in the BME. Significant findings: The Sn-plated porous Cu films exhibit low-temperature reflow capability while still maintaining high service temperatures. The utilization of the BME soft template offers a promising approach for fabricating monolithic Cu films with tunable porosity, providing flexibility in controlling the compositions and performance of interconnections. The compatibility of the BME with existing wafer deposition techniques makes it a viable and scalable solution for mass production. The electrodeposition of monolithic Cu arrays on Cu pillars demonstrates its potential applicability in advanced packaging technologies.

A comparative study of thermal fatigue life of Eutectic Sn-Bi, Hybrid Sn-Bi/SAC and SAC solder alloy BGAs

Low melting temperature solders are becoming a hot topic in Pb-free solder studies. Among these solders, SnBi has attracted more attention because it can not only reduce the energy for reflow, but more importantly, increase the reliability of joints by minimizing warpage. In this study, the board-level reliability of the assembly of BGA components was investigated. Three types of assemblies are compared: mixed (hybrid) Sn-Bi/SAC305 assembly, which is made by soldering BGAs with SAC305 solder balls using eutectic SnBi solder pastes so that the low reflow temperature avoids the SAC305 solder joints from being molten; homogeneous eutectic SnBi assembly, which is made with solder balls and pastes that are both eutectic Sn-Bi; and homogenous SAC305 assembly as a control group. An accelerated thermal cycling test shows that homogeneous eutectic SnBi assembly exhibits the best cycling reliability while the mixed assembly has the shortest fatigue life. The failure mechanism of the mixed assembly is also different from the other two types. Based on the experimental fatigue life results, the parameters of constitutive equation of eutectic SnBi are calculated to evaluate the fatigue life of the solder joints. The study shows the better thermal cycling reliability of eutectic SnBi assembly and help predict the fatigue life of different assemblies.

A high-entropy alloy as very low melting point solder for advanced electronic packaging

SnBiInZn-based high-entropy alloy (HEA) was studied as a low reflow temperature solder with melting point around 80 °C. The wetting angle is about 52° after reflow at 100 °C for 10 min. The intermetallic compound (IMC) growth kinetics was measured to be ripening-control with a low activation energy about 18.0 kJ/mol; however, the interfacial reaction rate is very slow, leading to the formation of a very thin IMC layer. The low melting point HEA solder has potential applications in advanced electronic packaging technology, especially for biomedical devices.

Sn-3.0Ag-0.5Cu/Sn-58Bi composite solder joint assembled using a low-temperature reflow process for PoP technology

Package-on-Package (PoP) is a popular technology for fabricating chipsets of accelerated processing units. However, the coefficient of thermal expansion mismatch between Si chips and polymer substrates induces thermal warpage during the reflow process. As such, the reflow temperature and reliability of solder joints are critical aspects of PoP. Although Sn58Bi is a good candidate for low-temperature processes, its brittleness causes other reliability issues. In this study, an in-situ observation was performed on composite solders (CSs) made of an Sn-3.0Ag-0.5Cu (SAC305) solder and an Sn58Bi solder that were mixed during reflow at temperatures of 170 °C (CS-170), 180 °C (CS-180), and 190 °C (CS-190). The volumes of the mixed-solder regions were in the order of CS-190 > CS-180 > CS-170. A calculated Sn58Bi-SAC305 isoplethal section of the Sn-Ag-Cu-Bi quaternary system was employed to elucidate the melting behavior of CS-190. CS-190 with Sn cyclic twin boundary and Bi phase preferred orientation of [0001] was demonstrated by electron backscatter diffraction. Moreover, Cu/CS-190/Cu joints with a shear strength of 46 MPa were formed. CS-190 can reduce the brittleness of SnBi solder owing to the reduced solid-solution hardening with the decrease in the Bi content. These factors can improve the reliability of PoP technology.

Reliability Analysis of a Wearable Sensor Patch (WSP) to Monitor ECG Signals

Abstract Flexible Hybrid Electronic (FHE) devices interface flexible sensors and circuits with conventional rigid electronic components. This work reports preliminary results for the reliability aspects of a project aimed at fabricating a Wearable Sensor Patch (WSP) to monitor ECG signals. The device was fabricated by interfacing flexible electroplated Cu circuit lines and an ECG sensor on a Kapton® polyimide (PI) substrate with rigid electronics connected using SnPb solder (reflow temperature: 204 °C), making it a FHE device. Phase I of this project faced reliability issues as Cu circuit lines were susceptible to failure due to cracking near the front-end signal conditioning chip. This issue needed to be resolved in Phase II of the project to produce a robust device fit to be used in real world applications. The effect of changes in Cu trace thickness (2 and 6 μm) and Kapton® PI thickness (2 and 5 mil) on device robustness was tested. Effect of the use of low reflow temperature SnBi solder (reflow temperature: 175 °C) on device reliability was also tested. Multiple devices fabricated using different configurations of Cu trace and Kapton® PI thicknesses and either SnPb or SnBi solder were bend tested to single out the most robust configuration. Improved solder pad design for Cu traces at solder joint sites was also tested. It was observed that only devices with 6 μm thick Cu traces, 2 mil thick Kapton® and SnBi solder had no defects as a result of thermal cycling during fabrication. They also performed best during bend testing. Some of the factors contributing to robustness of this configuration might be lower CTE mismatch due to lower solder reflow temperature as well as greater strength under bending due to increased thickness. Improved solder pad design for Cu traces also improved device robustness considerably.

Effects of Complexing Reagent on Electroless Nickel Iron Alloy Plating for the Diffusion Barrier of UBM

Electro and electroless nickel platings have been extensively used as a diffusion barrier in under bump metallization (UBM) or as a surface finish on printed circuit boards (PCB). Even though a thin Ni layer on top of Cu can reduce the interfacial reactions with Sn-rich solders at a low reflow temperature, it may not be so effective when a reflow process is performed at a higher temperature and for a longer period. To provide a more robust diffusion barrier layer than electrodes Ni, electroless NiFe alloy system has been proposed. Since the electroless Ni-Fe plating bath has been rarely studied, the proper baths were not available commercially. In this research, the electroless plating of Ni-Fe alloys was investigated on the basis of complexing reagent. The stability of complexing reagent was studied. The compositions of electroplating layers were analyzed with EDS. The desired Ni-Fe alloy were obtained by controlling the chemical composition of the bath and its operating parameters.

Studies of material and process compatibility in developing compact silicon vapor chambers

The performance and long-term reliability of a silicon vapor chamber (SVC) developed for thermal management of high-power electronics critically depend on compatibility of the component materials. A hermetically sealed SVC presented in this paper is composed of bulk silicon, glass-frit as a bonding agent, lead/tin solder as an interface sealant and a copper charging tube. These materials, in the presence of a water/vapor environment, may chemically react and release noncondensable gas (NCG), which can weaken structural strength and degrade the heat transfer performance with time. The present work reports detailed studies on chemical compatibility of the components and potential solutions to avoid the resulting thermal performance degradation. Silicon surface oxidation and purification of operating liquid are necessary steps to reduce performance degradation in the transient period. A lead-based solder with its low reflow temperature is found to be electrochemically stable in water/vapor environment. High glazing temperature solidifies molecular bonding in glass-frit and mitigates PbO precipitation. Numerous liquid flushes guarantee removal of chemical residual after the charging tube is soldered to SVC. With these improvements on the SVC material and process compatibility, high effective thermal conductivity and steady heat transfer performance are obtained.

Superior Drop Test Performance of BGA Assembly Using SAC105Ti Solder Sphere

Board-level drop test performance was evaluated and compared for the following four different solder combinations in BGA/CSP assembly: 1) SnPb paste with SnPb balls, 2) SnPb paste with SAC105Ti balls, 3) SAC305 paste with SAC105Ti balls, and 4) SAC305 paste with SAC105 balls. Presence of Ti improved the drop test performance significantly, despite the voiding side effect caused by its oxidation tendency. It is anticipated that the voiding can be prevented with the development of a more oxidation resistant flux. The consistently poor drop test performance of 105Ti/SnPb is caused by the wide pasty range resulted from mixing SAC105 with Sn63 solder paste. The effect of Ti in this system is overshadowed by the high voiding outcome due to this wide pasty range material. In view of this, use of SAC105 BGA with SnPb solder paste is not recommended, with or without Ti addition. High reflow temperature drove fracture shift to interface at package side, presumably through building up IMC thickness beyond the threshold value. A lower reflow temperature is recommended. Electrical response is consistent with complete fracture data. But, complete fracture trend is inconsistent with that of partial fracture trend, and neither data can provide a full understanding about the failure mode. By integrating complete fracture and partial fracture into “Virtual Fracture”, the failure mechanism becomes obvious and data sets become consistent with each other.

Low-Temperature Reflow Anneals of Cu on Ru

Low-temperature reflow anneals of physical-vapor-deposited (PVD) Cu on Ru are achieved at a Cu/low-k integration-compatible low temperature of 250°C by surface diffusion. Feature-fill capability is also demonstrated in patterned features along with reasonable electrical measurements. As compared to typical impurity levels in the conventional electroplated Cu, the reflowed PVD Cu had higher purity, which then resulted in lower electrical resistance in the structures. Electromigration test results further confirmed the reliability of the reflowed-Cu/Ru interface.

MEAM molecular dynamics study of lead free solder for electronic packaging applications

The modified embedded atom method (MEAM) was employed in conjunction with molecular dynamics (MD) simulations to investigate whether a physical mixture of nano-Sn and nano-Ag particles at a prescribed ratio would achieve the same intermixing as a nano-Sn/Ag alloy. A Sn sphere and a Ag sphere both with a diameter of 4 nm were prepared by cutting the perfect bulk lattice structure. After energy minimization and structural relaxation, the two spheres were placed next to each other with a gap of 3 Å. The simulation was then performed at 500 K for 3 ns. Simulation results showed that the nano-Ag sphere still maintained its crystalline structure and no significant diffusion between Sn and Ag was observed. Further simulations were performed at 800 K, 850 K, 900 K and 1000 K, respectively, in order to obtain the activation energy of interdiffusion between An and Sn. It was then predicted that 118 ns was required for Sn and Ag to mix with each other at 500 K. The results implied that a physical mixture of nano-Sn and nano-Ag particles may satisfy the requirements of lead free solder for low temperature (∼500 K) reflow applications.

Low polarization and low temperature reflow of inorganic borophosphosilicate glasses formed from organic sources

It has been markedly epoch-making that we should form inorganic borophosphosilicate glasses for use in ULSIs from organic sources. Reversible glass forming reactions are proposed, and low electronic polarizable and low temperature reflow glasses are newly found. They showed good dielectric planarizing and low delay time capability as required for the step coverage of multilevel interconnections in ULSIs. A possible device planarization and C– V (capacitance and voltage) properties in MOS capacitors are briefly discussed.

Study of the effect of reflow time and temperature on Cu–Sn intermetallic compound layer reliability

In terms of various reflow time and temperature, an analysis of Cu–Sn intermetallic compound (IMC) layer reliability is presented in this paper. Temperature cycling test data reported in existing publications for the solder paste material of 63Sn/37Pb eutectic alloy is used to model the probability distribution functions of solder joint lifetime due to the IMC layer fatigue. The relationship of the IMC layer thickness as a function of reflow time and temperature is studied. A reliability and mean time to failure function of the IMC layer in terms of various reflow time and temperature are presented. Calculation suggests that to achieve a higher IMC layer reliability, a shorter reflow time and a lower reflow temperature should be used, while lowering reflow temperature may be more efficient than controlling reflow time. In general, a reflow temperature ranged by 240–280 °C should be avoided. For a specified reliability goal, how to choose proper reflow time and temperature is discussed.

Planarization Processes and Applications: II. B 2 O 3 / P 2 O 5 Doped GeO2 ‐ SiO2 Glasses

Plasma enhanced chemical vapor deposition of boron and phosphorus doped mixed glass films in a horizontal tube reactor using germane , silane , diborane , phosphine , and oxygen has been studied. The glass films offer the potential for both trench refilling and interlevel dielectric applications. Film synthesis was carried out at 200°C using a dual coil inductively coupled plasma system. Oxide film composition was determined using energy dispersive X‐ray spectroscopy and Auger energy spectroscopy. Cross‐sectional scanning electron microscopy was employed for studing the compositional dependency of the reflow behavior of the mixed , , , and glass films over silicon trenches under various ambient atmospheres. Reflow experiments were performed at temperatures ranging from 550 to 800°C in various gas ambient atmospheres. As result of the work, a low temperature (∼600°C) reflow process was developed resulting in fully planar dielectric films. This process may have application for planarization of interlevel dielectrics for ultralarge scale integrated circuits. © 1999 The Electrochemical Society. All rights reserved.

Low temperature AlCu planarization by PVD AlCuGe alloys: Invited lecture

This paper describes a low temperature reflow of AlCU alloys by incorporating Germanium in the film. Germanium is added in AlCu alloys by reacting GeH 4 with the films. The Al-alloy reflow occurs due to formation of low melting point eutectic with Germanium. This technique results in a low cost process for filling high aspect ratio vias/lines with Al-based alloys with improved damascene capability. This is achieved at temperatures below 400°C by reacting Germane (GeH 4) with AlCu alloys deposited by conventional techniques which result in voids, gaps and poor filling. Using such a process it is demonstrated that high aspect ratio vias with large undercuts can also be filled without voids. Also it is possible to partially fill the vias with low pressure sputtering followed by Germane reactions. This reaction eliminates overhangs and fills vias with AlCuGe. The low temperature provides the capability to form a multilevel homogeneous Al-alloy via/line structure without degrading the resistance of underlying interconnects. The reliability data shows that AlCuGe via/interconnect structure deposited by this method is at least “1.5X” better electromigration life time ( t 50) to that of hot sputtered AlCu (deposited at 535°C) and almost “2X ” to that of conventionally used CVD W stud/AlCu interconnect structure. The improvement in the reliability may be attributed to filling without voids high aspect ratio sub-half micron vias with low resistivity metal such as AlCuGe at temperatures well below 400°C. Since this technique does not rely on the wetting layer or the diffusion barrier a lower sheet resistance of AlCuGe line is achieved compared to high temperature reflow processes. Also the reaction between Al and GeH 4 takes place uniformly resulting in reproducible contact resistance. Most importantly it is possible to achieve “high open-short yields” of comb-serpentine structures, and via chains of difficult to polish materials like AlCu using a “damascene” process.

Aluminum-germanium-copper multilevel damascene process using low-temperature reflow sputtering and chemical mechanical polishing

A low-temperature multilevel aluminum-germanium-copper (Al-Ge-Cu) damascene technology was developed using reflow sputtering and chemical mechanical polishing (CMP). The maximum processing temperature for the fabrication of multilevel interconnections could be reduced to 420/spl deg/C using Al-1%Ge-0.5%Cu, whereas the conventional reflow temperature was not less than 500/spl deg/C. No degradation due to reflow heat cycles was observed in terms of Al-Ge-Cu wiring resistance. Electromigration test results indicated that the mean time to failure (MTTF) of Al-1%Ge-0.5%Cu was longer than 10 years at the operating condition, which was equivalent to that of Al-1%Si-0.5%Cu. The Al-1%Ge-0.5%Cu triple-level interconnection was fabricated using reflow sputtering to fill vias and wiring trenches and subsequent CMP for Al-Ge-Cu films.

Possible Mechanisms for Applications of Polarizable and OH-Containing Glasses to MOS Devices

The selection of materials for semiconductor device passivation was investigated as regards the application of ZnO- and PbO-based glasses in MOS (metal, oxide, and silicon) devices. It was found that mechanisms affecting the application of these glasses to MOS devices were related to the molar polarizabilities and the OH radical contents in glasses. With regard to the recovery of C-V (capacitance-voltage) hysteresis loops in MOS capacitors, ZnO-based glasses were found to be superior to PbO-based glasses, since the molar polarizability of ZnO-based glasses was smaller than that of PbO-based glasses. The concentration of OH radicals depends on the composition of the glasses and had a negative effect on the recovery of C-V curve shifts in MOS capacitors passivated by these glasses. The glasses had low-temperature reflow below 800°C; PbO-based glasses had lower flow points than ZnO-based glasses. The possible mechanisms for the recovery of ΔV̄G shifts in C-V hysteresis loops were elucidated by the use of Poisson's equation and OH absorption coefficients.

New reflowable organic spin‐on glass for advanced interlevel dielectric planarization

AbstractNew reflowable organic spin‐on glass (SOG) was developed to form planarized multilevel interconnections for ULSIs. This SOG had superior gap‐filling and plan‐arizing characteristics compared to those of conventional organic SOGs. For example, using this SOG, a 0.025‐μm wide trench with an aspect ratio of over 10 could be perfectly filled without void. The surface of a three‐layered interlevel dielectric structure with this SOG was four times smoother than that with a conventional organic SOG.It was found that the excellent gap‐filling planar‐izing property of this SOG was due to the low temperature reflow (100 to 200°C). The film quality was almost the same as that of an organic SOG which has been widely used and has exhibited sufficient reliability. That is, this organic SOG gives a sufficient reliability with far improved gap‐filling and planarization. Since the relative dielectric constant of this SOG is as low as 3.0, this SOG is promising to improve the operation speed of ULSI.

Low-temperature BPSG reflow compatible with surface micromachining

Borophosphosilicate glass (BPSG) demonstrates superior reflow properties at low reflow temperature compared with phosphosilicate glass (PSG). However, the latter is conventionally used in surface micromachining, because of the high underetch rate in HF. This paper reports on the BPSG composition required to achieve both satisfactorily reflow at 850 degrees C and adequate etch rate in BHF to enable the application of BPSG as reflow and sacrificial material. The effect of the boron content in the BPSG and the application of a HMDS film before low-temperature reflow on the reflow performance have been investigated using LPCVD deposition and reflow in a wet oxidation furnace.