Low-power Transceiver Research Articles

Strategies in the Design of Low Power Wireless Sensor Network for the Measurement and Monitoring of Physiological Parameters

_______________________________________________________________________________________________ Abstract: This research paper presents the strategies involved in the design of a low power wireless sensor network for the measurement and monitoring of physiological parameters like body temperature, pulse rate and respiration rate of a patient .Ultra low power MSP430F1611 microcontroller from Texas instruments (TI) and the low power transceiver CC2500 ZigBee module from chicon are used in the present design. The TMP100 a digital temperature sensor is used for the measurement of body temperature ,the Free Scale MMA7260Q tri-axial accelerometer is used to measure the respiration rate and a simple pulse rate module is designed using the IR LEDs for the measurement of heart rate. A GUI is developed based on Visual Basic software to display the results. Also the results are displayed on the 2x16 LCD module . In addition , a website with URL www.vishnuhealth.com is designed to display the results .To achieve the low power objective ,an attempt is made to apply the Dynamic voltage and frequency scaling algorithm in addition to all the possible hardware precautions and MAC protocols.

Co-Integration of an RF Energy Harvester Into a 2.4 GHz Transceiver

This paper presents an RF energy harvester embedded in a low-power transceiver (TRX) front-end. Both the harvester and the TRX use the same antenna and operate at the same frequency of 2.4 GHz. To decouple the harvester from the TRX, different concepts are proposed regarding the transmitter (TX) and receiver (RX). To avoid loading the TX, the harvester is decoupled with an nMOS switch that can be enabled with a start-up rectifier. Concerning the RX, the decoupling mechanism relies on the nonlinear input impedance of the main RF-DC converter. The harvester also includes a supply management circuit for over-voltage protection and charging energy storage devices with a constant current or voltage. The energy harvester has been co-integrated with the low power TRX in a 130 nm CMOS process and achieves a measured peak power conversion efficiency of 15.9%. For input power levels of at least -9 dBm, it is able to charge up a supply capacitor to a regulated voltage of 1.34 V. The impact of the harvester on the TRX performance is measured with respect to an identical TRX front-end without harvester, showing little impact on the TRX performance. Both TX output power and RX noise figure are degraded by less than 0.5 dB. As an additional feature, the start-up rectifier is also used for demodulation of On-Off-Keying (OOK) signaling, which can be used as a secondary wake-up channel. Since the required area for the harvester is only 0.019 mm2 (≈ 2% of the total active TRX area), it can be added to the TRX at almost no cost.

A 20-Mb/s Pulse Harmonic Modulation Transceiver for Wideband Near-Field Data Transmission

This brief presents a fully integrated low-power transceiver for wideband near-field data transmission across inductive telemetry links based on pulse harmonic modulation (PHM). This PHM transceiver uses two narrow pulses with specific amplitudes and timing at the transmitter (Tx) to suppress intersymbol interference (ISI) at the receiver (Rx) high-Q LC tank to achieve high data rates (DRs) without reducing the inductive link quality factor to extend its bandwidth. This method significantly improves the range and selectivity of the link. The PHM Rx architecture is based on noncoherent energy detection utilizing a novel pulse-based automatic gain control circuit, which significantly reduces the power consumption (46%) and ISI at short coupling distances. The PHM transceiver was fabricated in a 0.35- μm standard CMOS process and achieved a measured DR of 20 Mb/s with a bit error rate of 8.7×10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-8</sup> at a 10-mm distance using planar figure-8 coils. The PHM Tx and Rx power consumptions were 180 and 12.15 pJ/bit, respectively, at a 1.8-V supply voltage.

An Energy-Efficient, Load Balanced Distributed Clustering and Routing Protocol for Large Scale WSNs

A wireless network consisting of a large number of small sensors with low-power transceivers can be an effective tool for gathering data in a variety of environments. These sensor nodes have some constraints due to limited energy, storage capacity and computing power. The energy consumed to route data from the sensor node to its destination raises as a critical issue in designing wireless sensor network routing protocols. In order to prolong the lifetime of wireless sensor networks, this study presents a multi-hop routing protocol with distributed clustering (ELDRL). First, in order to overcome the defect that the clusters distribute unevenly, ELDRL selects nodes as a cluster-head with regard to neighbor cluster-heads. Second, it partitions the network into different layers of clusters. Cluster heads in each layer cooperates with the adjacent layer to transmit sensor’s data to the base station. ELDRL spreads the workload across the sensor network, load balancing reduces hot spots in the sensor network and increases the energy lifetime of the sensor network. Moreover, the protocol not only increases the scalability but also decreases the traffic of WSN. Simulation results show that the scheme is more efficient compared with LEACH.

Calibration Techniques for Low-Power Wireless Multiband Transceiver

The low-power wireless transceiver is the basic silicon building block of wireless sensor networks and the internet of things. In this paper, two digital calibration and compensation techniques for low-power wireless multiband transceiver are presented to adjust the VCO's tuning curves in the frequency synthesizer and eliminate the DC offset voltage in the intermediate frequency (IF) pathway. The fuzzy binary search method is applied to VCO calibration, and gain-based DC offset cancellation (DCOC) is applied. Based on these proposed methods, a multiband transceiver is designed and fabricated in 0.18 μm CMOS with 1.8 V voltage supply. Experimental results show that with 24 MHz system clock, frequency synthesizer calibration can be completed within 450 without requiring any additional calibration prescaler, achieving a calibration resolution of 1 MHz; DC offset voltage can be reduced to less than 3.5 mV for 0 to 60 dB gain, with each calibration process taking only 1.28 ms time. The proposed techniques and corresponding circuits are proved to be cost-efficient while maintaining high performance, which is suitable for multiband and multimode transceiver integration.

The System Application of Automobile Traffic Information network Optimization Based on RS485 Low-Power Transceiver

The System Application of Automobile Traffic Information network Optimization Based on RS485 Low-Power Transceiver

Improving transmission reliability of low-power medium access control protocols using average diversity combining

Embedded computer systems equipped with wireless communication transceivers are nowadays used in a vast number of application scenarios. Energy consumption is important in many of these scenarios, as systems are battery operated and long maintenance-free operation is required. To achieve this goal, embedded systems employ low-power communication transceivers and protocols. However, currently used protocols cannot operate efficiently when communication channels are highly erroneous. In this study, we show how average diversity combining (ADC) can be used in state-of-the-art low-power communication protocols. This novel approach improves transmission reliability and in consequence energy consumption and transmission latency in the presence of erroneous channels. Using a testbed, we show that highly erroneous channels are indeed a common occurrence in situations, where low-power systems are used and we demonstrate that ADC improves low-power communication dramatically.

Modulation and SNR Optimization for Achieving Energy-Efficient Communications over Short-Range Fading Channels

It is commonly assumed that the energy consumption of wireless communications is minimized when low-order modulations such as BPSK are used. Nevertheless, the literature provides some evidence that low-order modulations are suboptimal for short transmission distances. No complete analysis on how the modulation size and transmission power must be chosen in order to achieve energy-efficient communications over fading channels has been reported so far. In this paper we provide this analysis by presenting a model that determines the energy consumed per payload bit transferred without error over fading channels of various statistics. We find that each modulation scheme has a single optimal signal-to-noise ratio (SNR) at which the energy consumption is minimized. The optimal SNR and the minimal energy consumption are larger for channels with less favorable error statistics. We also find that, if each modulations is operated at its optimal SNR, BPSK and QPSK are the optimal choices for long transmission distances, but as the transmission distance shortens the optimal modulation size grows to 16-QAM and even to 64-QAM. This result leads to showing that for short-range communications the lifetime of a typical low-power transceiver can be up to 500% longer by selecting the optimal constellation instead of BPSK.

무선 멀티미디어 센서 네트워크(WMSN) 환경에서 멀티미디어 데이터 전송을 위한 대용량 전송 기법에 대한 연구

WSN은 센서 탐지에 의한 데이터 전송을 목적으로 사용하며 이러한 송신 이벤트의 데이터 전송량은 일반적으로 용량이 작다. 이러한 이유로 일반적인 WSN MAC 프로토콜은 에너지 효율을 높이기 위하여 듀티 사이클 방식을 적용하지만, 이는 WMSN 환경에서 요구되는 대용량 멀티미디어 데이터 전송에 적합하지 않다. 본 논문에서는 WMSN 요구를 만족시키기 위하여 MAC 계층에서의 새로운 대용량 데이터 전송 기법을 제안하며, 기존 WSN 환경의 경쟁기반 MAC 프로토콜에서 도입하는 듀티 사이클 기법과 공존하여 적용할 수 있도록 설계하였다. 또한, 제안하는 대용량 데이터 전송기법은 송신 버퍼의 상태와 채널 환경을 고려하여 사용 유무를 결정하도록 설계되었으며, 송수신 노드가 대용량 데이터 전송 시점에서 이웃 노드에게 간섭받지 않고 채널 점유를 보장받을 수 있도록 설계되었다. 본 논문은 제안 방식의 객관적 성능을 평가하기 위하여 기존 듀티 사이클 기법을 지속적으로 운영하는 MAC과 제안하는 대용량 전송 방식을 혼용하여 운영하는 MAC을 모두 실험하고 그 결과를 분석하였다. For transmitting sensed data, wireless sensor networks have been developed and researched for the improvement of energy efficiency, hence, many MAC protocols in WSN employ the duty cycle mechanism. Since the progressed development of the low power transceiver and processor let the high energy efficiency come true, the delivery of the multimedia data which occurs in area of sensor work should be needed to provide supplemental information. In this paper, we design a new scheme for massive transmission of large multimedia data where the duty cycle is used in contention based MAC protocol, for WMSN. The proposed scheme can be applied into the previous duty cycle mechanism because it provides two operation between normal operation and massive transmission operation. Measuring the buffer status of sender and the condition of current radio channel can be criteria for the decision of the above two operations. This paper shows the results of the experiment by performing the simulation. The target protocol of the experiment is X-MAC which is contention based MAC protocol for WSN. And two approaches, both X-MAC which operates only duty cycle and X-MAC which operates combined massive transmission scheme, are used for the comparative experiment.

A low-power transceiver design for FlexRay-based communication systems

This paper presents a FlexRay Transceiver (FRT) used in an in-vehicle network compliant with FlexRay physical layer standards. FlexRay is a new standard for data/signal communication among ECUs (electronic control unit) installed in a vehicle. FRT at least comprises two major blocks in the physical layer design: the data transmission block, i.e., Bus Driver (BD), which is used to generate signals on the bus and recognize the signal electrical characteristics on the bus; and the control block, i.e., Major Controller, which is in charge of data path, security, and safety. The proposed FRT design in this work is implemented using a typical 0.18μm CMOS process. The total core area is 1.01×0.894mm2 and the power consumption is 76.62mW at a 80MHz system clock.

A Massive Transmission Scheme in Contention-Based MAC for Wireless Multimedia Sensor Networks

For transmitting the data which is composed of sensed information in sensors, wireless sensor networks have been developed and researched for the improvement of energy efficiency, hence, many MAC protocols in WSN employ the duty cycle mechanism. Since the progressed development of the low power transceiver and processor let the high energy efficiency come true, the delivery of the multimedia data which occurs in the area of sensor work should be needed to provide supplemental information. In this paper, we design a new scheme for massive transmission of large multimedia data where the duty cycle is used in contention based MAC protocol, for WMSN. The proposed scheme can be applied into the previous duty cycle mechanism because it provides two operations between normal operation and massive transmission operation. Measuring the status of the buffer in a sender and the condition of current radio channel can be criteria for the decision of the above two operations. This paper shows the results of the experiment by performing the simulation. The target protocol of the experiment is X-MAC which is contention-based MAC protocol for WSN. Two approaches, both X-MAC which operates only duty cycle mechanism and X-MAC(MTS) which operates combined massive transmission scheme, are used for the comparative.

An Autonomous Power Supply System Supporting Low-Power Wireless Sensors

This paper presents a complete autonomous power supply generation system which can find application in a wireless sensor network. Every part of the system is powered only by the energy harvested by an electromagnetic transducer. Besides the transducer, the system comprehends an integrated electronic interface working as step-up ac/dc converter, a high-efficiency step-down dc/dc voltage regulator, and, finally, a load which closely replicates the characteristics of the Analog Devices ADF7242 2.4-GHz low-power transceiver, Texas Instruments MSP430 16-bit microcontroller, and Analog Devices AD7814 temperature sensor with 10-bit digital output. The core of the autonomous power supply system is the transducer's dedicated electronic interface which is designed for transferring the harvested energy to a storage capacitor and is able to process every voltage pulse coming from the transducer, providing the supply voltage for itself and the rest of the circuitry. The system will be analyzed and experimental results demonstrating the possibility of supporting a wireless communication with the harvested energy will be presented for two situations: in the first one the transducer is driven at its mechanical resonance frequency, and in the second one the same transducer is activated through the body movements of a person.

A 1.1-V Regulator-Stabilized 21.4-GHz VCO and a 115% Frequency-Range Dynamic Divider for $K$-Band Wireless Communication

A 21.4-GHz 1.1-V regulator-stabilized voltage-controlled oscillator (VCO) with a dual-transformer configuration and a 115% frequency-range dynamic divider-both based on 0.18-μm SiGe BiCMOS technology-were developed. As for the VCO, the combination of two types of transformers, which exhibit high input impedance and capacitive-input impedance, respectively, provides both wide frequency-tuning range and low phase noise. The measured phase noise of the VCO at a 1-MHz offset frequency is - 109 dBc/Hz with 11.1-mW dc power dissipation (including the regulator). The figure of merit of the VCO is -192 dBc/Hz, which is the best value among 20-GHz-class silicon-based VCOs (to the best of the authors' knowledge). As for the divider, a two-stage single-balanced mixer reduces dc power and increases operation frequency range. The measured operation frequency of the divider is from 7 to 26 GHz while dissipating only 1.15-mW dc power and occupying a small area (0.004 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ). These performance results indicate that the proposed VCO and the divider are suitable for low-power transceivers of quasi-millimeter-wave wireless communication systems.

Hardware-Software Implementation of a Sensor Network for City Traffic Monitoring Using the FPGA- and ASIC-Based Sensor Nodes

This paper presents a prototype sensor network for monitoring urban traffic. The sensor network node, equipped with a low-resolution camera, observes the street and detects moving objects. Object detection is based on the custom video segmentation algorithm, using dual background subtraction, edge detection and shadow detection, running on dedicated multi-processor SoC hardware. The number and the speed of the detected objects are transmitted using a low-power license-free radio transceiver to another neighboring node. All the nodes create a self-organized network, data are aggregated at the nodes and passed further to the nodes closer to data sinks. Finally, information about the traffic flow is collected from the sinks and visualized on a PC. The prototype sensor network node has been realized in two versions: FPGA and ASIC. The ASIC version consumes approximately 500 mW and it can be powered from a photovoltaic solar panel combined with a single cell Li-Po battery. The comparison of power consumption of both versions has also been made. Apart from collecting traffic data, the proposed sensor network can gather environmental data, such as the temperature, the acoustic noise or the intensity of the sunlight. The set of 26 prototype sensors has been mounted on street lamp-poles on streets and tested in real conditions.

A 315MHz Power-Gated Ultra Low Power Transceiver in 40nm CMOS for Wireless Sensor Network

A 315 MHz power-gated ultra low power transceiver for wireless sensor network is developed in 40 nm CMOS. The developed transceiver features an injection-locked frequency multiplier for carrier generation and a power-gated low noise amplifier with current second-reuse technique for receiver front-end. The injection-locked frequency multiplier implements frequency multiplication by edge-combining and thereby achieves 11 μW power consumption at 315 MHz. The proposed low noise amplifier achieves the lowest power consumption of 8.4 μW with 7.9 dB noise figure and 20.5 dB gain in state-of-the-art designs. key words: injection lock, power gating, low noise amplifier, ultra low power

Counter System Design According to ATmega16L-8PC on the Machine Production Line

Along with electronics technique of development rapidly, SCM has become essential tool to the development of modern electronic technology. This paper introduces the core of ATmega16L-8PC microcontroller, and the MAX485 with low-power transceiver for the system of products counting on the production line system. The system is highly integrated, strongly stable and low power consumption, very convenient use and maintenance, with high Cost effective and practical value.

A CMOS Low-Power Transceiver With Reconfigurable Antenna Interface for Medical Implant Applications

A low-power transceiver for medical implant communication service is presented. The device consists of three subsystems, which perform wake-up signal reception, data-link binary frequency-shift keying (BFSK) reception, and transmission, respectively. A common antenna interface is reused in the three subsystems, reducing circuit complexity and number of external components. Super-regenerative architecture is used for wake-up reception, and gm-boosted common-gate stages are used to optimize receiver (RX) performance with low power consumption. The transmitter employs an all-digital frequency-locked loop to directly drive a class AB power amplifier. The transmitter can alternatively use an injection-locked power oscillator for lower bit rates and power consumption. The integrated circuit is designed and fabricated on a 0.18-μm CMOS process. The wake-up RX achieves a -80-dBm sensitivity for a 50-kb/s signal and a 280-μW dissipation. The BFSK RX achieves a -97-dBm sensitivity for a 75-kb/s signal and a 2-mW power consumption. Finally, the transmitter achieves an output power of -5 dBm for a power consumption of 2.9 mW.

Implementation Of Hybrid Protocol For Routing As Well As Clustering

WSN consisting of a large number of small sensors with low power transceivers can be an effective tool for gathering data in a variety of environments. As sensor nodes are deployed in sensing field, they can help people to monitor and aggregate data. Researchers also try to find more efficient ways of utilizing limited energy of sensor node in order to give longer life time of WSNs. Network lifetime, scalability, and load balancing are important requirements for many data gathering sensor network applications. Therefore, many protocols are introduced for better performance. The lack of infrastructure and dynamic nature of mobile ad hoc networks demand new networking strategies to be implemented in order to provide efficient end-to-end communication. Some researches have been proposed to organize the network into groups called clusters and use different routing protocols for inter and intra clusters to propagate an information. But with these solutions, the network first needs to be organized into cluster and next, we need to construct each routing table[16]. In the available literature, multi-hop routing protocol is well known for power saving in data gathering [5]. Researchers have used such types of the cluster-based (e.g., LEACH, EERP), the chain-based (e.g. PEGASIS) and the tree-based (e.g. TREEPSI) to establish their energy efficient routing protocols. In this paper, we propose an improved version which uses both cluster and tree based protocols. The proposed protocol improves the power consumption by improving FND.

A Low-Overhead and Low-Power RF Transceiver for Short-Distance On- and Off-Chip Interconnects

One of the most difficult problems that remains to be solved in wire interconnect architectures is the achievement of lower latency and higher concurrency on a shared bus or link without increasing the power and circuit overhead. Novel improvements in short distance on- and off-chip interconnects can be provided by using a multi-band RF interconnect (RF-I) system. Unlike the conventional current- or voltage-mode square wave signaling transceivers that use binary or multilevel baseband signals, the proposed RF-I transceiver uses high-frequency modulated RF passband signals with binary phase-shift keying (BPSK) modulation. The proposed low-overhead RF-I transceiver using 0.18-µm CMOS technology achieves an aggregate data rate of 4Gb/s/pin between four I/Os (2Tx-to-2Rx) on a shared FR4 PCB line using two carriers of 6GHz and 12GHz. The two transceivers occupy an area of 0.077mm2 and dissipate a power of about 25mW with a power efficiency of 6.25pJ/bit.

A Switchless Zigbee Frontend Transceiver With Matching Component Sharing of LNA and PA

This letter presents a low power and low cost RF transceiver for Zigbee standard (IEEE 802.15.4) using a switchless front-end configuration. It is enabled by designing the matching networks that a low noise amplifier and a power amplifier can share. The transceiver has been implemented in 1P6M 0.18 μm CMOS process. The receiver achieves 4.4 dB NF, -6.5 dBm IIP3 and 25.7 dB gain with 3-step digital gain controllability, while drawing 4.9 mA from 1.8 V power supply. The power amplifier dissipates 5 mA from 1.8 V power supply at 3 dBm output power and 16.5% EVM at worst, having 21 dB digital gain controllability. The die area is 1 mm × 1 mm.