Low-power Resistive Random Access Memory Research Articles

Effect of Annealing Conditions on Resistive Switching in Hafnium Oxide-based MIM Devices for Low-power RRAM

Abstract This work presents resistive switching (RS) behaviour in HfO2-based low-power resistive random-access memory (RRAM) devices. A metal-insulator-metal (MIM) structure (Au/HfO2/Pt) was fabricated by sandwiching a thin insulating layer of HfO2 between Pt and Au electrodes. HfO2 films deposited by RF sputtering at room temperature were rapid thermally annealed in N2 ambient at 400 °C and 500 °C. Grazing angle X-ray diffraction (GIXRD), Field emission gun-scanning electron microscopy (FEG-SEM), atomic force microscopy (AFM), and X-ray photoelectron spectroscopy (XPS) were employed to analyse the phase, crystal structure, morphology, surface roughness and chemical composition of the HfO2 films. The bipolar RS could be observed in both as-deposited and annealed HfO2 film-based devices from I-V characteristics measured using a source meter. We have investigated the effect of annealing temperature and annealing ambient on the phase formation of HfO2 as well as the RS characteristics and compared with as-deposited film-based device. Annealed HfO2 film-based devices exhibited improved electrical characteristics, including stable and repeatable RS at significantly lower switching voltages (˂1 V) which indicates low power consumption in these devices. The relatively lower processing temperature of the HfO2 films and that too in the films deposited by physical vapor deposition (PVD) technique-RF magnetron sputtering makes this study significantly useful for resistive switching based non-volatile memories.

Ultra-low power resistive random-access memory based on VO2/TiO2 nanotubes composite film

In this study, a resistive random access memory (RRAM) based on VO2/TiO2 nanotubes was prepared. Compared with single VO2-based RRAM or TiO2 nanotube-based RRAM, the Ag/VO2/TiO2 nanotube/FTO RRAM device has advantages such as low power consumption (∼0.154 pJ), excellent stability (3000 DC cycles), and high switching rate (300 times). It still shows certain advantages compared with TiO2-based low-power RRAM (0.5 pJ). The device can also exhibit 20 consecutive long-term enhancement/suppression behaviors, which can be used to simulate brain-like activity and achieve recognition accuracy of 95% (8 × 8 pixels) and 88% (28 × 28 pixels) in artificial neural network identification field.

High performance and low power consumption resistive random access memory with Ag/Fe2O3/Pt structure

Due to magnetic field tunability and the abundance of iron in the Earth’s crust, iron oxide-based resistive random access memory (RRAM) is considered to be low cost and potential for multi-level storage. However, the relatively high operation voltage (>1 V) and small storage window (<100) limit its application. In this work, the devices with simple Ag/Fe2O3/Pt structure exhibit typical bipolar resistive switching with ultralow set voltage (V set) of 0.16 V, ultralow reset voltage (V reset) of −0.04 V, high OFF/ON resistance ratio of 103, excellent cycling endurance more than 104 and good retention time longer than 104 s. Each major parameter has about an order of magnitude improvement compared to the previous data. The devices demonstrate outstanding stable low power consumption quality. Based on the analysis of the experimental results, a percolation model of silver ion migration was established and confirmed that low operation voltage is attributed to the amorphous oxide layer with large porosity. During electrical testing, the compliance current (I c) and maximum reset voltage (V max) can also affect the device performance. This discovery suggests Fe2O3 memristor has significant potential for application and provides a new idea for the realization of high-performance low-power RRAM.

Low-Power Resistive Memory Integrated on III–V Vertical Nanowire MOSFETs on Silicon

III-V vertical nanowire MOSFETs (VNW-FETs) have the potential to extend Moore's law owing to their excellent material properties. To integrate highly scaled memory cells coupled with high performance selectors at minimal memory cell area, it is attractive to integrate low-power resistive random access memory (RRAM) cells directly on to III-V VNW-FETs. In this work, we report the experimental demonstration of successful RRAM integration with III-V VNW-FETs. The combined use of VNW-FET drain metal electrode and the RRAM bottom electrode reduces the process complexity and maintains material compatibility. The vertical nanowire geometry allows the RRAM cell area to be aggressively scaled down to 0.01 μ <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m2</sup> enabling realization of dense memory (1T1R) cross-point arrays on silicon.

Graphite-based selectorless RRAM: improvable intrinsic nonlinearity for array applications.

Selectorless graphite-based resistive random-access memory (RRAM) has been demonstrated by utilizing the intrinsic nonlinear resistive switching (RS) characteristics, without an additional selector or transistor for low-power RRAM array application. The low effective dielectric constant value (k) layer of graphite or graphite oxide is utilized, which is beneficial in suppressing sneak-path currents in the crossbar RRAM array. The tail-bits with low nonlinearity can be manipulated by the positive voltage pulse, which in turn can alleviate variability and reliability issues. Our results provide additional insights for built-in nonlinearity in 1R-only selectorless RRAMs, which are applicable to the low-power memory array, ultrahigh density storage, and in-memory neuromorphic computational configurations.

Investigation of switching mechanism in HfOx-ReRAM under low power and conventional operation modes.

Low-power resistive random access memory (LP-ReRAM) devices have attracted increasing attention owing to their advantages of low operation power. In this study, a vertical-type LP-ReRAM consisting of TiN/Ti/HfO2/TiN structure was fabricated. The switching mechanism for LP-ReRAM was elucidated as the conductive filament mechanism for conventional mode, and an interface-type switching mechanism for low power mode was proposed. The analysis of low frequency noise shows that power spectral density (PSD) is approximately proportional to 1/f for conventional operation mode. Nevertheless, for low power mode, the PSD of low resistance state (LRS) is proportional to 1/f, while that of high resistance state (HRS) is clear proportional to 1/f2. The envelope of multiple Lorentzian spectra of 1/f2 characteristics due to different traps reveals the characteristics of 1/f. For HRS of low power mode, a limited number of traps results in a characteristic of 1/f2. During the set process, the number of oxygen vacancies increases for LRS. Therefore, the PSD value is proportional to 1/f. Owing to the increase in the number of traps when the operation mode changes to conventional mode, the PSD value is proportional to 1/f. To the best of our knowledge, this is the first study that reveals the different noise characteristics in the low power operation mode from that in the conventional operation mode.

Engineering the switching dynamics of TiOx-based RRAM with Al doping

Titanium oxide (TiOx) has attracted a lot of attention as an active material for resistive random access memory (RRAM), due to its versatility and variety of possible crystal phases. Although existing RRAM materials have demonstrated impressive characteristics, like ultra-fast switching and high cycling endurance, this technology still encounters challenges like low yields, large variability of switching characteristics, and ultimately device failure. Electroforming has been often considered responsible for introducing irreversible damage to devices, with high switching voltages contributing to device degradation. In this paper, we have employed Al doping for tuning the resistive switching characteristics of titanium oxide RRAM. The resistive switching threshold voltages of undoped and Al-doped TiOx thin films were first assessed by conductive atomic force microscopy. The thin films were then transferred in RRAM devices and tested with voltage pulse sweeping, demonstrating that the Al-doped devices could on average form at lower potentials compared to the undoped ones and could support both analog and binary switching at potentials as low as 0.9 V. This work demonstrates a potential pathway for implementing low-power RRAM systems.

Low-power resistive random access memory by confining the formation of conducting filaments

Owing to their small physical size and low power consumption, resistive random access memory (RRAM) devices are potential for future memory and logic applications in microelectronics. In this study, a new resistive switching material structure, TiOx/silver nanoparticles/TiOx/AlTiOx, fabricated between the fluorine-doped tin oxide bottom electrode and the indium tin oxide top electrode is demonstrated. The device exhibits excellent memory performances, such as low operation voltage (&amp;lt;±1 V), low operation power, small variation in resistance, reliable data retention, and a large memory window. The current-voltage measurement shows that the conducting mechanism in the device at the high resistance state is via electron hopping between oxygen vacancies in the resistive switching material. When the device is switched to the low resistance state, conducting filaments are formed in the resistive switching material as a result of accumulation of oxygen vacancies. The bottom AlTiOx layer in the device structure limits the formation of conducting filaments; therefore, the current and power consumption of device operation are significantly reduced.

Hierarchical Three-Dimensional Layer-by-Layer Assembly of Carbon Nanotube Wafers for Integrated Nanoelectronic Devices

We report a general approach to overcome the enormous obstacle of the integration of CNTs into devices by bonding single-walled carbon nanotubes (SWNTs) films to arbitrary substrates and transferring them into densified and lithographically processable "CNT wafers". Our approach allows hierarchical layer-by-layer assembly of SWNTs into organized three-dimensional structures, for example, bidirectional islands, crossbar arrays with and without contacts on Si, and flexible substrates. These organized SWNT structures can be integrated with low-power resistive random-access memory.

Dimensional Effect of Non-Polar Resistive Random Access Memory (RRAM) for Low-Power Memory Application

The relationships between the resistive cell dimension and the related analytical parameters such as the forming voltage, set voltage, and reset current were investigated to implement high-density and low-power unipolar RRAM. It was shown that the formation process in unipolar switching is strongly related to the cell dimension in the sub-nm region, not only in terms of its vertical thickness but also of its horizontal length, using the numerical simulation method. With the optimal cell size having sufficient initial resistance and a low forming voltage, the achievement of the greatest feasibility of the high-density low-power RRAM will be further accelerated. A numerical simulation was performed using a random circuit breaker (RCB) simulation model to investigate the optimal resistive switching condition. The on/off resistance ratio increases as the cell area decreases at the sub-nm level, and these phenomena are explained in terms of the relatively large set resistance change in a very small area due to the conductive defect (CD) amount effect in the RCB network model.

Bipolar switching characteristics of low-power Geo resistive memory

We reported an ultra low-power resistive random access memory (RRAM) combining a low-cost Ni electrode and covalent-bond GeO x dielectric. This cost-effective Ni/GeO x /TaN RRAM device has very small set power of 2 μW, ultra-low reset power of 130 pW, greater than 1 order of magnitude resistance window, and stable retention at 85 °C. The current flow at low-resistance state is governed by Poole–Frenkel conduction with electrons hopping via defect traps, which is quite different from the filament conduction in metal-oxide RRAM.

Novel U-Shape Resistive Random Access Memory Structure for Improving Resistive Switching Characteristics

We firstly propose a novel U-shape resistive cell structure which is the best fit for generating low power resistive random access memory (RRAM) with forming-less process. We find that irregular resistive switching behavior in the initial transition and the characteristics associated with it. Controlling the conducting filament (CF) dimension and deposition orientation of resistive material are expected to reduce the distribution and forming voltage, which enables low power RRAM to be feasible without forming state. Simple fabrication flow and device performances are also evaluated in the aspect of forming-less process. Numerical simulation is performed using random circuit breaker model (RCB) to confirm the proposed structure.