Low Phase Error Research Articles

A Broadband Digital Step Attenuator with Low Phase Error and Low Insertion Loss in 0.18-μ#x3BC;m SOI CMOS Technology

This paper presents a 5-bit digital step attenuator (DSA) using a commercial 0.18-μm silicon-on-insulator (SOI) process for the wideband phased array antenna. Both low insertion loss and low root mean square (RMS) phase error and amplitude error are achieved employing two attenuation topologies of the switched path attenuator and the switched T-type attenuator. The attenuation coverage of 31 dB with a least significant bit of 1 dB is achieved at DC to 20 GHz. The RMS phase error and amplitude error are less than 2.5° and less than 0.5 dB, respectively. The measured insertion loss of the reference state is less than 5.5 dB at 10 GHz. The input return loss and output return loss are each less than 12 dB at DC to 20 GHz. The current consumption is nearly zero with a voltage supply of 1.8 V. The chip size is , including pads. To the best of the authors' knowledge, this is the first demonstration of a low phase error DC-to-20-GHz SOI DSA.

Broadband Low Phase Error Phase Shifter Using High-Pass Network With a Coupled Line Section

This letter presents a method to realize a broadband 90 $^{\circ}$ differential phase shifter which uses a high-pass network with a coupled line section for reducing the phase error to less than 2 $^{\circ}$ . Adding the coupled line section in the high-pass network, the local maximum and the second local minimum of phase shift can be created because the proposed phase shifter operates as a high-pass network at low frequency and operates as a coupled line at high frequency. The ratio of L over C, length and impedance of the coupled line are designed, and the limitation by fabrication is also relaxed because the strong coupling for the coupled line is not required for this 90 $^{\circ}$ differential phase shifter. The experimental results show the fractional bandwidth (FBW) of 125% with low phase error of $\pm 2^{\circ}$ and the return loss is better than 11 dB from 1.7 to 7.4 GHz.

Design of Wideband Low Phase Noise Class-C QVCO With Low Amplitude and Phase Errors

This letter presents a wideband, low phase noise, quadrature voltage controlled oscillator (QVCO) implemented in 0.18 $\mu{\rm m}$ CMOS. In order to improve the phase noise while provide high efficient oscillation, the cooperation of a Class-C operation with a bulk-coupled structure are adopted into a PMOS-only VCO. With high fundamental current amplitude generated and the frequency offset of the QVCO alleviated, the phase noise is improved significantly. The measurement shows 2–8 dB phase noise improvement with a minimum value of $-124 ~{\rm dBc}/{\rm Hz}$ at 1 MHz offset. Wide tuning range of 22.6% is realized by four-bit switched-capacitor-array ranging from 5.6 to 6.9 GHz. The quadrature accuracy of the proposed QVCO is evaluated by the measured results of an image-rejection mixer (IR-mixer), which exhibits a peak image rejection ratio (IRR) of 40 dBc, indicating low amplitude and phase errors simultaneously.

Broadband complementary metal‐oxide semiconductor phase shifter with 6‐bit resolution based on all‐pass networks

Multi-stage all-pass networks can be used to realise broadband phase shifters with low phase error. In this study, single-stage and two-stage all-pass networks with internal switched capacitors are investigated. Potentials and limitations of using the all-pass networks with internal switched capacitors for phase shifter design are examined. On the basis of the single-stage and two-stage all-pass networks, a fully-differential digital phase shifter with 6-bit resolution is designed. The digital phase shifter is implemented using a 0.18-μm complementary metal-oxide semiconductor process. The chip area is 2.80 × 1.75 mm2. Measurement results show that minimum root-mean-square phase error of 2° is achieved from 2.19 to 2.82 GHz, which translates into a bandwidth (BW) of 25%. The average insertion loss is 14.6 dB at the design frequency of 2.4 GHz. Over the entire BW, the return loss is greater than 9.2 dB and the amplitude error is within ±1 dB.

A self‐calibrated delay‐locked loop with low static phase error

SummaryIn conventional delay‐locked loop circuits, the charge and discharge of the charge pump result in mismatched current reflecting the size of the static phase error. The static phase error between feedback clock and reference clock is likely to be within tens or hundreds of picoseconds (ps). We thus propose an approach using digital calibration methods to reduce the charge pump current mismatch by means of the setup time of the D‐type flip flop. The setup time of D‐type flip flop is determined and duplicated to detect the phase error between the reference clock and feedback clock. It results in a very small static phase error between the reference clock and feedback clock. This paper used a 0.18 µm CMOS process design, with a reference frequency of 700 ~ 900 MHz. The active area is 0.031 mm2, and the phase error after correction is less than 5 ps. Copyright © 2015 John Wiley & Sons, Ltd.

Current generator for 6‐bit active phase shifter

A current generator for a broadband 6-bit active phase shifter (PS) with low RMS phase error and low RMS gain error using 0.18 μm BiCMOS technology is presented. The ratio of two output currents of the current generator determines the phase shift. In the proposed current generator, the two output currents are controlled independently, which makes it possible that the ratio of the two output currents can be accurately approaching the desired value. The control scheme for 6-bit phase generation is set such that the sum of the two output currents is constant for all phase states and results in a constant gain. With the proposed current generator, the 6-bit active PS obtains a RMS phase error less than 2.5° and a RMS gain error less than 0.55 dB at 5–20 GHz.

Dove prism heterodyne refractometer

Abstract In this study, we proposed an alternative method, integrating a Dove prism and precision circular heterodyne interferometry, for measuring the refractive index and concentration of sodium chloride and hydrogen peroxide solutions with low phase error. Due to the optical properties of the Dove prism, the test light undergoes total internal reflection (TIR) at the interface between the test sample and the prism. The light beam travels in and out of the Dove prism while maintaining the same direction. Therefore, only slight alignment is required, leading to only small errors in the phase and refractive index. In this study, the phase error, refractive index error, and resolution of the concentration are approximated to be 0.003°, 2×10 −5 , and 1×10 −3 M, respectively. The proposed method has the advantages of a simple optical configuration, ease of operation, little alignment required, and high stability, and it allows for high-precision measurement of the refractive index and concentration of the liquid sample.

A Ku‐band 3‐bit phase shifter MMIC using GaAs phemt technology for phased array system

ABSTRACTA Ku‐band 3‐bit switch‐type phase shifter with low insertion loss, low magnitude variation, and low rms phase error is designed and fabricated on 0.15‐μm pHEMT process. For all eight states, the insertion loss is 6.5 ± 1.5 dB from 10–14 GHz and the input return loss is >8.5 dB over 10–14 GHz. The phase shifter achieves a rms phase error of 2.2° and a rms amplitude error of 0.37 dB at 12 GHz with total chip size of 1.5 ×1 mm2. © 2015 Wiley Periodicals, Inc. Microwave Opt Technol Lett 57:771–774, 2015

A Single Resistor Tunable Grounded Capacitor Dual-Input Differentiator

A new current feedback amplifier (CFA) based dual-input differentiator (DID) design with grounded capacitor is presented; its time constant (τo) is independently tunable by a single resistor. The proposed circuit yields a true DID function with ideal CFA devices. Analysis with nonideal devices having parasitic capacitance (Cp) shows extremely low but finite phase error (θe); suitable design θe could be minimized significantly. The design is practically active-insensitive relative to port mismatch errors (ε) of the active element. An allpass phase shifter circuit implementation is derived with slight modification of the differentiator. Satisfactory experimental results had been verified on typical wave processing and phase-selective filter design applications.

Low Loss MEMS-Reconfigurable 1-Bit Reflectarray Cell With Dual-Linear Polarization

We present a X-band 1-bit reconfigurable reflectarray (RRA) cell capable of independent reflection phase control of each linear component of a dual-polarized wave. It presents the lowest loss ever reported in an operational RRA cell at microwave frequencies, thanks to particular design considerations and implementation in a monolithic micro-electromechanical systems (MEMS) process. The average reflection loss, including oblique incidence up to θ = 40 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> , is below 0.6 dB at the operating frequency. Low phase error and loss are preserved in a 12.5% bandwidth. Measurements demonstrate the viability of the concept as well as very good agreement between simulated and measured results.

Comments on “Cancellation of OpAmp Virtual Ground Imperfections by a Negative Conductance Applied to Improve RF Receiver Linearity” [

In the above paper [1], not only [2] but also older papers [3]-[5] exploiting a negative impedance connected to the virtual ground node should have been included as references. As discussed more extensively in a recent book [6], all these papers aim at mitigating the virtual ground imperfections using a grounded negative conductance. This technique was first proposed by Boutin [3] under the name “active compensation” using a “NIC” (Negative Impedance Converter). Later,other authors [4], [5] have studied the technique, and have shown that this results in an inverting amplifier with frequency dependent gain, which exhibits low magnitude and phase errors compared to uncompensated inverting amplifiers [6].

Rotman 렌즈의 위상 오차 최소화를 위한 빔 곡선 최적화

본 연구에서는 Rotman 렌즈의 위상 오차를 최소화하는 빔 곡선을 구하는 최적화 방법을 제안하고 있다. 이 방법은 빔 포트로부터 배열안테나의 중심점과 배열안테나를 따라 대칭 또는 비대칭으로 놓인 두 개의 점으로 구성된 동위상점들을 통과하여 대응되는 동위상면까지의 3개의 경로길이는 동일하다는 개념에 근거를 두고 있다. 이 방법을 따르면, 각각의 빔 방향에 대하여 위상 오차를 최소화하는 배열안테나 상의 동위상점 집합을 찾으면 최적의 빔 포트 위치를 직접 구할 수 있다. 시뮬레이션 결과는 제안된 방법이 저 위상 오차를 갖는 Rotman 렌즈의 빔 곡선을 구하는 가장 최적이며 효과적인 방법임을 보여준다. In this paper, we propose an optimization method for obtaining beam curve which minimize the phase errors of Rotman lens. This method is based on idea that 3 path lengths from a beam port through equal phase points, which consist of the center point of array antenna and two points placed symmetrically or asymmetrically along array antenna, to the corresponding phase front are equal. According to this method, the optimal locations of beam ports can be obtained directly by finding each equal phase point set on array antenna to minimize the phase errors for each beam direction. Simulation results show that the proposed method is the most optimal and effective method for determining the beam curve of Rotman lens with low phase errors.

A Sinusoidal Current Driver With an Extended Frequency Range and Multifrequency Operation for Bioimpedance Applications.

This paper describes an alternative sinusoidal current driver suitable for bioimpedance applications where high frequency operation is required. The circuit is based on a transconductor and provides current outputs with low phase error for frequencies around its pole frequency. This extends the upper frequency operational limit of the current driver. Multifrequency currents can be generated where each individual frequency is phase corrected. Analysis of the circuit is presented together with simulation and experimental results which demonstrate the proof of concept for both single and dual frequency current drivers. Measurements on a discrete test version of the circuit demonstrate a phase reduction from 25° to 4° at 3 MHz for 2 mAp-p output current. The output impedance of the current driver is essentially constant at about 1.1 M Ω over a frequency range of 100 kHz to 5 MHz due to the introduction of the phase compensation. The compensation provides a bandwidth increase of a factor of about six for a residual phase delay of 4°.

Far infrared laser polarimetry and far forward scattering diagnostics for the C-2 field reversed configuration plasmas.

A two-chord far infrared (FIR) laser polarimeter for high speed sub-degree Faraday rotation measurements in the C-2 field reversed configuration experiment is described. It is based on high power proprietary FIR lasers with line width of about 330 Hz. The exceptionally low intrinsic instrument phase error is characterized with figures of merit. Significant toroidal magnetic field with rich dynamics is observed. Simultaneously obtained density fluctuation spectra by far forward scattering are presented.

Balanced MMIC QPSK modulator with low amplitude and phase errors

A broadband monolithic microwave integrated circuit (MMIC) quadrature phase shift keying (QPSK) modulator with low amplitude and phase errors is proposed. The presented modulator adopts two wideband reflection-type binary BPSK modulators, each consisting of a modified Lange coupler with additional λ/4 transmission lines, varactor diodes, inductors and resistors. The proposed QPSK modulator is implemented in 0.15 μm GaAs low-noise pHEMT process. The measurements show an error vector magnitude and a demodulated I/Q offset <5.8% root-mean-square and −16.1 dB, respectively, from 18 to 26.5 GHz.

Decision-Directed Costas Loop Stable Homodyne Detection for 10-Gb/s BPSK Signal Transmission

This letter demonstrates decision-directed Costas loop stable homodyne detection for 10-Gb/s binary phase shift keying signal fiber-transmission of over 100 km utilizing frequency-stabilized several kilohertz spectral linewidth external cavity laser diodes (E-LDs). We design a phase-locked loop circuit that adopts an injection-current controlled E-LD as its local oscillator; its low phase error allows it to achieve the standard deviation of 1.9°. Owing to this phase-lock performance and the highly coherent light source, the receiver sensitivity approaches within 6 dB of the shot noise limit and the phase-locked loop recovers the optical carrier stably even if the waveform is distorted by the chromatic dispersion of 880 ps/nm after fiber transmission.

Design and performance study of phase‐locked loop using fractional‐order loop filter

SummaryThe present work reports the realization of an analog fractional‐order phase‐locked loop (FPLL) using a fractional capacitor. The expressions for bandwidth, capture range, and lock range of the FPLL have been derived analytically and then compared with the experimental observations using LM565 IC. It has been observed that bandwidth and capture range can be extended by using FPLL. It has also been found that FPLL can provide faster response and lower phase error at the time of switching compared to its integer‐order counterpart. Copyright © 2014 John Wiley &amp; Sons, Ltd.

Flip-Flops for Accurate Multiphase Clocking: Transmission Gate Versus Current Mode Logic

Dynamic transmission gate (DTG) flip-flops (FFs) (DTG-FFs) and current mode logic (CML) FFs (CML-FFs) are compared targeting power efficient multiphase clock generation with low phase error. The effect of component mismatches on multiphase clock timing inaccuracies is modeled and compared, using the product of mismatch-induced jitter variance and power consumption as a figure-of-merit (FOM). Analytical equations are derived to estimate the jitter-power FOM for DTG-FF- and CML-FF-based dividers. Simulations confirm the trends predicted by the equations and show that DTG-FFs achieve a better FOM than CML-FFs. The advantage increases for CMOS processes with smaller feature size and for a lower input frequency compared to fT.

DC‐20 GHz 5‐BIT CMOS digital step attenuator with low insertion loss and phase error

AbstractThis article presents a 5‐bit broadband digital step attenuator with low insertion loss and phase error using a standard 0.13 μm CMOS process for the phased array antenna.The maximum attenuation of 31 dB with the LSB of 1 dB is achieved at DC‐20 GHz. The measured insertion loss of the reference state is &lt;11 dB and the input and output return losses are &lt;−10 dB at DC‐20 GHz. The root mean square (RMS) phase and amplitude errors are &lt;2.5° and &lt;0.7 dB, respectively. The current consumption is near zero with 1.2 V supply. The chip size is 1.04 × 0.48 mm2 including pads. © 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 55:762–764, 2013; View this article online at wileyonlinelibrary.com. DOI: 10.1002/mop.27448

Measuring the refractive index of transparent materials using high precision circular heterodyne interferometry

This study measured a wide range of the refractive index of transparent glass with low phase error using precision circular heterodyne interferometry. We determined precision measurement conditions with theoretical error analysis. The findings showed that minimum phase error could be achieved through appropriate selections of the incident angle and azimuth angle of the analyzer. Using the proposed method, phase error could be estimated at better than 1×10−4. Error in refractive index measurements for each sample could be estimated at better than 1×10−4 under precision measurement conditions. In addition, the proposed method has the advantages of simple optical configuration, easy operation, and a wide measurement range of the refractive index of transparent materials.