Low-pass Circuit Research Articles

Fully real-time configurable analogue implementation of continuous-time transfer function: Application on fractional controller

This paper proposes a new electronic analog circuit to realize real-time fully configurable continuous-time transfer function. The proposed circuit serves various purposes, including smart controllers, fractional-order controllers, optimal controllers, anti-aliasing filter, and programmable filters. The input signal of the transfer function is continuous and remains continuous throughout the circuit until the output signal is obtained. The proposed approach decomposes the transfer function into elementary first and/or second-order low-pass filters. A new analog first-order low-pass filter circuit is presented, offering advantages over conventional active first-order low-pass filters circuits. These benefits include DC gain and time constant independent of resistor ohmic values, enabling the use of smaller resistors and capacitors for low frequencies, and an expanded frequency working range. Similarly, a new analog circuit for a second-order low-pass filter is proposed, specifically used to obtain complex conjugate poles. The use of digital potentiometers and digital switches controlled by a micro-controller, makes this analog circuit configurable in real-time. As an application, the new circuit is used to realize fractional integrator controller. The circuit gives good similarity between theoretical and experimental measurements.

Data Acquisition and Performance Analysis of Image-Based Photonic Encoder Using Field-Programmable Gate Array (FPGA)

With the continuous advancement of numerical control technology, the requirements for the position detection resolution, precision, and size of photoelectric encoders in computer numerical control machine tools are increasingly stringent. In the pursuit of high resolution and precision, this work investigates the principles of electronic subdivision and embedded hardware. It designs a high-precision image-based photonic encoder using a Field-Programmable Gate Array (FPGA). This photonic encoder captures the pattern of a rotating code disk using a complementary metal-oxide-semiconductor (CMOS) image sensor. The encoder’s core is the XC6SLX25T chip from the Spartan-6 series, with peripheral circuits including only A/D sampling and low-pass signal processing circuits. The FPGA module handles the digital signal reception, waveform conversion, quadrature frequency coarse count calculation, fine count subdivision calculation, and final position calculation of the encoder. In experiments, the output signal of the photonic encoder contains many impurities. After processing by the signal processing module, the A and B phase signals are not affected by previous interference, with a phase difference of 90°, meeting the requirements for subsequent signal processing modules. After fine count subdivision processing, the waveform graph significantly increases within one cycle, and after quadrupling the frequency, 30 subdivisions are performed within each cycle. Noise is introduced into graphic positioning or graphics are positioned under different noise conditions. Experimental results show that utilizing an improved centroid algorithm helps further suppress noise and enhance measurement accuracy in the design of image-based photonic encoders.

On the fractional domain analysis of negative group delay circuits

SummaryIn this work, the analysis of negative group delay circuits in fractional domain has been conducted. The low pass and the high pass negative group delay circuits constructed based on passive network have been chosen as our candidate circuits. For performing the analysis in fractional domain, the novel Caputo–Fabrizio derivative‐based fractional impedance have been introduced to both circuits. The crucial parameters, the necessary conditions, and the existence conditions of both candidate negative group delay circuits have been formulated. The simulations have been conducted based on the formulated results where the comparisons with the conventional prototypes have been made. The verifications by the proof‐of‐concept circuits have also been performed. In addition, the effects of variation in the order of fractional impedances have been investigated. In summary, it has been found that considering these negative group delay circuits in the fractional domain, which effectively taking unavoidable nonidealities that cannot be modeled in conventional domain into account, significantly alters their characteristics especially the low pass circuit. However they can retain their low pass and high pass negative group delay functions.

A Miniaturized Wideband SIR Interdigital Bandpass Filter With High Performance Based on TSV Technology for W-Band Application

In this paper, an ultra-compact wideband stepped impedance resonators (SIR) interdigital bandpass filter (IBPF) is proposed based on through-silicon via (TSV) and three-dimensional integrated circuit (3D IC) technology. SIR structure can achieve higher coupling strength at a small impedance ratio. On this basis, the IBPF is designed by exploiting λ/4 SIR, the proposed filter is realized with compact size and far parasitic passband, and exhibits superior fractional bandwidth and out of band suppression characteristics. Based on the transformation of Chebyshev low-pass circuit model, a seventh-order IBPF centered at 98.5GHz is obtained. An improved method combining TSV technology with coupling coefficient method is proposed, which simplifies the design process and improves the influence of parasitic inductance on the design process. The fractional bandwidth (FBW) of SIR IBPF based on TSV is 40%, the insertion loss is less than 1.3dB, and a reflection of better than 30 dB in the passband. The size of the compact SIR IBPF is only 0.24×0.7mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> (0.28 × 0.79 λg <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ).

Research on Simulation System of Microgrids based on STM32

With the gradual depletion of traditional fossil energy and the increasing demand for electricity, finding new energy sources has become the only way for sustainable development. Microgrid is becoming an important auxiliary power for some developed and developing countries to solve the supply problem of energy system, which can not only effectively improve the overall utilization rate of renewable energy, but also improve the power supply reliability of the main grid. In this paper, the hardware circuit and software control of microgrid simulation system based on STM32 are studied and designed. The main circuit design of microgrid simulation system is based on STM32 single chip microcomputer as the main control core, and the pulse modulation signal SPWM is output through the software program of STM32F103CBT6 single chip microcomputer. The MOS driving circuit provides driving voltage and control signal to drive the inverter bridge to invert DC into AC. The inverter bridge is modulated by SPWM control technology, and the high-frequency signal in AC is filtered by low-pass filtering circuit, and finally the stable AC with a fixed frequency of 50 Hz is the output. By calculating the device parameters of the main control circuit and the full-bridge inverter circuit in the hardware unit circuit, and making appropriate selection of components, the specific model is determined, and finally the circuit design of the whole circuit is completed. The hardware circuit is designed rationally by Altium designer, and the software circuit is programmed by Keil. The influence of SPWM signal output by the circuit on the resistance load and its output waveform is analyzed comprehensively, and the influence of working frequency on the output waveform of the circuit is studied.

Simulation and Measurement of Out-of-Band Resonances for the FDM Readout of a TES Bolometer

With applications in cosmology, infrared astronomy and CMB survey, frequency-division multiplexing (FDM) proved to be a viable readout for transition-edge sensors (TESs). We investigate the occurrence of out-of-band resonances (OBR) which could constrain the bandwidth of the FDM readout of TES bolometers. The study includes SPICE modeling of the entire setup including the cryogenic harness, LC filters, Superconducting Quantum Interference Device (SQUID) and room-temperature amplifier. Simulation results show that the long harness (for flight model) could cause multiple reflections that generate repetitive spikes in the spectrum. Peaks of the OBR are mainly due to the parasitic capacitances at the input of SQUID. Implementing a low-pass RC circuit (snubber) at the input of the SQUID dampened the OBR. As a result, the first peak only appears around 20 MHz which is a safe margin for the 1 MHz $$-$$ 3.8 MHz FDM in use in the prototype readout. Using a spectrum analyzer and broadband LNAs, we also measured the OBR for the prototype FDM readout in the laboratory up to 500 MHz. The measurement was conducted at temperatures of 50 mK and 4 K and for various biasing of the DC SQUID. It turns out that OBRs are more intense at 50 mK and are caused by the harness impedance mismatch rather than the SQUID. Simulation codes and supporting materials are available at https://github.com/githubamin/LT-Spice-Simulation-of-FDM-readout .

Pre-Detection Sensing With Multistage Low-Pass Type Negative Group Delay Circuit

This paper reveals a fascinating pre-detection technique of sensor signals by means of counterintuitive negative group delay (NGD) electronic function. The sensor signal pre-detection technique is unconventionally developed thanks to the engineering of low-pass (LP) type NGD circuit. The NGD pre-detection basic principle is introduced. After topological description, the LP-NGD cell design method in function of negative time delay specification is formulated. An innovative analysis of time-advance property related to multi-stage LP-NGD cell is elaborated. To demonstrate the LP-NGD pre-detection technique feasibility, a proof of concept (POC) is designed with fabricated 3-stage LP-NGD printed circuit board (PCB) prototype integrating 4 LED detectors. The NGD pre-detection experimental setup is described. Extraordinary pre-detection with −0.5 s negative time propagation visible with LED on-lightning is demonstrated by considering a sinc pulse input signal. The developed NGD pre-detection technique can be useful in the future for the anticipation of industrial equipment damages and failure pre-detection sensor system in real-time.

TSV‐based common‐mode noise‐suppressing filter design and implementation

A through-silicon via (TSV)-based, common-mode, noise-suppressing filter (TSV-CMF) with the silicon interposer process is proposed to improve the electromagnetic compatibility in 3D integrated circuits. A differential fifth-order T-model low-pass filter prototype circuit for transmission lines with common inductance is used to characterize and design the stopband and the corresponding two transmission zeros for the common mode (CM). The circuit parameters are carefully designed and calculated to fit the performance requirement. The TSV-CMF is implemented in an interposer process with TSV as the vertical connect and redistribution layer (RDL) as the capacitance and inductance. TSV-CMF samples are tested, and the measurement results match those of the full-wave simulation. The differential cut-off frequency of the TSV-CMF can reach 16 GHz, and the CM stopband is around 5.3–16.0 GHz with 100% fractional bandwidth.

Integrated lowpass and C spectrum band pass filter using miniaturized stub based model

A stub-based model for a miniaturized lowpass circuit integrated with C spectrum bandpass response is developed in this brief. The proposed integrated filter structure has two sections, which consist of upper stub based lowpass model with 3 dB cut-off frequency of 3.03 GHz and lower inverted T shaped (ITS) stub structure having bandpass response within C band. The symmetrical stub sections along with an H shaped transmission line increases the lowpass suppression response. The passband of 5.56 GHz to –7.12 GHz is realized in the stopband region of the lowpass response. The final design provides a normalized circuit size of 0.037 λg2 with stopband noise rejection up to 25 GHz after the upper cut-off of the bandpass response. The in-band return loss of 20.6 dB is achieved using the half of quarter wavelength model of ITS. The fractional bandwidth of 24% is observed with out-band suppression of 25 dB. The lowpass and bandpass circuit geometry is optimized and explained individually. The proposed structure is fabricated and measured which is in admirable agreement with the simulated results. This compact stub-based lowpass-bandpass filter prototype can be used for C band satellite uplink communication applications.

Thermal Wave Variation Anticipation Under Minute Scale Time-Advance With Low-Pass NGD Digital Circuit

Over the emerging industry 4.0 era, the building control system performance depends on the development of smart sensor technology. Nowadays, the building control engineers challenge on the design of high-capacity smart sensor susceptible to operate with high speed of data processing. In this context, this paper introduces a pioneer research work on the negative group delay (NGD) circuit original application for room temperature anticipation useful for smart-building control. The real-time anticipation of sensor data by using a low-pass (LP) NGD digital circuit is studied. This approach enables minimizing the latency time for optimizing control action. The unfamiliar LP-NGD digital circuit design method and theoretical formulation are described for anticipating thermal wave experimentation in real-time. The digital circuit equation coefficients are computed regarding the time-advance of anticipated thermal completely arbitrary waveform signal. The main interest of using the NGD method-based for thermal wave anticipation regarding temperature variation from heater and freezer control is demonstrated. The anticipation feasibility is illustrated from the minute scale time-advance LP-NGD digital circuit implemented on the STM32® microcontroller unit. The NGD characterization is performed from frequency domain analysis and cosine waveform pulse transient test. Then, the -30 seconds to -10 seconds real-time-advance of temperature variation is verified by calculation and experimentation. The present study result opens a promising NGD method application for the advanced fault control of a future industrial system by anticipating system failures.

Study and experimentation of a 6-dB attenuation low-pass NGD circuit

Because of its counterintuitive nature, the Negative Group Delay (NGD) remains as an uncommon and unfamiliar electronic function. For this reason, the design and analysis of NGD circuits are not well-known for most of electronic designers. This paper initiates a basic and easy to understand theory, in addition to a design methodology for the low-pass NGD function. The circuit theory on the low-pass NGD function is described using an NGD passive topology which is constituted by a RC-parallel network with a resistive load. The NGD analysis and synthesis equations in function of NGD specifications are provided and a proof-of-concept of 6-dB low-pass NGD circuits has been designed, simulated, fabricated and tested. Frequency and time domain analyses have been performed to validate the low-pass NGD function. Theoretical and simulated results are in very good agreement and an NGD has been obtained in measurement for the proposed structure.

Realization of Inverse Active Filters Using Single Current Differencing Buffered Amplifier

The authors introduce a new single current differencing buffered amplifier (CDBA) based inverse filter configuration. By appropriate selection of admittances, different inverse filter circuits like inverse high-pass (IHP) circuit, inverse low-pass (ILP) circuit, inverse band-reject (IBR) circuit and inverse band-pass (IBP) circuit can be realized from the same configuration. The capacitors used here are grounded/virtually grounded for all the realizations. The performances of the proposed filters have been judged by using CMOS structure of CDBA with TSMC 0.35 µm technology as well as by using the available IC of current feedback operational amplifier (CFOA) i.e. AD844 based CDBA. The simulation results agreed well with the theoretical results. Monte-Carlo simulation has also been performed to check the robustness of the proposed configuration.

Design and Synthesis of Inductorless Passive Cell Operating as Stop-Band Negative Group Delay Function

This paper develops an original circuit theory of unfamiliar stop-band (SB) negative group delay (NGD) topology. The proposed NGD topology is implemented without inductor component. The developed theory is established with passive cell constituted by RC-network based high-pass (HP) and low-pass (LP) NGD composite circuits. The analytical investigation of the SB-NGD circuit is introduced from the elaboration of voltage transfer function (VTF). The canonical form enabling to identify SB-NGD circuit is analytically expressed. The different SB-NGD characteristics as GD value, and, center and cut-off frequencies are innovatively formulated in function of the circuit resistor and capacitor components. The existence condition of SB-NGD function is also established. The inductorless SB-NGD topology is validated by a proof-of-concept (POC) circuit implemented by surface-mounted-device (SMD) component based printed circuit board (PCB). The measured VTF magnitude and group delay (GD) are extracted from the experimented S-parameters. A good agreement between the calculated, simulated and measured results is obtained. The SB-NGD behavior has measured center frequency of about 32 MHz. The lower- and upper-NGD cut-off frequencies are about 9.15 MHz and 98.3 MHz. The optimal NGD values at low and higher frequencies are −3.25 ns and −56 ps.

Bandwidth limits of luminescent solar concentrators as detectors in free-space optical communication systems

Luminescent solar concentrators (LSCs) have recently emerged as a promising receiver technology in free-space optical communications due to their inherent ability to collect light from a wide field-of-view and concentrate it into small areas, thus leading to high optical gains. Several high-speed communication systems integrating LSCs in their detector blocks have already been demonstrated, with the majority of efforts so far being devoted to maximising the received optical power and the system’s field-of-view. However, LSCs may pose a severe bottleneck on the bandwidth of such communication channels due to the comparably slow timescale of the fluorescence events involved, a situation further aggravated by the inherent reabsorption in these systems, and yet, an in-depth study into such dynamic effects remains absent in the field. To fill this gap, we have developed a comprehensive analytical solution that delineates the fundamental bandwidth limits of LSCs as optical detectors in arbitrary free-space optical links, and establishes their equivalence with simple RC low-pass electrical circuits. Furthermore, we demonstrate a time-domain Monte Carlo simulation platform, an indispensable tool in the multiparameter optimisation of LSC-based receiver systems. Our work offers vital insight into LSC system dynamic behaviour and paves the way to evaluate the technology for a wide range of applications, including visible light communications, high-speed video recording, and real-time biological imaging, to name a few.

Multiantennas conjoined with metal frame and integrated into 8 × 8 m ultiple‐input and m ultiple‐output array for fifth generation smartphone applications

A new multiple-input and multiple-output (MIMO) antenna conjoined with a metal case and metal frame in mobile phones for fifth generation mobile network applications is presented. The main antenna is the metal frame inverted-F antenna (IFA) with a high-pass circuit (HPC) on the short side of the phone (Ant. 1); then, the system ground extending path and coupling are used to create a semi-slot antenna (Ant. 2). The metal frame radiating monopole antenna (Ant. 3) uses a low-pass circuit, and the IFA antennas (Ant. 4) with HPCs are placed in a clear space only 1-mm wide on the long side of the phone. To improve the isolation of the multiple antennas, the configuration of the MIMO antenna integration was investigated. The proposed four- or eight-MIMO array was comprehensively evaluated in the desired band. The characteristics of individual antennas were used to achieve pattern diversity, and they demonstrated good performance in channel capacity evaluation: 19.4 bps/Hz (four-antenna MIMO) and 38.6 bps/Hz (eight-antenna MIMO).

Fast Commutation Error Compensation for BLDC Motors Based on Virtual Neutral Voltage

Precise commutation signal is the prerequisite for the efficient operation of brushless direct current (BLDC) motors. However, the low-pass filter, nonideal current, circuit, and software retarding can bring about the commutation errors that will deteriorate the performance of BLDC motors, for example, resulting in larger current ripple and noise. To eliminate the commutation errors quickly and improve the performance of the motor, a novel compensation method is proposed in this letter. The compensation time is calculated by a counter. And the start-stop signals of the counter are obtained by the virtual neutral voltage. The proposed method requires none voltage or current sensor and has a faster compensation speed and higher precision than the traditional compensation method based on the integration of virtual neutral voltage. The effectiveness of the proposed method is verified by comparable exp eriments using an 80-W BLDC motor.

Tunable band-pass filter for continuous spectral analysis of cardiointervalogram

The developed device refers to analog low-pass filtering circuits and works as Butterworth-type broadband active RC filter. This filter can be used in devices for the human cardiovascular system diagnostic purposes, providing an opportunity to assess the state of the cardiovascular system. Such approach is based on the analysis of cardiointervalogram spectral power and can be implemented in biofeedback systems that use the current values of this power to generate feedback signals. The filter consists of second-order active bandpass filter blocks, connected together in series. Implemented schematic provides simultaneous tuning of the resonant frequency and the quality factor of the band-pass filter. This feature allowing to adjust the bandwidth while maintaining the center frequency and tuning the center frequency while maintaining the constancy of the band. The selection of bandpass filter tuning mode is made by selecting the appropriate adjustable components.

Explicit Solution to Exact Synthesis of Cross-Coupled Quadruplet Filter With a Real-Frequency Zero Pair

Explicit solution is derived for the exact synthesis of cross-coupled quadruplet filters with a real-frequency zero pair. Through a comparison of two-port S-parameters of the low-pass prototype circuit with the canonical generalized Chebyshev insertion loss function, a univariate quadratic function is formulated, and all element values of the circuit are explicitly expressed in terms of the designated zero and in-band ripple levels. The analytical expression of the sidelobe attenuation level is also obtained in terms of the zero, and vice versa. Results are checked against those from the existing literature.

Modelling, analysis and testing of an active element based wide-band frequency tunable compact rat-race hybrid

The article focuses on detail mathematical modelling and analysis of a wideband frequency reconfigurable 180° hybrid followed by experimental verification. The device is designed by replacing basic λg/4 lines with varactor based low-pass equivalent circuits, which results dimensional compactness (0.16λ×0.18λ×0.008λ at 1.6 GHz) of 70% compared to the conventional structure. The operational frequencies of the hybrid are altered by simultaneously tuning six active varactor diodes in reverse biased mode which shows overall wide operational tunable bandwidth (83%, |S11|<-10 dB and 68.4% due to matching of transmission coefficients). To validate the design methodology, a prototype is developed and experimentally verified. Good agreement between measurement and simulation results affirms that the device can be operated at different intermediate frequencies between 1.2 GHz and 2.9 GHz. Responses at three frequencies of 1.6 GHz, 2.05 GHz and 2.5 GHz are presented, where the device achieves 37.2%,38% and 32% of measured impedance bandwidths respectively. All the above-discussed features, low insertion loss along with cost effectiveness make the proposed device convenient for different microwave circuits and RF systems.

Circuit-integratable high-frequency micro supercapacitors with filter/oscillator demonstrations

Micro supercapacitor (MSC) featured by high capacitance density, has great potential for replacing bulky electrolytic capacitors in circuits to make electronics of miniaturization, yet suffers from sharp capacitance drop under alternating current. Here, we report a circuit-integratable high-frequency MSC with hybrid architecture electrode, in which 2D pseudocapacitive MXene served as the active material provides large capacitance and multi-walled carbon nanotube applied as interlayer support offers fast ion transport paths. Such design brings the device an excellent frequency response and a capacitance density much higher than commercial tantalum capacitors at 120 Hz. A novel transfer-free filtration technology greatly eliminates the equivalent series resistance and the consequent thermal loss, and makes the MSC a more circuit-integratable planar geometry. Moreover, such high-frequency MSC is applied in a low-pass filtering circuit and a relaxation oscillator circuit, displaying advantages in function, size and intergratability compared with electrolytic capacitors.