Low-noise Transimpedance Amplifier Research Articles

Wideband dual‐mode complementary metal–oxide–semiconductor receiver

A dual-mode complementary metal–oxide–semiconductor (CMOS) receiver operating from 1 to 2 GHz is presented. The proposed receiver employs a switchable low-noise amplifier (LNA) and two separated down-conversion paths to realise dual-mode operation. For receiving weak signals without large blockers, the receiver works in the high-gain mode which adopts the common gate (CG)–common source (CS) LNA and the active-mixer-based down-conversion path to achieve high gain and low noise figure (NF). In the case of large in-band blockers, the receiver works in the high linearity mode, which uses the LNA as a low-noise transimpedance amplifier followed by a 25% duty-cycle current-driving passive mixer and a transimpedance amplifier based on current buffer to obtain high in-band linearity. Implemented in a 0.18 μm CMOS technology, this receiver achieves 4.9 dB NF and a voltage gain range of 29.4–92.6 dB in high-gain mode, whereas +0.9 dBm in-band input-referred third-order interception and a voltage gain range of 15.8–20.1 dB in high linearity mode.

In-depth Characterization of Silicon Nanowire Field-Effect Transistor (SiNW-FET) for Neural Recording and Direct Performance Comparison with Passive MEA

In-depth Characterization of Silicon Nanowire Field-Effect Transistor (SiNW-FET) for Neural Recording and Direct Performance Comparison with Passive MEA

Design of low-noise transimpedance amplifiers with capacitive feedback

This paper reports on a new topology and design methodology for ultra-low noise and high-gain transimpedance amplifiers. This paper also reports on measurement results of two implemented ICs based on the proposed topology and fabricated in 130 nm IBM and 180 nm TSMC technologies. A capacitive feedback topology is implemented as a noise-efficient feedback network, analytical noise calculations in this family of TIA circuits are presented, and optimum noise criterion is derived. The saturation and instability problem of TIA circuits resulted from DC dark current of the input photodiodes is also addressed and a simple yet efficient feedback solution is proposed. The measurement results of 130 nm chip show average input referred noise of 2.67 pA/?Hz with bandwidth of 81 kHz to 1.76 GHz and transimpedance gain of 76 dB? while dissipating 13.7 mW from a 1.5 V power supply, including the output buffer. The measurement results of 180 nm chip show average input referred noise of 3.18 pA/?Hz with bandwidth of 72 kHz to 1.62 GHz and transimpedance gain of 75 dB? while dissipating 26.3 mW from a 2.2 V power supply, including the output buffer.

High sensitivity 10Gb/s Si photonic receiver based on a low-voltage waveguide-coupled Ge avalanche photodetector.

We demonstrate low-voltage germanium waveguide avalanche photodetectors (APDs) with a gain × bandwidth product above 100GHz. A photonic receiver based on such a Ge APD, including a 0.13μm SiGe BiCMOS low-noise trans-impedance amplifier and a limiting amplifier, is realized. A 5.8dB sensitivity improvement is demonstrated at -5.9V bias at an avalanche gain of 6 through bit error ratio measurements. The absolute sensitivity in avalanche mode is -23.4dBm and -24.4dBm at a bit error ratio of 1 × 10(-12) and 1 × 10(-9) respectively.

A low-noise transimpedance amplifier for the detection of "Violin-Mode" resonances in Advanced Laser Interferometer Gravitational wave Observatory suspensions.

This paper describes the design and performance of an extremely low-noise differential transimpedance amplifier, which takes its two inputs from separate photodiodes. The amplifier was planned to serve as the front-end electronics for a highly sensitive shadow-displacement sensing system, aimed at detecting very low-level "Violin-Mode" (VM) oscillations in 0.4 mm diameter by 600 mm long fused-silica suspension fibres. Four such highly tensioned fibres support the 40 kg test-masses/mirrors of the Advanced Laser Interferometer Gravitational wave Observatory interferometers. This novel design of amplifier incorporates features which prevent "noise-gain peaking" arising from large area photodiode (and cable) capacitances, and which also usefully separate the DC and AC photocurrents coming from the photodiodes. In consequence, the differential amplifier was able to generate straightforwardly two DC outputs, one per photodiode, as well as a single high-gain output for monitoring the VM oscillations-this output being derived from the difference of the photodiodes' two, naturally anti-phase, AC photocurrents. Following a displacement calibration, the amplifier's final VM signal output was found to have an AC displacement responsivity at 500 Hz of (9.43 ± 1.20) MV(rms) m(-1)(rms), and, therefore, a shot-noise limited sensitivity to such AC shadow- (i.e., fibre-) displacements of (69 ± 13) picometres/√Hz at this frequency, over a measuring span of ±0.1 mm.

(Invited) CMUT Based Microscale Integrated Ultrasound Systems for Minimally Invasive Intracardiac and Intravascular Imaging

Although catheter based intravascular ultrasound (IVUS) imaging of arterial cross sections and intracardiac echography (ICE) imaging of the heart in two dimensions have proven to be very useful in many interventional procedures used in the diagnosis and treatment of coronary and structural heart diseases, extension of these techniques to three-dimensional (3-D) volumetric imaging will have a dramatic impact. Truly volumetric images in front of an IVUS catheter will enable accurate evaluation and safer crossing of chronic total occlusions (CTOs) in coronary and peripheral arteries. Three dimensional ICE imaging in the heart can improve the outcome of challenging procedures such as trans-catheter valve replacements by providing the clinicians exceptional capability for real-time spatial mapping. These imaging devices would be enabled by miniature ultrasound systems that can be placed at the tip of mechanically flexible catheters.We have been developing technologies for integration of capacitive micromachined ultrasonic transducer (CMUT) arrays and custom designed CMOS front end electronics on the same silicon chip for ultimately miniaturized ultrasound systems for 3-D IVUS and ICE imaging. To implement these CMUT-on-CMOS systems, we post-process CMOS wafers to fabricate CMUTs using a low temperature process [1]. The CMOS electronics are designed specifically for low noise operation with CMUTs and use smart power management to reduce the power consumption, and time division multiplexing to reduce the cable count in the catheter to about 10 for an imaging array with over 100 elements [2]. With this approach, a 300um thick, 1-2mm diameter donut shaped silicon contains most of the required front end functionality, resulting in very flexible 3-7F catheters for 3-D IVUS and ICE imaging applications.Figure 1 shows a CMUT-on-CMOS chip with 1.4-mm-diameter dual-ring CMUT array on a front-end IC implemented in 0.35-µm CMOS process after silicon donut shaping using deep reactive ion etching (left) and after initial flex tape electrical connections (right). The dual-ring array has 56 transmit elements and 48 receive elements on two separate concentric annular rings. The IC incorporates a 25-V pulser for each transmitter element and a low-noise transimpedance amplifier (TIA) for each receiver, along with digital control. The final shape of the silicon chip is a 1.5-mm-diameter donut with a 430-µm center hole for a guide wire. The overall front-end system requires only 13 external connections and provides 4 parallel RF outputs while consuming an average power of 20-mW. The frequency of operation is around 20-MHz, suitable for forward looking volumetric IVUS imaging of CTOs. This device has been tested on wire phantoms and ex vivo chicken heart samples to demonstrate its capability to collect 3-D ultrasound imaging data at 60 fr/s rate and dynamic range comparable to commercial IVUS systems [3]. In addition to providing details of this type of CMUT-on-CMOS systems, we will discuss the use of this approach for implementing MRI compatible intracardiac imaging catheters as well as integration of an IVUS imaging system on a 0.014” diameter guidewire.J. Zahorian, M. Hoffman, T. Xu, G. Gurun, S. Satir, M. Karaman, and F.L. Degertekin “Monolithic CMUT on CMOS Integration for Intravascular Ultrasound Applications,” IEEE Trans. on UFFC, vol. 58, pp. 2659-2667, 2011.G. Gurun, P. Hasler, and F.L. Degertekin, “Frontend Receiver Electronics for High Frequency Monolithic CMUT-on-CMOS Imaging Arrays,” IEEE Trans. on UFFC, vol. 58, 1658-1668, 2011.G. Gurun, C. Tekes, J. Zahorian, T. Xu, S. Satir, M. Karaman and F.L. Degertekin, “Single-Chip CMUT-on-CMOS front-end System for Real Time Volumetric IVUS and ICE Imaging,” IEEE Trans. on UFFC, to appear in February 2014.

Single-chip CMUT-on-CMOS front-end system for real-time volumetric IVUS and ICE imaging

Intravascular ultrasound (IVUS) and intracardiac echography (ICE) catheters with real-time volumetric ultrasound imaging capability can provide unique benefits to many interventional procedures used in the diagnosis and treatment of coronary and structural heart diseases. Integration of capacitive micromachined ultrasonic transducer (CMUT) arrays with front-end electronics in single-chip configuration allows for implementation of such catheter probes with reduced interconnect complexity, miniaturization, and high mechanical flexibility. We implemented a single-chip forward-looking (FL) ultrasound imaging system by fabricating a 1.4-mm-diameter dual-ring CMUT array using CMUT-on-CMOS technology on a front-end IC implemented in 0.35-μm CMOS process. The dual-ring array has 56 transmit elements and 48 receive elements on two separate concentric annular rings. The IC incorporates a 25-V pulser for each transmitter and a low-noise capacitive transimpedance amplifier (TIA) for each receiver, along with digital control and smart power management. The final shape of the silicon chip is a 1.5-mm-diameter donut with a 430-μm center hole for a guide wire. The overall front-end system requires only 13 external connections and provides 4 parallel RF outputs while consuming an average power of 20 mW. We measured RF A-scans from the integrated single- chip array which show full functionality at 20.1 MHz with 43% fractional bandwidth. We also tested and demonstrated the image quality of the system on a wire phantom and an ex vivo chicken heart sample. The measured axial and lateral point resolutions are 92 μm and 251 μm, respectively. We successfully acquired volumetric imaging data from the ex vivo chicken heart at 60 frames per second without any signal averaging. These demonstrative results indicate that single-chip CMUT-on-CMOS systems have the potential to produce realtime volumetric images with image quality and speed suitable for catheter-based clinical applications.

Low-noise Transimpedance Amplifier for Pixelated CMOS Photon Detector in the Scanning Electron Microscope

In this paper, a low-noise transimpedance amplifier for pixelated CMOS photon detector for the use in the scanning electron microscope is presented. From simulation, this optimized circuit exhibits a total input-referred noise of 1.77 × 10−10 A with a bandwidth of 3.5 MHz or equivalent to 95 fA/VHz. The TIA was fabricated in a 0.35 ¼m CMOS technology and dissipates 56.43 mW from a 3.3 V supply. The prototype TIA was proven experimentally to work at a frequency in excess of 3.5 MHz and produce a transimpedance gain of 127.68 dBΩ.

A novel pixellated solid‐state photon detector for enhancing the everhart–thornley detector

This article presents a pixellated solid-state photon detector designed specifically to improve certain aspects of the existing Everhart-Thornley detector. The photon detector was constructed and fabricated in an Austriamicrosystems 0.35 µm complementary metal-oxide-semiconductor process technology. This integrated circuit consists of an array of high-responsivity photodiodes coupled to corresponding low-noise transimpedance amplifiers, a selector-combiner circuit and a variable-gain postamplifier. Simulated and experimental results show that the photon detector can achieve a maximum transimpedance gain of 170 dBΩ and minimum bandwidth of 3.6 MHz. It is able to detect signals with optical power as low as 10 nW and produces a minimum signal-to-noise ratio (SNR) of 24 dB regardless of gain configuration. The detector has been proven to be able to effectively select and combine signals from different pixels. The key advantages of this detector are smaller dimensions, higher cost effectiveness, lower voltage and power requirements and better integration. The photon detector supports pixel-selection configurability which may improve overall SNR and also potentially generate images for different analyses. This work has contributed to the future research of system-level integration of a pixellated solid-state detector for secondary electron detection in the scanning electron microscope.

Low-noise transimpedance amplifier for pixelated CMOS photon detector in the scanning electron microscope

AbstractIn this paper, a low-noise transimpedance amplifier for pixelated CMOS photon detector for the use in the scanning electron microscope is presented. From simulation, this optimized circuit exhibits a total input-referred noise of 1.77 × 10−10 A with a bandwidth of 3.5 MHz or equivalent to 95 fA/VHz. The TIA was fabricated in a 0.35 ¼m CMOS technology and dissipates 56.43 mW from a 3.3 V supply. The prototype TIA was proven experimentally to work at a frequency in excess of 3.5 MHz and produce a transimpedance gain of 127.68 dBΩ.

Note: A transimpedance amplifier for remotely located quartz tuning forks

The cable capacitance in cryogenic and high vacuum applications of quartz tuning forks imposes severe constraints on the bandwidth and noise performance of the measurement. We present a single stage low noise transimpedance amplifier with a bandwidth exceeding 1 MHz and provide an in-depth analysis of the dependence of the amplifier parameters on the cable capacitance.

Noise Performance of a Regulated Cascode Transimpedance Amplifier for Radiation Detectors

A low noise transimpedance amplifier (TIA) is used in radiation detectors to transform the current pulse produced by a photo-sensitive device into an output voltage pulse with a specified amplitude and shape. We consider here the specifications of a PET (positron emission tomography) system. We review the traditional approach, feedback TIA, using an operational amplifier with feedback, and we investigate two alternative circuits: the common-gate TIA, and the regulated cascode TIA. We derive the transimpedance function (the poles of which determine the pulse shaping); we identify the transistor in each circuit that has the dominant noise source, and we obtain closed-form equations for the rms output noise voltage. We find that the common-gate TIA has high noise, but the regulated cascode TIA has the same dominant noise contribution as the feedback TIA, if the same maximum transconductance value is considered. A circuit prototype of a regulated cascode TIA is designed in a 0.35 μm CMOS technology, to validate the theoretical results by simulation and by measurement.

Suppression of Microwave High-Speed Circuit Noise by Using a 10 GHz Transimpedance Amplifier at 30 oC

A 10 GHz low noise transimpedance amplifier (TIA) is designed in which a new high-speed Angelov transistor model was employed. Thermal circuit components were simulated for noise measurement at 30ºC at which a typical microwave noise of 20 pA/√Hz was applied as the TIA input. A form of feedback topology helped to reduce the minimum noise figure to 3 dB, while the |S21| parameter gain proved to be 21.7 dB. A noise voltage at the TIA output was 3.23 x 10-15 V2/Hz. The designed circuit showed a stability factor value of 0.36 which is considered as conditionally stable.

A novel high electrode count spike recording array using an 81,920 pixel transimpedance amplifier-based imaging chip

Microelectrode recording arrays of 60–100 electrodes are commonly used to record neuronal biopotentials, and these have aided our understanding of brain function, development and pathology. However, higher density microelectrode recording arrays of larger area are needed to study neuronal function over broader brain regions such as in cerebral cortex or hippocampal slices. Here, we present a novel design of a high electrode count picocurrent imaging array (PIA), based on an 81,920 pixel Indigo ISC9809 readout integrated circuit camera chip. While originally developed for interfacing to infrared photodetector arrays, we have adapted the chip for neuron recording by bonding it to microwire glass resulting in an array with an inter-electrode pixel spacing of 30μm. In a high density electrode array, the ability to selectively record neural regions at high speed and with good signal to noise ratio are both functionally important. A critical feature of our PIA is that each pixel contains a dedicated low noise transimpedance amplifier (∼0.32pA rms) which allows recording high signal to noise ratio biocurrents comparable to single electrode voltage amplifier recordings. Using selective sampling of 256 pixel subarray regions, we recorded the extracellular biocurrents of rabbit retinal ganglion cell spikes at sampling rates up to 7.2kHz. Full array local electroretinogram currents could also be recorded at frame rates up to 100Hz. A PIA with a full complement of 4 readout circuits would span 1cm and could acquire simultaneous data from selected regions of 1024 electrodes at sampling rates up to 9.3kHz.

Ultrasonic sensing using thermal mechanical noise of capacitive micro-machined transducers

Monolithic integration of CMUTs and CMOS electronics minimizes interconnect parasitics which allows recording the actual thermal–mechanical component of the ultrasonic noise field. Consequently, an estimate of the pulse-echo response (or Greens function) between two CMUT sensors can be obtained from the cross-correlation of thermal–mechanical noise recorded by these two sensors, as shown by Weaver and Lobkiss [JASA, 113(5), 2611-21]. This provides a foundation for passive ultrasound imaging using only the thermal–mechanical noise field, without active transmitter elements. We designed and fabricated monolithic a 32 element CMUT-on-CMOS ring array (d = 725 μm) for intravascular imaging with low noise transimpedance amplifiers (TIAs) implemented in 0.35 μm CMOS technology. The bias voltage was set near the collapse value of the CMUT membrane to maximize receiver sensitivity. Demonstration experiments were conducted by immersing the CMUT array in a water bath to sense/image the water–air interface and compact targets from noise signals in the frequency band 14–25 MHz. These experimental results were consistent with the sensor and target locations and were validated using conventional pulse-echo measurements. This totally passive ultrasonic technique could improve ultrasound imaging of near-field targets in the deadzone created by active transmitters biasing the receivers and may lead to imaging using evanescent waves.

A 10-Gb/s OEIC with Meshed Spatially-Modulated Photo Detector in 0.18-$\mu{\hbox {m}}$ CMOS Technology

This paper describes the design of a 10-Gb/s fully integrated CMOS optical receiver, which consists of a novel spatially-modulated photo detector (SMPD), a low-noise trans-impedance amplifier (TIA), and a post-limiting amplifier on a single chip. The bandwidth of proposed meshed SMPD can be boosted up to 6.9 GHz under a reverse-biased voltage of 14.2 V. The measured responsivity of the meshed SMPD is 29 mA/W as illuminated by 850-nm light source. To compensate the relatively low responsivity of on-chip CMOS photo detector (PD), a high-gain TIA with nested feedback and shunt peaking is proposed to achieve low-noise operation. The optical receiver is capable of delivering 25-kΩ conversion gain when driving 50-Ω output loads. For a PRBS test pattern of 27- 1, the 10-Gb/s optoelectronic integrated circuit (OEIC) has optical sensitivity of - 6 dBm at a bit-error rate (BER) of 10 -11. Implemented in a generic 0.18-μm CMOS technology, the chip area is 0.95 mm by 0.8 mm. The trans-impedance amplifier, post amplifier, and output buffer respectively drain 38 mW, 80 mW, and 27 mW from the 1.8-V supply.

Transition edge sensor series array bolometer

A transition edge sensor series array (TES-SA) is an array of identical TESs that areconnected in series by low-inductance superconducting wiring. The array elements areequally and well thermally coupled to the absorber and respond to changes in the absorbertemperature in synchronization. The TES-SA total resistance increases compared to asingle TES while the shape of the superconducting transition is preserved. We aredeveloping a TES-SA with a large number, hundreds to thousands, of array elements withthe goal of enabling the readout of a TES-based bolometer operated at 4.2 K with asemiconductor-based amplifier located at room temperature. The noise and dynamicperformance of a TES-SA bolometer based on a niobium/aluminum bilayer is analyzed. Itis shown that stable readout of the bolometer with a low-noise transimpedance amplifier isfeasible.

A Monolithically Integrated Phase-Sensitive Optical Sensor for Frequency-Domain NIR Spectroscopy

This paper presents design and measurement results of a fully integrated optical sensor for phase and amplitude detection of RF modulated optical signals up to 110 MHz in the near-infrared (NIR) region (650-850 nm) for use in frequency-domain spectroscopy instruments. The sensor consists of an NIR-sensitive photodetector monolithically integrated with a front-end analog amplifier and signal processing circuitry for amplitude and phase detection in an unmodified complementary metal oxide semiconductor (CMOS) process. A high-gain, low-noise differential transimpedance amplifier (TIA) is implemented to amplify the photocurrent signal. Amplitude and phase resolution are evaluated with a 690 nm laser diode modulated at 100 MHz. The amplitude response exhibits 2.2 mV/μW resolution with 0.4% linearity. The measured amplitude output noise is 72 μ~V. The proposed phase detector detects 0°-360° phase difference with a measured average phase resolution of 4.8 mV/degree and 255 μV output noise. The sensor is implemented in a 180 nm CMOS technology and consumes 23.4 mW from a 1.8 V supply voltage.

Low-noise differential transimpedance amplifier structure based on capacitor cross-coupled gm-boosting scheme

This paper presents a capacitor cross-coupled gm-boosting scheme for differential implementation of common-gate transimpedance amplifier (CG-TIA). A differential transimpedance amplifiers (DTIA) is designed by this scheme using two modified floating-biased CG stage with improved low corner frequency. Despite conventional methods for single-ended to differential conversion that increase the power and the noise for the same gain, the new DTIA gives a higher gain and hence reduces the input-referred noise power. Design of the DTIA circuit using 0.13μm CMOS technology illustrates near 1.7dB improvement in the circuit sensitivity and 5.2dB enhancement in transimpedance gain compared to its single-ended counterpart. Operation at very low frequencies and stable dc coupling to photodiode are other features of the proposed DTIA.

High-Performance BiCMOS Transimpedance Amplifiers for Fiber-Optic Receivers

High gain, wide bandwidth, low noise, and low-power transimpedance amplifiers based on new BiCMOS common- base topologies have been designed for fiber-optic receivers. In particular a design approach, hereafter called "A more- FET approach", added a new dimension to effectively optimize performance tradeoffs inherent in such circuits. Using conventional silicon 0.8 μm process parameters, simulated performance features of a total-FET transimpedance amplifier operating at 7.2 GHz, which is close to the technology fT of 12 GHz, are presented. The results are superior to those of similar recent designs and comparable to IC designs using GaAs technology. A detailed analysis of the design architecture, including a discussion on the effects of moving toward more FET-based designs is presented.