Low Noise GaAs FET Research Articles

FET statistical modeling using parameter orthogonalization

A new method for representing the statistical variation of FET equivalent circuit parameters (ECPs) is presented. This method utilizes a statistical technique known as principal components and provides an efficient method for statistically representing the means, standard deviations, and correlations of the FET ECPs. The technique can easily be implemented into commercial CAD simulators resulting in FET variation simulations that are more accurate than existing methods. Appropriate statistical tests for determination of equivalence between simulated and measured FET parameter distributions is also discussed. Both the modeling methodology and statistical testing were demonstrated using both scattering and noise parameters for 300 /spl mu/m low-noise GaAs FETs.

Rohm hyperFETs outperform HEMTs

Rohm Electronics (UK) Ltd. has announced the immediate availability of a range of low-noise GaAs FETs for DBS applications known as hyperFETs. These are based on a new type of structure which gives superior noise performance compared to conventional HEMTs, and are already in volume production at Rohm's main semiconductor plant in Kyoto, Japan. They are available in industry-standard (Micro-X) ceramic packages, and can be supplied taped and reeled for automatic insertion.

L- and S-band low-noise cryogenic GaAs FET amplifiers

The authors present the results of the construction and testing of three cryogenic low-noise GaAs FET amplifiers, based on a National Radio Astronomy Observatory design, to be used in a detector for the axion, a hypothetical particle. The amplifiers are centered on 1.1 GHz, and 2.4 GHz, have a gain of approximately 30 dB in bandwidths of 300 MHz, 225 MHz, and 310 MHz, and have minimum noise temperatures of 7.8 K, 8 K, and 15 K, respectively.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Monolithic integration of surge protection diodes into low-noise GaAs MESFET's

For use in practical equipment, GaAs MESFET's need Schottky gates with high energy tolerance against electrostatic discharge. This paper describes the design and fabrication technology related to the monolithic integration of protective diodes into low-noise GaAs MESFET's. A new diode structure, the grooved sidewall junction diode (GSJD), is proposed which is well suited for suppressing deterioration of the FET's RF performance. The GSJD was successfully integrated into the dual-gate low-noise GaAs FET for use in a UHF TV tuner. High energy tolerance of 50 erg was obtained in the device with a noise figure of 1.2 dB at 1 GHz.

30 GHz Band Low Noise Receiver for 30/20 GHz Single-Conversion Transponder

This paper describes the design and performance of a low noise multicarrier receiver for a 30/20 GHz single-conversion satellite transponder. To develop a low noise receiver the following areas were examined: 1) analysis of spurious signals, 2) selection of devices most suitable for use on board the satellite, and 3) level diagram tradeoff studies. The receiver consists of a 30 GHz low noise GaAs FET amplifier, a 30/20 GHz GaAs Schottky barrier diode mixer, a dielectric resonated local oscillator, a 20 GHz high gain GaAs FET amplifier, and a 20 GHz high power (0.5 W) GaAs FET amplifier. The receiver has an 8 dB noise figure and a 48 dB gain in the frequency range from 28.395 GHz to 29.015 GHz (620 MHz frequency bandwidth).

Application of feedback techniques to the realisation of hybrid and monolithic broadband low-noise-and-power GaAs FET amplifiers

The implementation of ultrabroadband low-noise GaAs FET amplifiers operating up to 20 GHz is shown to be possible with the use of a low-parasitic high-gm device, which can only be implemented using monolithic circuit techniques. An example of a 0.1 to 6 GHz hybrid low-noise amplifier to illustrate the circuit technique is described.

Failure Mechanisms and Reliability of Low-Noise GaAs FETs

The degradation and failure of low-noise GaAs FETs have been accelerated by various stress-aging techniques including storage at elevated temperatures with and without bias, exposure to humid atmospheres with and without bias, and temperature cycling. Several time-temperature-bias-induced catastrophic failure mechanisms have been observed, all involving the Al gate metallization. These mechanisms are Au-Al phase formation, Al electromigration, and electrolytic corrosion. Each of these processes results ultimately in an open gate. Accelerated aging also produces gradual, long-term degradation in both dc and RF characteristics, though the two are not always correlated. In fact, contrary to some expectations, contact resistance may increase almost two orders of magnitude without significant degradation in the noise figure or gain of a low-noise transistor. Besides contact resistance, other mechanisms such as traps in the channel are thought to play a role in the degradation of RF properties. It was found that all the important degradation mechanisms are bias-sensitive and that aging without bias gives erroneously long lifetime projections. The cumulative failure distributions for the mechanisms observed approximate a log-normal relation with standard deviations between 0.6 and 1.4. The relevant degradation or failure processes have activation energies near 1.0 eV, which give rise to projected median lifetimes at 60°C (channel temperature) over 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">7</sup> hours and corresponding failure rates (excepting infant mortality) under 40 FITs (40 per 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">9</sup> device-hours) at 20 years of service.

Low-noise GaAs FET's prepared by ion implantation

The rapidly improving performance of low-noise GaAs FET's can to a large extent be attributed to advances in the material preparation technology. Ion implantation directly into bulk-grown semi-insulating substrate material represents an optimum approach by providing excellent control and reproducibility over the doping parameters in the active layer. This paper will review development efforts carried out to capitalize on these inherent advantages and discuss the results obtained from transistors fabricated by this method. Device modeling has been used to investigate the effects of profile tailoring and has served as a guide for selecting implant species, doses, and energies. This effort has paralleled the development of the implantation technology, which has addressed the problems of selecting suitable substrate material, deposition of suitable capping material for the post-implantation anneal, the study of doping profiles, and the diffusion during the anneal. The advances made in these areas will be discussed along with the fabrication procedures for the low-noise FET's. Favorable doping profiles were obtained by using Se implants as evidenced by the small variation in the measured transconductance versus gate voltage. The excellent uniformity and reproducibility obtained in the active layer parameters have resulted in tightly distributed transconductances, pinchoff voltages, and S-parameters. Measured parameters from five wafers have given typical standard deviations of less than 10 percent of the mean value. Packaged transistors with a nominal gate length of 1 µm have yielded noise figures of 1.1 dB at 4 GHz with 12- dB associated gain, while 2.5-dB noise figures have been achieved at 15 GHz with 7-dB gain from transistors mounted on a low parasitic carrier. These improved RF results combined with a high level of reproducibility present ion implantation as a very attractive method for fabricating low-noise GaAs FET's.

A Highly Stabilized Low-Noise GaAs FET Integrated Oscillator with a Dielectric Resonator in the C Band

A GaAs FET integrated oscillator stabilized with a BaO--TiO/sub 2/ system ceramic dielectric resonator provides a high-frequency-stabilized low-noise compact microwave power source. The newly developed ceramic has an expansion coefficient and dielectric constant temperature coefficient that offset each other and result in a small resonant frequency temperature coefficient. A stabilized oscillator output of 100 mW with a 17-percent efficiency and a frequency temperature coefficient as low as 2.3 ppm//spl deg/C are obtained at 6 GHz. FM noise level is reduced more the 30 dB by the stabilization. The dynamic properties of the oscillator and resonator are precisely measured to determine equivalent circuit representations. A large-signal design theory based on these equivalent circuit representations is presented to realize the optimal coupling condition between the oscillator and stabilizing resonator. The stabilized oscillator performance is sufficient for application to microwave communications systems.