Low-latency Paths Research Articles

Interconnect support for energy efficient and high bandwidth memory access in CMPs

The increasing number of on-chip cores and a limited number of memory controllers pose a critical problem for off-chip memory bandwidth. In this work, we propose an adaptive hybrid switching strategy with a dual crossbar router to provide low latency paths between cache and memory controllers. The performance is further improved by finding the optimal number and placement of memory controllers using machine learning approach with low overheads. The proposed architecture improves the average bandwidth of the network by 21.03% and reduces the network energy and memory access latency by 12.60% and 20.45%, respectively as compared to the traditional NoC architecture.

Laser Intersatellite Links in a Starlink Constellation: A Classification and Analysis

Laser intersatellite links (LISLs) are envisioned between satellites in upcoming satellite constellations, such as the one in phase I of SpaceX's Starlink. Within a constellation, satellites can establish LISLs with other satellites in the same orbital plane (OP) or in different OPs. We present a classification of LISLs based on the location of satellites within a constellation and of LISLs' duration. Then, using the satellite constellation for phase I of Starlink, we study the effect that varying a satellite's LISL range has on the number of different types of LISLs it can establish with other satellites. In addition to permanent LISLs, we observe a significant number of temporary LISLs between satellites in crossing OPs. Such LISLs can play a vital role in achieving low-latency paths within next-generation optical wireless satellite networks.

Adaptive Path Isolation for Elephant and Mice Flows by Exploiting Path Diversity in Datacenters

Resource competition and conflicts in datacenter networks (DCNs) are frequent and intense. They become inevitable when mixing elephant and mice flows on shared transmission paths, resulting in arbitration between throughput and latency and performance degradation. We propose a novel flow scheduling scheme, Freeway, that leverages on path diversity in the DCN topology to guarantee, simultaneously, mice flow completion within deadline and high network utilization. Freeway adaptively partitions the available paths into low latency and high throughput paths and provides different transmission services for each category. A M/G/1-based model is developed to theoretically obtain the highest value of average delay over the path that will guarantee for 99% of mice flows their completion time before the deadline. Based on this bound, Freeway proposes a dynamic path partitioning algorithm to adjust dynamically with varying traffic load the number of low latency and high throughput paths. While mice flows are transmitted over low latency paths using a simple equal cost multiple path (ECMP) scheduling, Freeway load balances elephant flows on different high-throughput paths. We evaluate Freeway in a series of simulation on a large scale topology and use real traces. Our evaluation results show that Freeway significantly reduces the mice flows completion time within deadlines, while achieving remarkable throughput compared with current schemes. It is remarkable that Freeway does not need any change of DCN switch fabrics or scheduling algorithms and can be deployed easily on any generic datacenter network with switches implementing VLANs and trunking.

CMOS implementation of a new high speed 5-2 compressor for parallel accumulations

This paper presents a new high speed 5-2 compressor. It is designed based on a new truth table which leads to a simple structure. Also, the driving problems are reduced. Due to the similar paths from inputs to the outputs, there will be no need for extra buffers in low latency paths to equalize the delays and the power dissipation is decreased. Furthermore, by use of full swing logics, the speed of cascaded operations is enhanced. The latency of proposed design is 440 ps.

A Novel and Very Fast 4-2 Compressor for High Speed Arithmetic Operations

A novel high speed 4-2 compressor using static and pass-transistor logic, has been designed in a 0.35µm CMOS technology. In order to reduce gate level delay and increase the speed, some changes are performed in truth table of conventional 4-2 compressor which leaded to the simplification of logic function for all parameters. Therefore, power dissipation is decreased. In addition, because of similar paths from all inputs to the outputs, the delays are the same. So there will be no need for extra buffers in low latency paths to equalize the delays.

Implementing ARP-path low latency bridges in NetFPGA

The demo is focused on the implementation of ARP-Path (a.k.a. FastPath) bridges, a recently proposed concept for low latency bridges. ARP-Path Bridges rely on the race between broadcast ARP Request packets, to discover the minimum latency path to the destination host. Several implementations (in Omnet++, Linux, OpenFlow, NetFPGA) have shown that ARP-Path exhibits loop-freedom, does not block links, is fully transparent to hosts and neither needs a spanning tree protocol to prevent loops nor a link state protocol to obtain low latency paths. This demo compares our hardware implementation on NetFPGA to bridges running STP, showing that ARP-Path finds lower latency paths than STP.

Scalable application layer multicast

We describe a new scalable application-layer multicast protocol, specifically designed for low-bandwidth, data streaming applications with large receiver sets. Our scheme is based upon a hierarchical clustering of the application-layer multicast peers and can support a number of different data delivery trees with desirable properties.We present extensive simulations of both our protocol and the Narada application-layer multicast protocol over Internet-like topologies. Our results show that for groups of size 32 or more, our protocol has lower link stress (by about 25%), improved or similar end-to-end latencies and similar failure recovery properties. More importantly, it is able to achieve these results by using orders of magnitude lower control traffic.Finally, we present results from our wide-area testbed in which we experimented with 32-100 member groups distributed over 8 different sites. In our experiments, average group members established and maintained low-latency paths and incurred a maximum packet loss rate of less than 1% as members randomly joined and left the multicast group. The average control overhead during our experiments was less than 1 Kbps for groups of size 100.